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| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2014-12-10 20:00:51 -0800 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2014-12-11 18:59:36 -0800 |
| commit | 9cd4f9024239f00c005e3dc1b2270e60e82b412d (patch) | |
| tree | a8ae4d09fb0718aedc3d1fa10f2821513dbf3229 /src/mesa/drivers/dri/i965/intel_blit.c | |
| parent | ad2ffd3bc691fc5049f2043d8c81e1534e78d485 (diff) | |
| download | external_mesa3d-9cd4f9024239f00c005e3dc1b2270e60e82b412d.zip external_mesa3d-9cd4f9024239f00c005e3dc1b2270e60e82b412d.tar.gz external_mesa3d-9cd4f9024239f00c005e3dc1b2270e60e82b412d.tar.bz2 | |
i965/gen8: Check correct number of blitter dwords
The odds of having this patch make a difference on Gen8+ are probably very low.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-but-not-tested-by: Jason Ekstrand <jason.ekstrand@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_blit.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 73ab488..8d81671 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -335,7 +335,9 @@ intelEmitCopyBlit(struct brw_context *brw, if (pass >= 2) return false; - intel_batchbuffer_require_space(brw, 8 * 4, BLT_RING); + unsigned length = brw->gen >= 8 ? 10 : 8; + + intel_batchbuffer_require_space(brw, length * 4, BLT_RING); DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", __FUNCTION__, src_buffer, src_pitch, src_offset, src_x, src_y, @@ -399,8 +401,6 @@ intelEmitCopyBlit(struct brw_context *brw, assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) + (w * cpp) <= dst_buffer->size); - unsigned length = brw->gen >= 8 ? 10 : 8; - BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled); OUT_BATCH(CMD | (length - 2)); OUT_BATCH(BR13 | (uint16_t)dst_pitch); @@ -467,7 +467,9 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw, __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); - intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, BLT_RING); + unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8; + intel_batchbuffer_require_space(brw, (xy_setup_blt_length * 4) + + (3 * 4) + dwords * 4, BLT_RING); opcode = XY_SETUP_BLT_CMD; if (cpp == 4) @@ -484,8 +486,6 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw, if (dst_tiling != I915_TILING_NONE) blit_cmd |= XY_DST_TILED; - unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8; - BEGIN_BATCH_BLT(xy_setup_blt_length + 3); OUT_BATCH(opcode | (xy_setup_blt_length - 2)); OUT_BATCH(br13); |