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author | Eric Anholt <eric@anholt.net> | 2007-12-07 16:15:49 -0800 |
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committer | Eric Anholt <eric@anholt.net> | 2007-12-07 16:19:10 -0800 |
commit | e3a6e60040b7f6ea7965e52f8f9881ed31e0347c (patch) | |
tree | 6fadf576b904bb479936a355ed716ca305556848 /src/mesa/drivers/dri/i965/intel_regions.h | |
parent | 3ecdae82d751f9f404d10332f030e3280949ce4e (diff) | |
download | external_mesa3d-e3a6e60040b7f6ea7965e52f8f9881ed31e0347c.zip external_mesa3d-e3a6e60040b7f6ea7965e52f8f9881ed31e0347c.tar.gz external_mesa3d-e3a6e60040b7f6ea7965e52f8f9881ed31e0347c.tar.bz2 |
[965] Convert the driver to dri_bufmgr interface and enable TTM.
This is currently believed to work but be a significant performance loss.
Performance recovery should be soon to follow.
The dri_bo_fake_disable_backing_store() call was added to allow backing store
disable like bufmgr_fake.c did, which is a significant performance win (though
it's missing the no-fence-subdata part).
This commit is a squash merge of the 965-ttm branch, which had some history
I wanted to avoid pulling due to noisiness and brokenness at many points
for git-bisecting.
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_regions.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_regions.h | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_regions.h b/src/mesa/drivers/dri/i965/intel_regions.h index d2235f1..985102c 100644 --- a/src/mesa/drivers/dri/i965/intel_regions.h +++ b/src/mesa/drivers/dri/i965/intel_regions.h @@ -29,7 +29,8 @@ #define INTEL_REGIONS_H #include "mtypes.h" -#include "bufmgr.h" /* for DBG! */ +#include "dri_bufmgr.h" /* for DBG! */ +#include "intel_screen.h" struct intel_context; /* A layer on top of the bufmgr buffers that adds a few useful things: @@ -40,7 +41,7 @@ struct intel_context; * - Blitter commands for copying 2D regions between buffers. */ struct intel_region { - struct buffer *buffer; + dri_bo *buffer; GLuint refcount; GLuint cpp; GLuint pitch; @@ -71,15 +72,24 @@ void intel_region_release(struct intel_context *intel, * buffers are within those zones. Tiling regions without fence * registers is more work. */ -struct intel_region *intel_region_create_static( struct intel_context *intel, - GLuint mem_type, - GLuint offset, - void *virtual, - GLuint cpp, - GLuint pitch, - GLuint height, - GLuint size, - GLboolean tiled ); +struct intel_region * +intel_region_create_static(intelScreenPrivate *intelScreen, + char *name, + GLuint mem_type, + unsigned int bo_handle, + GLuint offset, + void *virtual, + GLuint cpp, + GLuint pitch, GLuint height, GLboolean tiled); +void +intel_region_update_static(intelScreenPrivate *intelScreen, + struct intel_region *region, + GLuint mem_type, + unsigned int bo_handle, + GLuint offset, + void *virtual, + GLuint cpp, GLuint pitch, GLuint height, + GLboolean tiled); /* Map/unmap regions. This is refcounted also: */ |