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authorXiang, Haihao <haihao.xiang@intel.com>2009-07-13 10:48:43 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2009-07-13 11:01:13 +0800
commit2995bf0d68f1b28ba68b81e9dc79e3ab52bc2795 (patch)
tree61effe693f29512148ce333209f7e1ee01e5f729 /src/mesa/drivers/dri/intel/intel_mipmap_tree.c
parentf030e2ba17a3b859d30017cfd990552d3af4bad3 (diff)
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i965: add support for new chipsets
1. new PCI ids 2. fix some 3D commands on new chipset 3. fix send instruction on new chipset 4. new VUE vertex header 5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>) 6. the offset in JMPI is in unit of 64bits on new chipset 7. new cube map layout
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_mipmap_tree.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c26
1 files changed, 18 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 311fe01..c985da5 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -353,23 +353,31 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
}
-
void
-intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
- GLuint level, GLuint img,
- GLuint x, GLuint y)
+intel_miptree_set_image_offset_ex(struct intel_mipmap_tree *mt,
+ GLuint level, GLuint img,
+ GLuint x, GLuint y,
+ GLuint offset)
{
if (img == 0 && level == 0)
assert(x == 0 && y == 0);
assert(img < mt->level[level].nr_images);
- mt->level[level].image_offset[img] = (x + y * mt->pitch) * mt->cpp;
+ mt->level[level].image_offset[img] = (x + y * mt->pitch) * mt->cpp + offset;
DBG("%s level %d img %d pos %d,%d image_offset %x\n",
__FUNCTION__, level, img, x, y, mt->level[level].image_offset[img]);
}
+void
+intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
+ GLuint level, GLuint img,
+ GLuint x, GLuint y)
+{
+ intel_miptree_set_image_offset_ex(mt, level, img, x, y, 0);
+}
+
/* Although we use the image_offset[] array to store relative offsets
* to cube faces, Mesa doesn't know anything about this and expects
@@ -483,7 +491,7 @@ intel_miptree_image_data(struct intel_context *intel,
}
}
-extern GLuint intel_compressed_alignment(GLenum);
+extern void intel_get_texture_alignment_unit(GLenum, GLuint *, GLuint *);
/* Copy mipmap image between trees
*/
void
@@ -503,9 +511,11 @@ intel_miptree_image_copy(struct intel_context *intel,
GLboolean success;
if (dst->compressed) {
- GLuint alignment = intel_compressed_alignment(dst->internal_format);
+ GLuint align_w, align_h;
+
+ intel_get_texture_alignment_unit(dst->internal_format, &align_w, &align_h);
height = (height + 3) / 4;
- width = ((width + alignment - 1) & ~(alignment - 1));
+ width = ALIGN(width, align_w);
}
for (i = 0; i < depth; i++) {