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| author | Eric Anholt <eric@anholt.net> | 2011-01-05 17:02:08 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2011-01-05 18:23:54 -0800 |
| commit | 7ce6517f3ac41bf770ab39aba4509d4f535ef663 (patch) | |
| tree | 3563dc5da10a71f71981a0ceb5fdbd00b37a1f79 /src/mesa/drivers/dri/intel/intel_tex.h | |
| parent | 01b70c06284f3a0ab2de61228b73c78ed00a1a14 (diff) | |
| download | external_mesa3d-7ce6517f3ac41bf770ab39aba4509d4f535ef663.zip external_mesa3d-7ce6517f3ac41bf770ab39aba4509d4f535ef663.tar.gz external_mesa3d-7ce6517f3ac41bf770ab39aba4509d4f535ef663.tar.bz2 | |
intel: Always allocate miptrees from level 0, not tObj->BaseLevel.
BaseLevel/MaxLevel are mostly used for two things: clamping texture
access for FBO rendering, and limiting the used mipmap levels when
incrementally loading textures. By restricting our mipmap trees to
just the current BaseLevel/MaxLevel, we caused reallocation thrashing
in the common case, for a theoretical win if someone really did want
just levels 2..4 or whatever of their texture object.
Bug #30366
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_tex.h')
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex.h b/src/mesa/drivers/dri/intel/intel_tex.h index 6552ed0..7c76bd4 100644 --- a/src/mesa/drivers/dri/intel/intel_tex.h +++ b/src/mesa/drivers/dri/intel/intel_tex.h @@ -65,4 +65,10 @@ void intel_tex_unmap_images(struct intel_context *intel, int intel_compressed_num_bytes(GLuint mesaFormat); +struct intel_mipmap_tree * +intel_miptree_create_for_teximage(struct intel_context *intel, + struct intel_texture_object *intelObj, + struct intel_texture_image *intelImage, + GLboolean expect_accelerated_upload); + #endif |