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author | Eric Anholt <eric@anholt.net> | 2009-09-02 11:33:08 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2009-09-02 12:20:00 -0700 |
commit | 82313eed01b191320721dab63d353a1634f89231 (patch) | |
tree | 9f43e2dc586998072c80e792728778c5543f33cd /src/mesa/drivers/dri/intel | |
parent | aecba6b1c8c6a82018183460450f5a4bf53d02ce (diff) | |
download | external_mesa3d-82313eed01b191320721dab63d353a1634f89231.zip external_mesa3d-82313eed01b191320721dab63d353a1634f89231.tar.gz external_mesa3d-82313eed01b191320721dab63d353a1634f89231.tar.bz2 |
intel: Sync a synchronized READ_BIT map buffer range with GL drawing to it.
It's probably uncommon, but would obviously have gone wrong.
Diffstat (limited to 'src/mesa/drivers/dri/intel')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_buffer_objects.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_buffer_objects.c b/src/mesa/drivers/dri/intel/intel_buffer_objects.c index b7e50b0..b8a0363 100644 --- a/src/mesa/drivers/dri/intel/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.c @@ -318,7 +318,7 @@ intel_bufferobj_map_range(GLcontext * ctx, * the batchbuffer so that GEM knows about the buffer access for later * syncing. */ - if ((access & GL_MAP_WRITE_BIT) && !(access & GL_MAP_UNSYNCHRONIZED_BIT)) + if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) intelFlush(ctx); if (intel_obj->buffer == NULL) { |