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| author | Roland Scheidegger <rscheidegger@gmx.ch> | 2005-03-15 22:23:29 +0000 |
|---|---|---|
| committer | Roland Scheidegger <rscheidegger@gmx.ch> | 2005-03-15 22:23:29 +0000 |
| commit | fbe5296d1463e1052590b744f3d62ebb9e5d5dd4 (patch) | |
| tree | 23ab4a2986fb2451614e9549845096671be0ca1a /src/mesa/drivers/dri/r200/r200_sanity.c | |
| parent | 75417943737d49670dd4fbc600cd05dc29e2ba51 (diff) | |
| download | external_mesa3d-fbe5296d1463e1052590b744f3d62ebb9e5d5dd4.zip external_mesa3d-fbe5296d1463e1052590b744f3d62ebb9e5d5dd4.tar.gz external_mesa3d-fbe5296d1463e1052590b744f3d62ebb9e5d5dd4.tar.bz2 | |
add support for user-configurable brilinear filtering on r200
Diffstat (limited to 'src/mesa/drivers/dri/r200/r200_sanity.c')
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_sanity.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c index a950b36..79d0f3c 100644 --- a/src/mesa/drivers/dri/r200/r200_sanity.c +++ b/src/mesa/drivers/dri/r200/r200_sanity.c @@ -150,6 +150,7 @@ static struct { { RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0" }, { RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2" }, { RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0" }, + { R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF" }, }; struct reg_names { @@ -475,11 +476,13 @@ static struct reg_names reg_names[] = { { R200_RB3D_CBLENDCNTL, "R200_RB3D_CBLENDCNTL" }, { R200_SE_TCL_OUTPUT_VTX_COMP_SEL, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" }, { R200_PP_CNTL_X, "R200_PP_CNTL_X" }, - { R200_SE_VAP_CNTL_STATUS, "R200_SE_VAP_CNTL_STATUS" }, + { R200_SE_VAP_CNTL_STATUS, "R200_SE_VAP_CNTL_STATUS" }, { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3" }, + { R200_PP_TRI_PERF, "R200_PP_TRI_PERF" }, + { R200_PP_PERF_CNTL, "R200_PP_PERF_CNTL" }, }; static struct reg_names scalar_names[] = { |