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| author | Mathias Fröhlich <mathias.froehlich@web.de> | 2016-05-22 14:10:19 +0200 |
|---|---|---|
| committer | Mathias Fröhlich <mathias.froehlich@web.de> | 2016-06-16 05:50:54 +0200 |
| commit | a0fe569e53f779b5a8497ff669c1b277d1c13796 (patch) | |
| tree | 0006168aa0b42da9ca86fb72fbfff4de2a56450e /src/mesa/drivers/dri/radeon | |
| parent | dc9e604ef16ee19cf7480325100e6edd768dbb16 (diff) | |
| download | external_mesa3d-a0fe569e53f779b5a8497ff669c1b277d1c13796.zip external_mesa3d-a0fe569e53f779b5a8497ff669c1b277d1c13796.tar.gz external_mesa3d-a0fe569e53f779b5a8497ff669c1b277d1c13796.tar.bz2 | |
radeon/r200: Use bitmask/ffs to iterate enabled clip planes.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
| -rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 93bc0f9..c6b1f38 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1134,18 +1134,17 @@ static void radeonClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat static void radeonUpdateClipPlanes( struct gl_context *ctx ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); - GLuint p; + GLbitfield mask = ctx->Transform.ClipPlanesEnabled; - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; + while (mask) { + const int p = u_bit_scan(&mask); + GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; - RADEON_STATECHANGE( rmesa, ucp[p] ); - rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; - rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; - rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; - rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; - } + RADEON_STATECHANGE( rmesa, ucp[p] ); + rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; + rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; + rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; + rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; } } |