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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-11-25 09:59:03 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-14 14:24:57 -0700 |
| commit | 240d16ea94834eb2472e91fd4856381951a07007 (patch) | |
| tree | 21dcd42a6de3f9572934d8d4370316a1fead5310 /src/mesa/drivers/dri | |
| parent | bb4cdee9a4dbda40c0e330aef0bbcaf749b7ffab (diff) | |
| download | external_mesa3d-240d16ea94834eb2472e91fd4856381951a07007.zip external_mesa3d-240d16ea94834eb2472e91fd4856381951a07007.tar.gz external_mesa3d-240d16ea94834eb2472e91fd4856381951a07007.tar.bz2 | |
i965/fs: Use UD type for offsets in VARYING_PULL_CONSTANT_LOAD
Reveiewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 954f782..944ad4d 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -174,7 +174,7 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, * CSE can later notice that those loads are all the same and eliminate * the redundant ones. */ - fs_reg vec4_offset = vgrf(glsl_type::int_type); + fs_reg vec4_offset = vgrf(glsl_type::uint_type); bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf)); int scale = 1; diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 9b92968..698894b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -2679,7 +2679,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr assert(const_offset->u32[0] % 4 == 0); src.reg_offset = const_offset->u32[0] / 4; } else { - src.reladdr = new(mem_ctx) fs_reg(get_nir_src(instr->src[0])); + src.reladdr = new(mem_ctx) fs_reg(retype(get_nir_src(instr->src[0]), + BRW_REGISTER_TYPE_UD)); } for (unsigned j = 0; j < instr->num_components; j++) { @@ -2718,7 +2719,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); if (const_offset == NULL) { fs_reg base_offset = retype(get_nir_src(instr->src[1]), - BRW_REGISTER_TYPE_D); + BRW_REGISTER_TYPE_UD); for (int i = 0; i < instr->num_components; i++) VARYING_PULL_CONSTANT_LOAD(bld, offset(dest, bld, i), surf_index, |