diff options
author | Michal Krol <michal@vmware.com> | 2009-09-25 18:51:55 +0200 |
---|---|---|
committer | Michal Krol <michal@vmware.com> | 2009-09-25 18:51:55 +0200 |
commit | 02b81187dcf606ebf064ac23888e5c57d0528edf (patch) | |
tree | b03295f278a07d5fab9f47b3e2cb5024d37dff47 /src/mesa/drivers | |
parent | ecf3091cc78638919f1977ccc0307c51b6731385 (diff) | |
download | external_mesa3d-02b81187dcf606ebf064ac23888e5c57d0528edf.zip external_mesa3d-02b81187dcf606ebf064ac23888e5c57d0528edf.tar.gz external_mesa3d-02b81187dcf606ebf064ac23888e5c57d0528edf.tar.bz2 |
radeon: Fix newlines.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/r600/r700_chip.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index e3b8a40..3b7f6ff 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -255,20 +255,20 @@ static void r700SetupVTXConstants2(GLcontext * ctx, SQ_VTX_CONSTANT_WORD2_0__DATA_FORMAT_shift, SQ_VTX_CONSTANT_WORD2_0__DATA_FORMAT_mask); /* TODO : trace back api for initial data type, not only GL_FLOAT */ - if(GL_TRUE == pStreamDesc->normalize)
- {
- SETfield(uSQ_VTX_CONSTANT_WORD2_0, SQ_NUM_FORMAT_NORM,
- SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_shift, SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_mask);
- }
- //else
- //{
- // SETfield(uSQ_VTX_CONSTANT_WORD2_0, SQ_NUM_FORMAT_INT,
- // SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_shift, SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_mask);
- //}
-
- if(1 == pStreamDesc->_signed)
- {
- SETbit(uSQ_VTX_CONSTANT_WORD2_0, SQ_VTX_CONSTANT_WORD2_0__FORMAT_COMP_ALL_bit);
+ if(GL_TRUE == pStreamDesc->normalize) + { + SETfield(uSQ_VTX_CONSTANT_WORD2_0, SQ_NUM_FORMAT_NORM, + SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_shift, SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_mask); + } + //else + //{ + // SETfield(uSQ_VTX_CONSTANT_WORD2_0, SQ_NUM_FORMAT_INT, + // SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_shift, SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_mask); + //} + + if(1 == pStreamDesc->_signed) + { + SETbit(uSQ_VTX_CONSTANT_WORD2_0, SQ_VTX_CONSTANT_WORD2_0__FORMAT_COMP_ALL_bit); } SETfield(uSQ_VTX_CONSTANT_WORD3_0, 1, MEM_REQUEST_SIZE_shift, MEM_REQUEST_SIZE_mask); |