i965: Add GS support to INTEL_DEBUG=shader_time.

Previously, time spent in geometry shaders would be counted as part of
the vertex shader time.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

8 files changed, 37 insertions, 10 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 6a0cebe..0c4c021 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -783,6 +783,9 @@ enum shader_time_shader_type {
    ST_VS,
    ST_VS_WRITTEN,
    ST_VS_RESET,
+   ST_GS,
+   ST_GS_WRITTEN,
+   ST_GS_RESET,
    ST_FS8,
    ST_FS8_WRITTEN,
    ST_FS8_RESET,
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index abfc921..a6a2403 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -288,7 +288,7 @@ get_written_and_reset(struct brw_context *brw, int i,
                       uint64_t *written, uint64_t *reset)
 {
    enum shader_time_shader_type type = brw->shader_time.types[i];
-   assert(type == ST_VS || type == ST_FS8 || type == ST_FS16);
+   assert(type == ST_VS || type == ST_GS || type == ST_FS8 || type == ST_FS16);
 
    /* Find where we recorded written and reset. */
    int wi, ri;
@@ -340,6 +340,8 @@ brw_report_shader_time(struct brw_context *brw)
       switch (type) {
       case ST_VS_WRITTEN:
       case ST_VS_RESET:
+      case ST_GS_WRITTEN:
+      case ST_GS_RESET:
       case ST_FS8_WRITTEN:
       case ST_FS8_RESET:
       case ST_FS16_WRITTEN:
@@ -349,6 +351,7 @@ brw_report_shader_time(struct brw_context *brw)
          continue;
 
       case ST_VS:
+      case ST_GS:
       case ST_FS8:
       case ST_FS16:
          get_written_and_reset(brw, i, &written, &reset);
@@ -372,6 +375,7 @@ brw_report_shader_time(struct brw_context *brw)
 
       switch (type) {
       case ST_VS:
+      case ST_GS:
       case ST_FS8:
       case ST_FS16:
          total_by_type[type] += scaled[i];
@@ -432,6 +436,9 @@ brw_report_shader_time(struct brw_context *brw)
       case ST_VS:
          stage = "vs";
          break;
+      case ST_GS:
+         stage = "gs";
+         break;
       case ST_FS8:
          stage = "fs8";
          break;
@@ -449,6 +456,7 @@ brw_report_shader_time(struct brw_context *brw)
 
    printf("\n");
    print_shader_time_line("total", "vs", -1, total_by_type[ST_VS], total);
+   print_shader_time_line("total", "gs", -1, total_by_type[ST_GS], total);
    print_shader_time_line("total", "fs8", -1, total_by_type[ST_FS8], total);
    print_shader_time_line("total", "fs16", -1, total_by_type[ST_FS16], total);
 }
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index d4ed820..2a0cb13 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1494,10 +1494,10 @@ vec4_visitor::emit_shader_time_end()
     */
    emit(ADD(diff, src_reg(diff), src_reg(-2u)));
 
-   emit_shader_time_write(ST_VS, src_reg(diff));
-   emit_shader_time_write(ST_VS_WRITTEN, src_reg(1u));
+   emit_shader_time_write(st_base, src_reg(diff));
+   emit_shader_time_write(st_written, src_reg(1u));
    emit(BRW_OPCODE_ELSE);
-   emit_shader_time_write(ST_VS_RESET, src_reg(1u));
+   emit_shader_time_write(st_reset, src_reg(1u));
    emit(BRW_OPCODE_ENDIF);
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 71aaf1a..4a5b577 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -232,7 +232,10 @@ public:
 		struct brw_shader *shader,
 		void *mem_ctx,
                 bool debug_flag,
-                bool no_spills);
+                bool no_spills,
+                shader_time_shader_type st_base,
+                shader_time_shader_type st_written,
+                shader_time_shader_type st_reset);
    ~vec4_visitor();
 
    dst_reg dst_null_f()
@@ -548,6 +551,10 @@ private:
     * If true, then register allocation should fail instead of spilling.
     */
    const bool no_spills;
+
+   const shader_time_shader_type st_base;
+   const shader_time_shader_type st_written;
+   const shader_time_shader_type st_reset;
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index f0351ea..40743cc 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -41,7 +41,8 @@ vec4_gs_visitor::vec4_gs_visitor(struct brw_context *brw,
                                  bool no_spills)
    : vec4_visitor(brw, &c->base, &c->gp->program.Base, &c->key.base,
                   &c->prog_data.base, prog, shader, mem_ctx,
-                  INTEL_DEBUG & DEBUG_GS, no_spills),
+                  INTEL_DEBUG & DEBUG_GS, no_spills,
+                  ST_GS, ST_GS_WRITTEN, ST_GS_RESET),
      c(c)
 {
 }
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index f6dc3a8..76b24ad 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3283,13 +3283,19 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
 			   struct brw_shader *shader,
 			   void *mem_ctx,
                            bool debug_flag,
-                           bool no_spills)
+                           bool no_spills,
+                           shader_time_shader_type st_base,
+                           shader_time_shader_type st_written,
+                           shader_time_shader_type st_reset)
    : sanity_param_count(0),
      fail_msg(NULL),
      first_non_payload_grf(0),
      need_all_constants_in_pull_buffer(false),
      debug_flag(debug_flag),
-     no_spills(no_spills)
+     no_spills(no_spills),
+     st_base(st_base),
+     st_written(st_written),
+     st_reset(st_reset)
 {
    this->brw = brw;
    this->ctx = &brw->ctx;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
index 0146cf9..6bfbf93 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
@@ -215,7 +215,8 @@ vec4_vs_visitor::vec4_vs_visitor(struct brw_context *brw,
                                  void *mem_ctx)
    : vec4_visitor(brw, &vs_compile->base, &vs_compile->vp->program.Base,
                   &vs_compile->key.base, &vs_prog_data->base, prog, shader,
-                  mem_ctx, INTEL_DEBUG & DEBUG_VS, false /* no_spills */),
+                  mem_ctx, INTEL_DEBUG & DEBUG_VS, false /* no_spills */,
+                  ST_VS, ST_VS_WRITTEN, ST_VS_RESET),
      vs_compile(vs_compile),
      vs_prog_data(vs_prog_data)
 {
diff --git a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp
index 83d931c..4e971b5 100644
--- a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp
+++ b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp
@@ -49,7 +49,8 @@ public:
    register_coalesce_vec4_visitor(struct brw_context *brw,
                                   struct gl_shader_program *shader_prog)
       : vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog, NULL, NULL,
-                     false, false /* no_spills */)
+                     false, false /* no_spills */,
+                     ST_NONE, ST_NONE, ST_NONE)
    {
    }