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author | Eric Anholt <eric@anholt.net> | 2014-02-20 18:23:52 -0800 |
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committer | Eric Anholt <eric@anholt.net> | 2014-02-22 19:23:21 -0800 |
commit | f28c9208652143b4925bd97ce9823728c34d34a5 (patch) | |
tree | 9190b65ce54f3946796f020effcfd43abe1e6cd3 /src/mesa/drivers | |
parent | 9ac9d133ed3d675a0c4cb527fb643ca590fe7d78 (diff) | |
download | external_mesa3d-f28c9208652143b4925bd97ce9823728c34d34a5.zip external_mesa3d-f28c9208652143b4925bd97ce9823728c34d34a5.tar.gz external_mesa3d-f28c9208652143b4925bd97ce9823728c34d34a5.tar.bz2 |
i965: Refactor debug dumping of GLSL IR.
This was only going to get worse when tesselation shows up, and was
causing too much extra duplication in my stderr changes coming up.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 13 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 18 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.h | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 13 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 7 |
5 files changed, 29 insertions, 27 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index e1a7d2d..109c7dc 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -3519,17 +3519,8 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c, if (prog) shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; - if (unlikely(INTEL_DEBUG & DEBUG_WM)) { - if (prog) { - printf("GLSL IR for native fragment shader %d:\n", prog->Name); - _mesa_print_ir(shader->base.ir, NULL); - printf("\n\n"); - } else { - printf("ARB_fragment_program %d ir for native fragment shader\n", - fp->Base.Id); - _mesa_print_program(&fp->Base); - } - } + if (unlikely(INTEL_DEBUG & DEBUG_WM)) + brw_dump_ir(brw, "fragment", prog, &shader->base, &fp->Base); /* Now the main event: Visit the shader IR and generate our FS IR for it. */ diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 2145d7b..43d29fd 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -34,10 +34,12 @@ #include "main/enums.h" #include "main/shaderobj.h" #include "program/prog_parameter.h" +#include "program/prog_print.h" #include "program/program.h" #include "program/programopt.h" #include "tnl/tnl.h" #include "glsl/ralloc.h" +#include "glsl/ir.h" #include "brw_context.h" #include "brw_wm.h" @@ -583,3 +585,19 @@ brw_stage_prog_data_free(const void *p) ralloc_free(prog_data->param); ralloc_free(prog_data->pull_param); } + +void +brw_dump_ir(struct brw_context *brw, const char *stage, + struct gl_shader_program *shader_prog, + struct gl_shader *shader, struct gl_program *prog) +{ + if (shader_prog) { + printf("GLSL IR for native %s shader %d:\n", stage, shader_prog->Name); + _mesa_print_ir(shader->ir, NULL); + printf("\n\n"); + } else { + printf("ARB_%s_program %d ir for native %s shader\n", + stage, prog->Id, stage); + _mesa_print_program(prog); + } +} diff --git a/src/mesa/drivers/dri/i965/brw_program.h b/src/mesa/drivers/dri/i965/brw_program.h index 59f628b..2956dba 100644 --- a/src/mesa/drivers/dri/i965/brw_program.h +++ b/src/mesa/drivers/dri/i965/brw_program.h @@ -87,6 +87,11 @@ brw_stage_prog_data_compare(const struct brw_stage_prog_data *a, void brw_stage_prog_data_free(const void *prog_data); +void +brw_dump_ir(struct brw_context *brw, const char *stage, + struct gl_shader_program *shader_prog, + struct gl_shader *shader, struct gl_program *prog); + #ifdef __cplusplus } /* extern "C" */ #endif diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 3c9631f..8dda348 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1663,17 +1663,8 @@ brw_vs_emit(struct brw_context *brw, if (prog) shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX]; - if (unlikely(INTEL_DEBUG & DEBUG_VS)) { - if (prog) { - printf("GLSL IR for native vertex shader %d:\n", prog->Name); - _mesa_print_ir(shader->base.ir, NULL); - printf("\n\n"); - } else { - printf("ARB_vertex_program %d for native vertex shader\n", - c->vp->program.Base.Id); - _mesa_print_program(&c->vp->program.Base); - } - } + if (unlikely(INTEL_DEBUG & DEBUG_VS)) + brw_dump_ir(brw, "vertex", prog, &shader->base, &c->vp->program.Base); vec4_vs_visitor v(brw, c, prog_data, prog, shader, mem_ctx); if (!v.run()) { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index 0a2d8ff..92b2e8d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -588,11 +588,8 @@ brw_gs_emit(struct brw_context *brw, struct brw_shader *shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; - if (unlikely(INTEL_DEBUG & DEBUG_GS)) { - printf("GLSL IR for native geometry shader %d:\n", prog->Name); - _mesa_print_ir(shader->base.ir, NULL); - printf("\n\n"); - } + if (unlikely(INTEL_DEBUG & DEBUG_GS)) + brw_dump_ir(brw, "geometry", prog, &shader->base, NULL); /* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do * so without spilling. If the GS invocations count > 1, then we can't use |