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author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-10-07 12:49:36 +0200 |
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committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-10-12 18:50:10 +0200 |
commit | f5f3cadca3809952288e3726ed5fde22090dc61d (patch) | |
tree | 101c49d3f9b8710e2b93ee3cd78a2c16afa99740 /src/mesa/state_tracker | |
parent | 957d5410892aa7b12bb19fe081a7073861b424a6 (diff) | |
download | external_mesa3d-f5f3cadca3809952288e3726ed5fde22090dc61d.zip external_mesa3d-f5f3cadca3809952288e3726ed5fde22090dc61d.tar.gz external_mesa3d-f5f3cadca3809952288e3726ed5fde22090dc61d.tar.bz2 |
st/glsl_to_tgsi: simpler fixup of empty writemasks
Empty writemasks mean "copy everything", so we can always just use the number
of vector elements (which uses the GLSL meaning here, i.e. each double is a
single element/writemask bit).
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'src/mesa/state_tracker')
-rw-r--r-- | src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 37 |
1 files changed, 10 insertions, 27 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index da7b83b..6a63e5c 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -2842,33 +2842,7 @@ glsl_to_tgsi_visitor::visit(ir_assignment *ir) l = get_assignment_lhs(ir->lhs, this); - /* FINISHME: This should really set to the correct maximal writemask for each - * FINISHME: component written (in the loops below). This case can only - * FINISHME: occur for matrices, arrays, and structures. - */ - if (ir->write_mask == 0) { - assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); - - if (ir->lhs->type->is_array() || ir->lhs->type->without_array()->is_matrix()) { - if (ir->lhs->type->without_array()->is_64bit()) { - switch (ir->lhs->type->without_array()->vector_elements) { - case 1: - l.writemask = WRITEMASK_X; - break; - case 2: - l.writemask = WRITEMASK_XY; - break; - case 3: - l.writemask = WRITEMASK_XYZ; - break; - case 4: - l.writemask = WRITEMASK_XYZW; - break; - } - } else - l.writemask = WRITEMASK_XYZW; - } - } else { + { int swizzles[4]; int first_enabled_chan = 0; int rhs_chan = 0; @@ -2887,6 +2861,15 @@ glsl_to_tgsi_visitor::visit(ir_assignment *ir) assert(variable->data.location == FRAG_RESULT_STENCIL); l.writemask = WRITEMASK_Y; } + } else if (ir->write_mask == 0) { + assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); + + if (ir->lhs->type->is_array() || ir->lhs->type->is_matrix()) { + unsigned num_elements = ir->lhs->type->without_array()->vector_elements; + l.writemask = u_bit_consecutive(0, num_elements); + } else { + l.writemask = WRITEMASK_XYZW; + } } else { l.writemask = ir->write_mask; } |