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| author | Kenneth Graunke <kenneth@whitecape.org> | 2016-04-08 18:49:22 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2016-04-25 11:45:15 -0700 |
| commit | 4e2d22c5a723f8a52ede916d170f4aa9a4f96fbb (patch) | |
| tree | 985b46044a4f6fa0a4adad8f648ea308064961e8 /src/mesa | |
| parent | 501bedffa650c7d340d8f716736f6333c1317b34 (diff) | |
| download | external_mesa3d-4e2d22c5a723f8a52ede916d170f4aa9a4f96fbb.zip external_mesa3d-4e2d22c5a723f8a52ede916d170f4aa9a4f96fbb.tar.gz external_mesa3d-4e2d22c5a723f8a52ede916d170f4aa9a4f96fbb.tar.bz2 | |
i965: Mark URB reads as volatile.
They can be affected by URB writes.
In the upcoming scalar TCS backend, this prevents read-modify-write
cycles from being broken by CSE removing reads.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index b3aade1..d9e654c 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -961,6 +961,9 @@ backend_instruction::is_volatile() const case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL: case SHADER_OPCODE_TYPED_SURFACE_READ: case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL: + case SHADER_OPCODE_URB_READ_SIMD8: + case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: + case VEC4_OPCODE_URB_READ: return true; default: return false; |