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authorJason Ekstrand <jason.ekstrand@intel.com>2016-04-21 16:19:51 -0700
committerJason Ekstrand <jason.ekstrand@intel.com>2016-04-26 14:55:22 -0700
commita543f741bf33e4632d4d43b797bdcd0e04c7983f (patch)
treed369c230a161d29dcc627bd547beff6b0d3f6b42 /src/mesa
parent38399364978f5576aae71a70d735b4d1b3a8e4dc (diff)
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i965/blorp: Roll mip_info into surface_info
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp26
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h28
2 files changed, 17 insertions, 37 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 204cc56..82f9468 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -30,27 +30,25 @@
#define FILE_DEBUG_FLAG DEBUG_BLORP
-brw_blorp_mip_info::brw_blorp_mip_info()
+brw_blorp_surface_info::brw_blorp_surface_info()
: mt(NULL),
level(0),
layer(0),
width(0),
height(0),
x_offset(0),
- y_offset(0)
-{
-}
-
-brw_blorp_surface_info::brw_blorp_surface_info()
- : map_stencil_as_y_tiled(false),
+ y_offset(0),
+ map_stencil_as_y_tiled(false),
num_samples(0),
swizzle(SWIZZLE_XYZW)
{
}
void
-brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer)
+brw_blorp_surface_info::set(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ unsigned int level, unsigned int layer,
+ mesa_format format, bool is_render_target)
{
/* Layer is a physical layer, so if this is a 2D multisample array texture
* using INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, then it had better
@@ -70,15 +68,7 @@ brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
this->height = minify(mt->physical_height0, level - mt->first_level);
intel_miptree_get_image_offset(mt, level, layer, &x_offset, &y_offset);
-}
-void
-brw_blorp_surface_info::set(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer,
- mesa_format format, bool is_render_target)
-{
- brw_blorp_mip_info::set(mt, level, layer);
this->num_samples = mt->num_samples;
this->array_layout = mt->array_layout;
this->map_stencil_as_y_tiled = false;
@@ -312,7 +302,7 @@ gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
params.hiz_op = op;
- params.depth.set(mt, level, layer);
+ params.depth.set(brw, mt, level, layer, mt->format, true);
/* Align the rectangle primitive to 8x4 pixels.
*
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 60750d3..191ccbb 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -69,14 +69,17 @@ enum {
BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
};
-
-class brw_blorp_mip_info
+class brw_blorp_surface_info
{
public:
- brw_blorp_mip_info();
+ brw_blorp_surface_info();
+
+ void set(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ unsigned int level, unsigned int layer,
+ mesa_format format, bool is_render_target);
- void set(struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer);
+ uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
struct intel_mipmap_tree *mt;
@@ -121,19 +124,6 @@ public:
* pixels.
*/
uint32_t y_offset;
-};
-
-class brw_blorp_surface_info : public brw_blorp_mip_info
-{
-public:
- brw_blorp_surface_info();
-
- void set(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer,
- mesa_format format, bool is_render_target);
-
- uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
/* Setting this flag indicates that the buffer's contents are W-tiled
* stencil data, but the surface state should be set up for Y tiled
@@ -238,7 +228,7 @@ public:
uint32_t y0;
uint32_t x1;
uint32_t y1;
- brw_blorp_mip_info depth;
+ brw_blorp_surface_info depth;
uint32_t depth_format;
brw_blorp_surface_info src;
brw_blorp_surface_info dst;