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| author | Marius Predut <marius.predut@intel.com> | 2015-04-23 18:41:14 +0300 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2015-05-05 11:44:37 -0700 |
| commit | a9b04d8a0d96922a49ac7eb1b91b3a376a959f64 (patch) | |
| tree | 5775bdaaf665c89f0db9ee95a9d9d626f56c03f7 /src/mesa | |
| parent | 6da2d7188866ddc8e461004dfae4332071ec3015 (diff) | |
| download | external_mesa3d-a9b04d8a0d96922a49ac7eb1b91b3a376a959f64.zip external_mesa3d-a9b04d8a0d96922a49ac7eb1b91b3a376a959f64.tar.gz external_mesa3d-a9b04d8a0d96922a49ac7eb1b91b3a376a959f64.tar.bz2 | |
i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_sf_state.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c index ea5c47a..e445ce2 100644 --- a/src/mesa/drivers/dri/i965/gen6_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c @@ -367,9 +367,25 @@ upload_sf_state(struct brw_context *brw) float line_width = roundf(CLAMP(ctx->Line.Width, 0.0, ctx->Const.MaxLineWidth)); uint32_t line_width_u3_7 = U_FIXED(line_width, 7); - /* TODO: line width of 0 is not allowed when MSAA enabled */ - if (line_width_u3_7 == 0) - line_width_u3_7 = 1; + + /* Line width of 0 is not allowed when MSAA enabled */ + if (ctx->Multisample._Enabled) { + if (line_width_u3_7 == 0) + line_width_u3_7 = 1; + } else if (ctx->Line.SmoothFlag && ctx->Line.Width < 1.5) { + /* For 1 pixel line thickness or less, the general + * anti-aliasing algorithm gives up, and a garbage line is + * generated. Setting a Line Width of 0.0 specifies the + * rasterization of the "thinnest" (one-pixel-wide), + * non-antialiased lines. + * + * Lines rendered with zero Line Width are rasterized using + * Grid Intersection Quantization rules as specified by + * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line + * Rasterization. + */ + line_width_u3_7 = 0; + } dw3 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT; } if (ctx->Line.SmoothFlag) { |