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| author | Kenneth Graunke <kenneth@whitecape.org> | 2016-02-24 21:36:15 -0800 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2016-02-26 15:55:59 -0800 |
| commit | dcd4a841e9096b988ea3ca2779e7c8b1ca5e5747 (patch) | |
| tree | 13e1f6f30630ed5bd23ba863da877530e2b0e587 /src/mesa | |
| parent | fa7135107f462fad8cda4731c037e393041e9369 (diff) | |
| download | external_mesa3d-dcd4a841e9096b988ea3ca2779e7c8b1ca5e5747.zip external_mesa3d-dcd4a841e9096b988ea3ca2779e7c8b1ca5e5747.tar.gz external_mesa3d-dcd4a841e9096b988ea3ca2779e7c8b1ca5e5747.tar.bz2 | |
i965: Always do NIR IO lowering at specialization time.
We've now hit literally every case other than geometry shaders (and
compute shaders, but those are a no-op). So, let's just move geometry
shaders over too and be done with it.
The only advantage to doing this at link time was to save the expense
of running the pass on recompiles. But we're already running a lot of
passes, and the extra code complexity isn't worth it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_nir.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 1 |
2 files changed, 1 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index 61acf38..efa4c48 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -598,7 +598,6 @@ brw_create_nir(struct brw_context *brw, bool is_scalar) { struct gl_context *ctx = &brw->ctx; - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; const nir_shader_compiler_options *options = ctx->Const.ShaderCompilerOptions[stage].NirOptions; bool progress; @@ -625,13 +624,6 @@ brw_create_nir(struct brw_context *brw, OPT_V(nir_lower_atomics, shader_prog); } - if (nir->stage != MESA_SHADER_VERTEX && - nir->stage != MESA_SHADER_TESS_CTRL && - nir->stage != MESA_SHADER_TESS_EVAL && - nir->stage != MESA_SHADER_FRAGMENT) { - nir = brw_nir_lower_io(nir, devinfo, is_scalar, false, NULL); - } - return nir; } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index 183fe35..40966c6 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -598,6 +598,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, is_scalar); + shader = brw_nir_lower_io(shader, compiler->devinfo, is_scalar, false, NULL); shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar); prog_data->include_primitive_id = |