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authorIlia Mirkin <imirkin@alum.mit.edu>2015-11-06 17:58:42 -0500
committerIlia Mirkin <imirkin@alum.mit.edu>2015-11-06 18:13:31 -0500
commit2437f0085372355980864454964749ac8231ca44 (patch)
tree2eb80b9d31274c910f8e658342afa9ce7962f8b7 /src
parent11e3dac36e7b992e30efbce4473451c4e1ac617f (diff)
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nv50/ir: disallow 64-bit immediates on nv50 targets
No instructions are able to load short immediates like nvc0 can. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index f3ddcaa..94cf0f0 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -343,7 +343,7 @@ TargetNV50::insnCanLoad(const Instruction *i, int s,
}
if (sf == FILE_IMMEDIATE)
- return true;
+ return ldSize <= 4;
// Check if memory access is encodable: