i965: Make the brw_inst helpers take a device_info instead of a context

Reviewed-by: Matt Turner <mattst88@gmail.com>

16 files changed, 1006 insertions, 995 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index 3b8af58..070adba 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -158,9 +158,9 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
    if (brw->has_negative_rhw_bug) {
       brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
               brw_imm_ud(1<<20));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
       brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
    }
 
    /* Set the initial vertex source mask: The first 6 planes are the bounds
@@ -177,12 +177,12 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
       /* if (planemask & 1)
        */
       brw_AND(p, v1_null_ud, c->reg.planemask, brw_imm_ud(1));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
 
       brw_IF(p, BRW_EXECUTE_1);
       {
          brw_AND(p, v1_null_ud, c->reg.vertex_src_mask, brw_imm_ud(1));
-         brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+         brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
          brw_IF(p, BRW_EXECUTE_1);
          {
             /* user clip distance: just fetch the correct float from each vertex */
@@ -228,7 +228,8 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
 
              brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
              brw_MOV(p, c->reg.t1, c->reg.t);
-             brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+             brw_inst_set_pred_control(p->devinfo, brw_last_inst,
+                                       BRW_PREDICATE_NORMAL);
 	 }
 	 brw_ELSE(p);
 	 {
@@ -250,7 +251,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
 
                  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
                  brw_MOV(p, c->reg.t0, c->reg.t);
-                 brw_inst_set_pred_control(brw, brw_last_inst,
+                 brw_inst_set_pred_control(p->devinfo, brw_last_inst,
                                            BRW_PREDICATE_NORMAL);
              }
 
@@ -269,14 +270,14 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
       /* while (planemask>>=1) != 0
        */
       brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
       brw_SHR(p, c->reg.vertex_src_mask, c->reg.vertex_src_mask, brw_imm_ud(1));
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
       brw_ADD(p, c->reg.clipdistance_offset, c->reg.clipdistance_offset, brw_imm_w(sizeof(float)));
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
    }
    brw_WHILE(p);
-   brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+   brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
    brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1);
    brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index 2227a65..d4babc9 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -235,11 +235,10 @@ load_clip_distance(struct brw_clip_compile *c, struct brw_indirect vtx,
                 struct brw_reg dst, GLuint hpos_offset, int cond)
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
 
    dst = vec4(dst);
    brw_AND(p, vec1(brw_null_reg()), c->reg.vertex_src_mask, brw_imm_ud(1));
-   brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+   brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
    brw_IF(p, BRW_EXECUTE_1);
    {
       struct brw_indirect temp_ptr = brw_indirect(7, 0);
@@ -262,7 +261,6 @@ load_clip_distance(struct brw_clip_compile *c, struct brw_indirect vtx,
 void brw_clip_tri( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
    struct brw_indirect vtx = brw_indirect(0, 0);
    struct brw_indirect vtxPrev = brw_indirect(1, 0);
    struct brw_indirect vtxOut = brw_indirect(2, 0);
@@ -296,7 +294,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
       /* if (planemask & 1)
        */
       brw_AND(p, vec1(brw_null_reg()), c->reg.planemask, brw_imm_ud(1));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
 
       brw_IF(p, BRW_EXECUTE_1);
       {
@@ -339,7 +337,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
 		   */
 		  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
                   brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtxPrev));
-                  brw_inst_set_pred_control(brw, brw_last_inst,
+                  brw_inst_set_pred_control(p->devinfo, brw_last_inst,
                                             BRW_PREDICATE_NORMAL);
 
 		  brw_clip_interp_vertex(c, vtxOut, vtxPrev, vtx, c->reg.t, false);
@@ -381,7 +379,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
 		   */
 		  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
                   brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtx));
-                  brw_inst_set_pred_control(brw, brw_last_inst,
+                  brw_inst_set_pred_control(p->devinfo, brw_last_inst,
                                             BRW_PREDICATE_NORMAL);
 
 		  brw_clip_interp_vertex(c, vtxOut, vtx, vtxPrev, c->reg.t, true);
@@ -408,10 +406,10 @@ void brw_clip_tri( struct brw_clip_compile *c )
 	    /* while (--loopcount != 0)
 	     */
 	    brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
-            brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+            brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
 	 }
 	 brw_WHILE(p);
-         brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+         brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
 	 /* vtxPrev = *(outlist_ptr-1)  OR: outlist[nr_verts-1]
 	  * inlist = outlist
@@ -442,7 +440,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
       /* && (planemask>>=1) != 0
        */
       brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
       brw_SHR(p, c->reg.vertex_src_mask, c->reg.vertex_src_mask, brw_imm_ud(1));
       brw_ADD(p, c->reg.clipdistance_offset, c->reg.clipdistance_offset, brw_imm_w(sizeof(float)));
    }
@@ -455,7 +453,6 @@ void brw_clip_tri( struct brw_clip_compile *c )
 void brw_clip_tri_emit_polygon(struct brw_clip_compile *c)
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
 
    /* for (loopcount = nr_verts-2; loopcount > 0; loopcount--)
     */
@@ -463,7 +460,7 @@ void brw_clip_tri_emit_polygon(struct brw_clip_compile *c)
 	   c->reg.loopcount,
 	   c->reg.nr_verts,
 	   brw_imm_d(-2));
-   brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_G);
+   brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
 
    brw_IF(p, BRW_EXECUTE_1);
    {
@@ -489,10 +486,10 @@ void brw_clip_tri_emit_polygon(struct brw_clip_compile *c)
 	 brw_MOV(p, get_addr_reg(v0), deref_1uw(vptr, 0));
 
 	 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
-         brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+         brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
       }
       brw_WHILE(p);
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
       brw_clip_emit_vue(c, v0, BRW_URB_WRITE_EOT_COMPLETE,
                         ((_3DPRIM_TRIFAN << URB_WRITE_PRIM_TYPE_SHIFT)
@@ -537,7 +534,6 @@ static void brw_clip_test( struct brw_clip_compile *c )
     struct brw_indirect vt2 = brw_indirect(2, 0);
 
     struct brw_compile *p = &c->func;
-    const struct brw_context *brw = p->brw;
     struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
 
     GLuint hpos_offset = brw_varying_to_offset(&c->vue_map,
@@ -563,7 +559,7 @@ static void brw_clip_test( struct brw_clip_compile *c )
     brw_OR(p, tmp0, get_element(t, 0), get_element(t, 1));
     brw_OR(p, tmp0, tmp0, get_element(t, 2));
     brw_AND(p, brw_null_reg(), tmp0, brw_imm_ud(0x1));
-    brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+    brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
     brw_IF(p, BRW_EXECUTE_1);
     {
         brw_clip_kill_thread(c);
@@ -579,15 +575,15 @@ static void brw_clip_test( struct brw_clip_compile *c )
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 0), brw_imm_ud(0));
     brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<5)));
-    brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+    brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 1), brw_imm_ud(0));
     brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<3)));
-    brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+    brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 2), brw_imm_ud(0));
     brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<1)));
-    brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+    brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
     /* test farz, xmax, ymax plane */
     /* clip.xyz > clip.w */
@@ -601,7 +597,7 @@ static void brw_clip_test( struct brw_clip_compile *c )
     brw_OR(p, tmp0, get_element(t, 0), get_element(t, 1));
     brw_OR(p, tmp0, tmp0, get_element(t, 2));
     brw_AND(p, brw_null_reg(), tmp0, brw_imm_ud(0x1));
-    brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+    brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
     brw_IF(p, BRW_EXECUTE_1);
     {
         brw_clip_kill_thread(c);
@@ -617,15 +613,15 @@ static void brw_clip_test( struct brw_clip_compile *c )
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 0), brw_imm_ud(0));
     brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<4)));
-    brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+    brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 1), brw_imm_ud(0));
     brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<2)));
-    brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+    brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 2), brw_imm_ud(0));
     brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<0)));
-    brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+    brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
     release_tmps(c);
 }
@@ -634,7 +630,6 @@ static void brw_clip_test( struct brw_clip_compile *c )
 void brw_emit_tri_clip( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
-   struct brw_context *brw = p->brw;
    brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
    brw_clip_tri_init_vertices(c);
    brw_clip_init_clipmask(c);
@@ -642,10 +637,10 @@ void brw_emit_tri_clip( struct brw_clip_compile *c )
 
    /* if -ve rhw workaround bit is set,
       do cliptest */
-   if (brw->has_negative_rhw_bug) {
+   if (p->devinfo->has_negative_rhw_bug) {
       brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
               brw_imm_ud(1<<20));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
       brw_IF(p, BRW_EXECUTE_1);
       {
          brw_clip_test(c);
diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 82d7b64..3b643f1 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -193,7 +193,6 @@ static void copy_bfc( struct brw_clip_compile *c )
 static void compute_offset( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
    struct brw_reg off = c->reg.offset;
    struct brw_reg dir = c->reg.dir;
 
@@ -208,7 +207,7 @@ static void compute_offset( struct brw_clip_compile *c )
 
    brw_SEL(p, vec1(off),
            brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
-   brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+   brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
    brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
    brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
@@ -218,7 +217,6 @@ static void compute_offset( struct brw_clip_compile *c )
 static void merge_edgeflags( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
    struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
 
    brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
@@ -234,20 +232,20 @@ static void merge_edgeflags( struct brw_clip_compile *c )
    brw_IF(p, BRW_EXECUTE_1);
    {
       brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_EQ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
       brw_MOV(p, byte_offset(c->reg.vertex[0],
                              brw_varying_to_offset(&c->vue_map,
                                                    VARYING_SLOT_EDGE)),
               brw_imm_f(0));
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 
       brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_EQ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
       brw_MOV(p, byte_offset(c->reg.vertex[2],
                              brw_varying_to_offset(&c->vue_map,
                                                    VARYING_SLOT_EDGE)),
               brw_imm_f(0));
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
    }
    brw_ENDIF(p);
 }
@@ -275,7 +273,6 @@ static void emit_lines(struct brw_clip_compile *c,
 		       bool do_offset)
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
    struct brw_indirect v0 = brw_indirect(0, 0);
    struct brw_indirect v1 = brw_indirect(1, 0);
    struct brw_indirect v0ptr = brw_indirect(2, 0);
@@ -295,10 +292,10 @@ static void emit_lines(struct brw_clip_compile *c,
 	 apply_one_offset(c, v0);
 	
 	 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
-         brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_G);
+         brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
       }
       brw_WHILE(p);
-      brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+      brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
    }
 
    /* v1ptr = &inlist[nr_verts]
@@ -334,10 +331,10 @@ static void emit_lines(struct brw_clip_compile *c,
       brw_ENDIF(p);
 
       brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
    }
    brw_WHILE(p);
-   brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+   brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 }
 
 
@@ -346,7 +343,6 @@ static void emit_points(struct brw_clip_compile *c,
 			bool do_offset )
 {
    struct brw_compile *p = &c->func;
-   const struct brw_context *brw = p->brw;
 
    struct brw_indirect v0 = brw_indirect(0, 0);
    struct brw_indirect v0ptr = brw_indirect(2, 0);
@@ -378,10 +374,10 @@ static void emit_points(struct brw_clip_compile *c,
       brw_ENDIF(p);
 
       brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
    }
    brw_WHILE(p);
-   brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
+   brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 6f4775d..ffd01dd 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -448,7 +448,7 @@ void brw_clip_ff_sync(struct brw_clip_compile *c)
 
     if (brw->gen == 5) {
         brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
-        brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_Z);
+        brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_Z);
         brw_IF(p, BRW_EXECUTE_1);
         {
             brw_OR(p, c->reg.ff_sync, c->reg.ff_sync, brw_imm_ud(0x1));
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 2630218..873ae86 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -721,50 +721,51 @@ static int
 dest(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
    int err = 0;
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
 
-   if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-      if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
-         err |= reg(file, brw_inst_dst_reg_file(brw, inst),
-                    brw_inst_dst_da_reg_nr(brw, inst));
+   if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+      if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
+         err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
+                    brw_inst_dst_da_reg_nr(devinfo, inst));
          if (err == -1)
             return 0;
-         if (brw_inst_dst_da1_subreg_nr(brw, inst))
-            format(file, ".%ld", brw_inst_dst_da1_subreg_nr(brw, inst) /
-                   reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
+         if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
+            format(file, ".%ld", brw_inst_dst_da1_subreg_nr(devinfo, inst) /
+                   reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
          string(file, "<");
          err |= control(file, "horiz stride", horiz_stride,
-                        brw_inst_dst_hstride(brw, inst), NULL);
+                        brw_inst_dst_hstride(devinfo, inst), NULL);
          string(file, ">");
          err |= control(file, "dest reg encoding", reg_encoding,
-                        brw_inst_dst_reg_type(brw, inst), NULL);
+                        brw_inst_dst_reg_type(devinfo, inst), NULL);
       } else {
          string(file, "g[a0");
-         if (brw_inst_dst_ia_subreg_nr(brw, inst))
-            format(file, ".%ld", brw_inst_dst_ia_subreg_nr(brw, inst) /
-                   reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
-         if (brw_inst_dst_ia1_addr_imm(brw, inst))
-            format(file, " %d", brw_inst_dst_ia1_addr_imm(brw, inst));
+         if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
+            format(file, ".%ld", brw_inst_dst_ia_subreg_nr(devinfo, inst) /
+                   reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
+         if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
+            format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
          string(file, "]<");
          err |= control(file, "horiz stride", horiz_stride,
-                        brw_inst_dst_hstride(brw, inst), NULL);
+                        brw_inst_dst_hstride(devinfo, inst), NULL);
          string(file, ">");
          err |= control(file, "dest reg encoding", reg_encoding,
-                        brw_inst_dst_reg_type(brw, inst), NULL);
+                        brw_inst_dst_reg_type(devinfo, inst), NULL);
       }
    } else {
-      if (brw_inst_dst_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
-         err |= reg(file, brw_inst_dst_reg_file(brw, inst),
-                    brw_inst_dst_da_reg_nr(brw, inst));
+      if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
+         err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
+                    brw_inst_dst_da_reg_nr(devinfo, inst));
          if (err == -1)
             return 0;
-         if (brw_inst_dst_da16_subreg_nr(brw, inst))
-            format(file, ".%ld", brw_inst_dst_da16_subreg_nr(brw, inst) /
-                   reg_type_size[brw_inst_dst_reg_type(brw, inst)]);
+         if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
+            format(file, ".%ld", brw_inst_dst_da16_subreg_nr(devinfo, inst) /
+                   reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
          string(file, "<1>");
          err |= control(file, "writemask", writemask,
-                        brw_inst_da16_writemask(brw, inst), NULL);
+                        brw_inst_da16_writemask(devinfo, inst), NULL);
          err |= control(file, "dest reg encoding", reg_encoding,
-                        brw_inst_dst_reg_type(brw, inst), NULL);
+                        brw_inst_dst_reg_type(devinfo, inst), NULL);
       } else {
          err = 1;
          string(file, "Indirect align16 address mode not supported");
@@ -779,22 +780,23 @@ dest_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
    int err = 0;
    uint32_t reg_file;
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
 
-   if (brw->gen == 6 && brw_inst_3src_dst_reg_file(brw, inst))
+   if (brw->gen == 6 && brw_inst_3src_dst_reg_file(devinfo, inst))
       reg_file = BRW_MESSAGE_REGISTER_FILE;
    else
       reg_file = BRW_GENERAL_REGISTER_FILE;
 
-   err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(brw, inst));
+   err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
    if (err == -1)
       return 0;
-   if (brw_inst_3src_dst_subreg_nr(brw, inst))
-      format(file, ".%ld", brw_inst_3src_dst_subreg_nr(brw, inst));
+   if (brw_inst_3src_dst_subreg_nr(devinfo, inst))
+      format(file, ".%ld", brw_inst_3src_dst_subreg_nr(devinfo, inst));
    string(file, "<1>");
    err |= control(file, "writemask", writemask,
-                  brw_inst_3src_dst_writemask(brw, inst), NULL);
+                  brw_inst_3src_dst_writemask(devinfo, inst), NULL);
    err |= control(file, "dest reg encoding", three_source_reg_encoding,
-                  brw_inst_3src_dst_type(brw, inst), NULL);
+                  brw_inst_3src_dst_type(devinfo, inst), NULL);
 
    return 0;
 }
@@ -939,25 +941,26 @@ static int
 src0_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
    int err = 0;
-   unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(brw, inst);
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(devinfo, inst);
 
    err |= control(file, "negate", m_negate,
-                  brw_inst_3src_src0_negate(brw, inst), NULL);
-   err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(brw, inst), NULL);
+                  brw_inst_3src_src0_negate(devinfo, inst), NULL);
+   err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
 
    err |= reg(file, BRW_GENERAL_REGISTER_FILE,
-              brw_inst_3src_src0_reg_nr(brw, inst));
+              brw_inst_3src_src0_reg_nr(devinfo, inst));
    if (err == -1)
       return 0;
    if (src0_subreg_nr)
       format(file, ".%d", src0_subreg_nr);
-   if (brw_inst_3src_src0_rep_ctrl(brw, inst))
+   if (brw_inst_3src_src0_rep_ctrl(devinfo, inst))
       string(file, "<0,1,0>");
    else
       string(file, "<4,4,1>");
-   err |= src_swizzle(file, brw_inst_3src_src0_swizzle(brw, inst));
+   err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst));
    err |= control(file, "src da16 reg type", three_source_reg_encoding,
-                  brw_inst_3src_src_type(brw, inst), NULL);
+                  brw_inst_3src_src_type(devinfo, inst), NULL);
    return err;
 }
 
@@ -965,25 +968,26 @@ static int
 src1_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
    int err = 0;
-   unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(brw, inst);
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(devinfo, inst);
 
    err |= control(file, "negate", m_negate,
-                  brw_inst_3src_src1_negate(brw, inst), NULL);
-   err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(brw, inst), NULL);
+                  brw_inst_3src_src1_negate(devinfo, inst), NULL);
+   err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
 
    err |= reg(file, BRW_GENERAL_REGISTER_FILE,
-              brw_inst_3src_src1_reg_nr(brw, inst));
+              brw_inst_3src_src1_reg_nr(devinfo, inst));
    if (err == -1)
       return 0;
    if (src1_subreg_nr)
       format(file, ".%d", src1_subreg_nr);
-   if (brw_inst_3src_src1_rep_ctrl(brw, inst))
+   if (brw_inst_3src_src1_rep_ctrl(devinfo, inst))
       string(file, "<0,1,0>");
    else
       string(file, "<4,4,1>");
-   err |= src_swizzle(file, brw_inst_3src_src1_swizzle(brw, inst));
+   err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst));
    err |= control(file, "src da16 reg type", three_source_reg_encoding,
-                  brw_inst_3src_src_type(brw, inst), NULL);
+                  brw_inst_3src_src_type(devinfo, inst), NULL);
    return err;
 }
 
@@ -992,59 +996,61 @@ static int
 src2_3src(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
    int err = 0;
-   unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(brw, inst);
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(devinfo, inst);
 
    err |= control(file, "negate", m_negate,
-                  brw_inst_3src_src2_negate(brw, inst), NULL);
-   err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(brw, inst), NULL);
+                  brw_inst_3src_src2_negate(devinfo, inst), NULL);
+   err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
 
    err |= reg(file, BRW_GENERAL_REGISTER_FILE,
-              brw_inst_3src_src2_reg_nr(brw, inst));
+              brw_inst_3src_src2_reg_nr(devinfo, inst));
    if (err == -1)
       return 0;
    if (src2_subreg_nr)
       format(file, ".%d", src2_subreg_nr);
-   if (brw_inst_3src_src2_rep_ctrl(brw, inst))
+   if (brw_inst_3src_src2_rep_ctrl(devinfo, inst))
       string(file, "<0,1,0>");
    else
       string(file, "<4,4,1>");
-   err |= src_swizzle(file, brw_inst_3src_src2_swizzle(brw, inst));
+   err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst));
    err |= control(file, "src da16 reg type", three_source_reg_encoding,
-                  brw_inst_3src_src_type(brw, inst), NULL);
+                  brw_inst_3src_src_type(devinfo, inst), NULL);
    return err;
 }
 
 static int
 imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
 {
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
    switch (type) {
    case BRW_HW_REG_TYPE_UD:
-      format(file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
+      format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
       break;
    case BRW_HW_REG_TYPE_D:
-      format(file, "%dD", brw_inst_imm_d(brw, inst));
+      format(file, "%dD", brw_inst_imm_d(devinfo, inst));
       break;
    case BRW_HW_REG_TYPE_UW:
-      format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(brw, inst));
+      format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
       break;
    case BRW_HW_REG_TYPE_W:
-      format(file, "%dW", (int16_t) brw_inst_imm_d(brw, inst));
+      format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
       break;
    case BRW_HW_REG_IMM_TYPE_UV:
-      format(file, "0x%08xUV", brw_inst_imm_ud(brw, inst));
+      format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
       break;
    case BRW_HW_REG_IMM_TYPE_VF:
       format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
-             brw_vf_to_float(brw_inst_imm_ud(brw, inst)),
-             brw_vf_to_float(brw_inst_imm_ud(brw, inst) >> 8),
-             brw_vf_to_float(brw_inst_imm_ud(brw, inst) >> 16),
-             brw_vf_to_float(brw_inst_imm_ud(brw, inst) >> 24));
+             brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
+             brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
+             brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
+             brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
       break;
    case BRW_HW_REG_IMM_TYPE_V:
-      format(file, "0x%08xV", brw_inst_imm_ud(brw, inst));
+      format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
       break;
    case BRW_HW_REG_TYPE_F:
-      format(file, "%-gF", brw_inst_imm_f(brw, inst));
+      format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
       break;
    case GEN8_HW_REG_IMM_TYPE_DF:
       string(file, "Double IMM");
@@ -1059,53 +1065,54 @@ imm(FILE *file, struct brw_context *brw, unsigned type, brw_inst *inst)
 static int
 src0(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
-   if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
-      return imm(file, brw, brw_inst_src0_reg_type(brw, inst), inst);
-   } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-      if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
+      return imm(file, brw, brw_inst_src0_reg_type(devinfo, inst), inst);
+   } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+      if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
          return src_da1(file,
                         brw,
-                        brw_inst_opcode(brw, inst),
-                        brw_inst_src0_reg_type(brw, inst),
-                        brw_inst_src0_reg_file(brw, inst),
-                        brw_inst_src0_vstride(brw, inst),
-                        brw_inst_src0_width(brw, inst),
-                        brw_inst_src0_hstride(brw, inst),
-                        brw_inst_src0_da_reg_nr(brw, inst),
-                        brw_inst_src0_da1_subreg_nr(brw, inst),
-                        brw_inst_src0_abs(brw, inst),
-                        brw_inst_src0_negate(brw, inst));
+                        brw_inst_opcode(devinfo, inst),
+                        brw_inst_src0_reg_type(devinfo, inst),
+                        brw_inst_src0_reg_file(devinfo, inst),
+                        brw_inst_src0_vstride(devinfo, inst),
+                        brw_inst_src0_width(devinfo, inst),
+                        brw_inst_src0_hstride(devinfo, inst),
+                        brw_inst_src0_da_reg_nr(devinfo, inst),
+                        brw_inst_src0_da1_subreg_nr(devinfo, inst),
+                        brw_inst_src0_abs(devinfo, inst),
+                        brw_inst_src0_negate(devinfo, inst));
       } else {
          return src_ia1(file,
                         brw,
-                        brw_inst_opcode(brw, inst),
-                        brw_inst_src0_reg_type(brw, inst),
-                        brw_inst_src0_reg_file(brw, inst),
-                        brw_inst_src0_ia1_addr_imm(brw, inst),
-                        brw_inst_src0_ia_subreg_nr(brw, inst),
-                        brw_inst_src0_negate(brw, inst),
-                        brw_inst_src0_abs(brw, inst),
-                        brw_inst_src0_address_mode(brw, inst),
-                        brw_inst_src0_hstride(brw, inst),
-                        brw_inst_src0_width(brw, inst),
-                        brw_inst_src0_vstride(brw, inst));
+                        brw_inst_opcode(devinfo, inst),
+                        brw_inst_src0_reg_type(devinfo, inst),
+                        brw_inst_src0_reg_file(devinfo, inst),
+                        brw_inst_src0_ia1_addr_imm(devinfo, inst),
+                        brw_inst_src0_ia_subreg_nr(devinfo, inst),
+                        brw_inst_src0_negate(devinfo, inst),
+                        brw_inst_src0_abs(devinfo, inst),
+                        brw_inst_src0_address_mode(devinfo, inst),
+                        brw_inst_src0_hstride(devinfo, inst),
+                        brw_inst_src0_width(devinfo, inst),
+                        brw_inst_src0_vstride(devinfo, inst));
       }
    } else {
-      if (brw_inst_src0_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
+      if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
          return src_da16(file,
                          brw,
-                         brw_inst_opcode(brw, inst),
-                         brw_inst_src0_reg_type(brw, inst),
-                         brw_inst_src0_reg_file(brw, inst),
-                         brw_inst_src0_vstride(brw, inst),
-                         brw_inst_src0_da_reg_nr(brw, inst),
-                         brw_inst_src0_da16_subreg_nr(brw, inst),
-                         brw_inst_src0_abs(brw, inst),
-                         brw_inst_src0_negate(brw, inst),
-                         brw_inst_src0_da16_swiz_x(brw, inst),
-                         brw_inst_src0_da16_swiz_y(brw, inst),
-                         brw_inst_src0_da16_swiz_z(brw, inst),
-                         brw_inst_src0_da16_swiz_w(brw, inst));
+                         brw_inst_opcode(devinfo, inst),
+                         brw_inst_src0_reg_type(devinfo, inst),
+                         brw_inst_src0_reg_file(devinfo, inst),
+                         brw_inst_src0_vstride(devinfo, inst),
+                         brw_inst_src0_da_reg_nr(devinfo, inst),
+                         brw_inst_src0_da16_subreg_nr(devinfo, inst),
+                         brw_inst_src0_abs(devinfo, inst),
+                         brw_inst_src0_negate(devinfo, inst),
+                         brw_inst_src0_da16_swiz_x(devinfo, inst),
+                         brw_inst_src0_da16_swiz_y(devinfo, inst),
+                         brw_inst_src0_da16_swiz_z(devinfo, inst),
+                         brw_inst_src0_da16_swiz_w(devinfo, inst));
       } else {
          string(file, "Indirect align16 address mode not supported");
          return 1;
@@ -1116,53 +1123,54 @@ src0(FILE *file, struct brw_context *brw, brw_inst *inst)
 static int
 src1(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
-   if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE) {
-      return imm(file, brw, brw_inst_src1_reg_type(brw, inst), inst);
-   } else if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-      if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
+      return imm(file, brw, brw_inst_src1_reg_type(devinfo, inst), inst);
+   } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+      if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
          return src_da1(file,
                         brw,
-                        brw_inst_opcode(brw, inst),
-                        brw_inst_src1_reg_type(brw, inst),
-                        brw_inst_src1_reg_file(brw, inst),
-                        brw_inst_src1_vstride(brw, inst),
-                        brw_inst_src1_width(brw, inst),
-                        brw_inst_src1_hstride(brw, inst),
-                        brw_inst_src1_da_reg_nr(brw, inst),
-                        brw_inst_src1_da1_subreg_nr(brw, inst),
-                        brw_inst_src1_abs(brw, inst),
-                        brw_inst_src1_negate(brw, inst));
+                        brw_inst_opcode(devinfo, inst),
+                        brw_inst_src1_reg_type(devinfo, inst),
+                        brw_inst_src1_reg_file(devinfo, inst),
+                        brw_inst_src1_vstride(devinfo, inst),
+                        brw_inst_src1_width(devinfo, inst),
+                        brw_inst_src1_hstride(devinfo, inst),
+                        brw_inst_src1_da_reg_nr(devinfo, inst),
+                        brw_inst_src1_da1_subreg_nr(devinfo, inst),
+                        brw_inst_src1_abs(devinfo, inst),
+                        brw_inst_src1_negate(devinfo, inst));
       } else {
          return src_ia1(file,
                         brw,
-                        brw_inst_opcode(brw, inst),
-                        brw_inst_src1_reg_type(brw, inst),
-                        brw_inst_src1_reg_file(brw, inst),
-                        brw_inst_src1_ia1_addr_imm(brw, inst),
-                        brw_inst_src1_ia_subreg_nr(brw, inst),
-                        brw_inst_src1_negate(brw, inst),
-                        brw_inst_src1_abs(brw, inst),
-                        brw_inst_src1_address_mode(brw, inst),
-                        brw_inst_src1_hstride(brw, inst),
-                        brw_inst_src1_width(brw, inst),
-                        brw_inst_src1_vstride(brw, inst));
+                        brw_inst_opcode(devinfo, inst),
+                        brw_inst_src1_reg_type(devinfo, inst),
+                        brw_inst_src1_reg_file(devinfo, inst),
+                        brw_inst_src1_ia1_addr_imm(devinfo, inst),
+                        brw_inst_src1_ia_subreg_nr(devinfo, inst),
+                        brw_inst_src1_negate(devinfo, inst),
+                        brw_inst_src1_abs(devinfo, inst),
+                        brw_inst_src1_address_mode(devinfo, inst),
+                        brw_inst_src1_hstride(devinfo, inst),
+                        brw_inst_src1_width(devinfo, inst),
+                        brw_inst_src1_vstride(devinfo, inst));
       }
    } else {
-      if (brw_inst_src1_address_mode(brw, inst) == BRW_ADDRESS_DIRECT) {
+      if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
          return src_da16(file,
                          brw,
-                         brw_inst_opcode(brw, inst),
-                         brw_inst_src1_reg_type(brw, inst),
-                         brw_inst_src1_reg_file(brw, inst),
-                         brw_inst_src1_vstride(brw, inst),
-                         brw_inst_src1_da_reg_nr(brw, inst),
-                         brw_inst_src1_da16_subreg_nr(brw, inst),
-                         brw_inst_src1_abs(brw, inst),
-                         brw_inst_src1_negate(brw, inst),
-                         brw_inst_src1_da16_swiz_x(brw, inst),
-                         brw_inst_src1_da16_swiz_y(brw, inst),
-                         brw_inst_src1_da16_swiz_z(brw, inst),
-                         brw_inst_src1_da16_swiz_w(brw, inst));
+                         brw_inst_opcode(devinfo, inst),
+                         brw_inst_src1_reg_type(devinfo, inst),
+                         brw_inst_src1_reg_file(devinfo, inst),
+                         brw_inst_src1_vstride(devinfo, inst),
+                         brw_inst_src1_da_reg_nr(devinfo, inst),
+                         brw_inst_src1_da16_subreg_nr(devinfo, inst),
+                         brw_inst_src1_abs(devinfo, inst),
+                         brw_inst_src1_negate(devinfo, inst),
+                         brw_inst_src1_da16_swiz_x(devinfo, inst),
+                         brw_inst_src1_da16_swiz_y(devinfo, inst),
+                         brw_inst_src1_da16_swiz_z(devinfo, inst),
+                         brw_inst_src1_da16_swiz_w(devinfo, inst));
       } else {
          string(file, "Indirect align16 address mode not supported");
          return 1;
@@ -1173,8 +1181,9 @@ src1(FILE *file, struct brw_context *brw, brw_inst *inst)
 static int
 qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
-   int qtr_ctl = brw_inst_qtr_control(brw, inst);
-   int exec_size = 1 << brw_inst_exec_size(brw, inst);
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
+   int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
 
    if (exec_size == 8) {
       switch (qtr_ctl) {
@@ -1218,94 +1227,95 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
 {
    int err = 0;
    int space = 0;
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
 
-   const enum opcode opcode = brw_inst_opcode(brw, inst);
+   const enum opcode opcode = brw_inst_opcode(devinfo, inst);
 
-   if (brw_inst_pred_control(brw, inst)) {
+   if (brw_inst_pred_control(devinfo, inst)) {
       string(file, "(");
       err |= control(file, "predicate inverse", pred_inv,
-                     brw_inst_pred_inv(brw, inst), NULL);
-      format(file, "f%ld", brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
-      if (brw_inst_flag_subreg_nr(brw, inst))
-         format(file, ".%ld", brw_inst_flag_subreg_nr(brw, inst));
-      if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
+                     brw_inst_pred_inv(devinfo, inst), NULL);
+      format(file, "f%ld", devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
+      if (brw_inst_flag_subreg_nr(devinfo, inst))
+         format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
+      if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
          err |= control(file, "predicate control align1", pred_ctrl_align1,
-                        brw_inst_pred_control(brw, inst), NULL);
+                        brw_inst_pred_control(devinfo, inst), NULL);
       } else {
          err |= control(file, "predicate control align16", pred_ctrl_align16,
-                        brw_inst_pred_control(brw, inst), NULL);
+                        brw_inst_pred_control(devinfo, inst), NULL);
       }
       string(file, ") ");
    }
 
    err |= print_opcode(file, opcode);
-   err |= control(file, "saturate", saturate, brw_inst_saturate(brw, inst),
+   err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
                   NULL);
 
    err |= control(file, "debug control", debug_ctrl,
-                  brw_inst_debug_control(brw, inst), NULL);
+                  brw_inst_debug_control(devinfo, inst), NULL);
 
    if (opcode == BRW_OPCODE_MATH) {
       string(file, " ");
       err |= control(file, "function", math_function,
-                     brw_inst_math_function(brw, inst), NULL);
+                     brw_inst_math_function(devinfo, inst), NULL);
    } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) {
       err |= control(file, "conditional modifier", conditional_modifier,
-                     brw_inst_cond_modifier(brw, inst), NULL);
+                     brw_inst_cond_modifier(devinfo, inst), NULL);
 
       /* If we're using the conditional modifier, print which flags reg is
        * used for it.  Note that on gen6+, the embedded-condition SEL and
        * control flow doesn't update flags.
        */
-      if (brw_inst_cond_modifier(brw, inst) &&
+      if (brw_inst_cond_modifier(devinfo, inst) &&
           (brw->gen < 6 || (opcode != BRW_OPCODE_SEL &&
                             opcode != BRW_OPCODE_IF &&
                             opcode != BRW_OPCODE_WHILE))) {
          format(file, ".f%ld",
-                brw->gen >= 7 ? brw_inst_flag_reg_nr(brw, inst) : 0);
-         if (brw_inst_flag_subreg_nr(brw, inst))
-            format(file, ".%ld", brw_inst_flag_subreg_nr(brw, inst));
+                brw->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0);
+         if (brw_inst_flag_subreg_nr(devinfo, inst))
+            format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst));
       }
    }
 
    if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
       string(file, "(");
       err |= control(file, "execution size", exec_size,
-                     brw_inst_exec_size(brw, inst), NULL);
+                     brw_inst_exec_size(devinfo, inst), NULL);
       string(file, ")");
    }
 
    if (opcode == BRW_OPCODE_SEND && brw->gen < 6)
-      format(file, " %ld", brw_inst_base_mrf(brw, inst));
+      format(file, " %ld", brw_inst_base_mrf(devinfo, inst));
 
    if (has_uip(brw, opcode)) {
       /* Instructions that have UIP also have JIP. */
       pad(file, 16);
-      format(file, "JIP: %d", brw_inst_jip(brw, inst));
+      format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
       pad(file, 32);
-      format(file, "UIP: %d", brw_inst_uip(brw, inst));
+      format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
    } else if (has_jip(brw, opcode)) {
       pad(file, 16);
       if (brw->gen >= 7) {
-         format(file, "JIP: %d", brw_inst_jip(brw, inst));
+         format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
       } else {
-         format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
+         format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
       }
    } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
                                opcode == BRW_OPCODE_CONTINUE ||
                                opcode == BRW_OPCODE_ELSE)) {
       pad(file, 16);
-      format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
+      format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
       pad(file, 32);
-      format(file, "Pop: %ld", brw_inst_gen4_pop_count(brw, inst));
+      format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
    } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
                                opcode == BRW_OPCODE_IFF ||
                                opcode == BRW_OPCODE_HALT)) {
       pad(file, 16);
-      format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
+      format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
    } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
       pad(file, 16);
-      format(file, "Pop: %ld", brw_inst_gen4_pop_count(brw, inst));
+      format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst));
    } else if (opcode == BRW_OPCODE_JMPI) {
       pad(file, 16);
       err |= src1(file, brw, inst);
@@ -1339,9 +1349,9 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
    }
 
    if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
-      enum brw_message_target sfid = brw_inst_sfid(brw, inst);
+      enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
 
-      if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
+      if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
          /* show the indirect descriptor source */
          pad(file, 48);
          err |= src1(file, brw, inst);
@@ -1356,38 +1366,38 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
                      sfid, &space);
 
 
-      if (brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
+      if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
          format(file, " indirect");
       } else {
          switch (sfid) {
          case BRW_SFID_MATH:
             err |= control(file, "math function", math_function,
-                           brw_inst_math_msg_function(brw, inst), &space);
+                           brw_inst_math_msg_function(devinfo, inst), &space);
             err |= control(file, "math saturate", math_saturate,
-                           brw_inst_math_msg_saturate(brw, inst), &space);
+                           brw_inst_math_msg_saturate(devinfo, inst), &space);
             err |= control(file, "math signed", math_signed,
-                           brw_inst_math_msg_signed_int(brw, inst), &space);
+                           brw_inst_math_msg_signed_int(devinfo, inst), &space);
             err |= control(file, "math scalar", math_scalar,
-                           brw_inst_math_msg_data_type(brw, inst), &space);
+                           brw_inst_math_msg_data_type(devinfo, inst), &space);
             err |= control(file, "math precision", math_precision,
-                           brw_inst_math_msg_precision(brw, inst), &space);
+                           brw_inst_math_msg_precision(devinfo, inst), &space);
             break;
          case BRW_SFID_SAMPLER:
             if (brw->gen >= 5) {
                format(file, " (%ld, %ld, %ld, %ld)",
-                      brw_inst_binding_table_index(brw, inst),
-                      brw_inst_sampler(brw, inst),
-                      brw_inst_sampler_msg_type(brw, inst),
-                      brw_inst_sampler_simd_mode(brw, inst));
+                      brw_inst_binding_table_index(devinfo, inst),
+                      brw_inst_sampler(devinfo, inst),
+                      brw_inst_sampler_msg_type(devinfo, inst),
+                      brw_inst_sampler_simd_mode(devinfo, inst));
             } else {
                format(file, " (%ld, %ld, %ld, ",
-                      brw_inst_binding_table_index(brw, inst),
-                      brw_inst_sampler(brw, inst),
-                      brw_inst_sampler_msg_type(brw, inst));
+                      brw_inst_binding_table_index(devinfo, inst),
+                      brw_inst_sampler(devinfo, inst),
+                      brw_inst_sampler_msg_type(devinfo, inst));
                if (!brw->is_g4x) {
                   err |= control(file, "sampler target format",
                                  sampler_target_format,
-                                 brw_inst_sampler_return_format(brw, inst), NULL);
+                                 brw_inst_sampler_return_format(devinfo, inst), NULL);
                }
                string(file, ")");
             }
@@ -1396,21 +1406,21 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
             /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
             if (brw->gen >= 6) {
                format(file, " (%ld, %ld, %ld, %ld)",
-                      brw_inst_binding_table_index(brw, inst),
-                      brw_inst_dp_msg_control(brw, inst),
-                      brw_inst_dp_msg_type(brw, inst),
-                      brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(brw, inst));
+                      brw_inst_binding_table_index(devinfo, inst),
+                      brw_inst_dp_msg_control(devinfo, inst),
+                      brw_inst_dp_msg_type(devinfo, inst),
+                      brw->gen >= 7 ? 0 : brw_inst_dp_write_commit(devinfo, inst));
             } else {
                format(file, " (%ld, %ld, %ld)",
-                      brw_inst_binding_table_index(brw, inst),
-                      brw_inst_dp_read_msg_control(brw, inst),
-                      brw_inst_dp_read_msg_type(brw, inst));
+                      brw_inst_binding_table_index(devinfo, inst),
+                      brw_inst_dp_read_msg_control(devinfo, inst),
+                      brw_inst_dp_read_msg_type(devinfo, inst));
             }
             break;
 
          case GEN6_SFID_DATAPORT_RENDER_CACHE: {
             /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
-            unsigned msg_type = brw_inst_dp_write_msg_type(brw, inst);
+            unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst);
 
             err |= control(file, "DP rc message type",
                            brw->gen >= 6 ? dp_rc_msg_type_gen6
@@ -1423,44 +1433,44 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
 
             if (is_rt_write) {
                err |= control(file, "RT message type", m_rt_write_subtype,
-                              brw_inst_rt_message_type(brw, inst), &space);
-               if (brw->gen >= 6 && brw_inst_rt_slot_group(brw, inst))
+                              brw_inst_rt_message_type(devinfo, inst), &space);
+               if (brw->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
                   string(file, " Hi");
-               if (brw_inst_rt_last(brw, inst))
+               if (brw_inst_rt_last(devinfo, inst))
                   string(file, " LastRT");
-               if (brw->gen < 7 && brw_inst_dp_write_commit(brw, inst))
+               if (brw->gen < 7 && brw_inst_dp_write_commit(devinfo, inst))
                   string(file, " WriteCommit");
             } else {
                format(file, " MsgCtrl = 0x%lx",
-                      brw_inst_dp_write_msg_control(brw, inst));
+                      brw_inst_dp_write_msg_control(devinfo, inst));
             }
 
-            format(file, " Surface = %ld", brw_inst_binding_table_index(brw, inst));
+            format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst));
             break;
          }
 
          case BRW_SFID_URB:
-            format(file, " %ld", brw_inst_urb_global_offset(brw, inst));
+            format(file, " %ld", brw_inst_urb_global_offset(devinfo, inst));
 
             space = 1;
             if (brw->gen >= 7) {
                err |= control(file, "urb opcode", gen7_urb_opcode,
-                              brw_inst_urb_opcode(brw, inst), &space);
+                              brw_inst_urb_opcode(devinfo, inst), &space);
             } else if (brw->gen >= 5) {
                err |= control(file, "urb opcode", gen5_urb_opcode,
-                              brw_inst_urb_opcode(brw, inst), &space);
+                              brw_inst_urb_opcode(devinfo, inst), &space);
             }
             err |= control(file, "urb swizzle", urb_swizzle,
-                           brw_inst_urb_swizzle_control(brw, inst), &space);
+                           brw_inst_urb_swizzle_control(devinfo, inst), &space);
             if (brw->gen < 7) {
                err |= control(file, "urb allocate", urb_allocate,
-                              brw_inst_urb_allocate(brw, inst), &space);
+                              brw_inst_urb_allocate(devinfo, inst), &space);
                err |= control(file, "urb used", urb_used,
-                              brw_inst_urb_used(brw, inst), &space);
+                              brw_inst_urb_used(devinfo, inst), &space);
             }
             if (brw->gen < 8) {
                err |= control(file, "urb complete", urb_complete,
-                              brw_inst_urb_complete(brw, inst), &space);
+                              brw_inst_urb_complete(devinfo, inst), &space);
             }
             break;
          case BRW_SFID_THREAD_SPAWNER:
@@ -1471,17 +1481,17 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
 
                err |= control(file, "DP DC0 message type",
                               dp_dc0_msg_type_gen7,
-                              brw_inst_dp_msg_type(brw, inst), &space);
+                              brw_inst_dp_msg_type(devinfo, inst), &space);
 
-               format(file, ", %ld, ", brw_inst_binding_table_index(brw, inst));
+               format(file, ", %ld, ", brw_inst_binding_table_index(devinfo, inst));
 
-               switch (brw_inst_dp_msg_type(brw, inst)) {
+               switch (brw_inst_dp_msg_type(devinfo, inst)) {
                case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
                   control(file, "atomic op", aop,
-                          brw_inst_imm_ud(brw, inst) >> 8 & 0xf, &space);
+                          brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space);
                   break;
                default:
-                  format(file, "%ld", brw_inst_dp_msg_control(brw, inst));
+                  format(file, "%ld", brw_inst_dp_msg_control(devinfo, inst));
                }
                format(file, ")");
                break;
@@ -1492,16 +1502,16 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
             if (brw->gen >= 7) {
                format(file, " (");
 
-               unsigned msg_ctrl = brw_inst_dp_msg_control(brw, inst);
+               unsigned msg_ctrl = brw_inst_dp_msg_control(devinfo, inst);
 
                err |= control(file, "DP DC1 message type",
                               dp_dc1_msg_type_hsw,
-                              brw_inst_dp_msg_type(brw, inst), &space);
+                              brw_inst_dp_msg_type(devinfo, inst), &space);
 
                format(file, ", Surface = %ld, ",
-                      brw_inst_binding_table_index(brw, inst));
+                      brw_inst_binding_table_index(devinfo, inst));
 
-               switch (brw_inst_dp_msg_type(brw, inst)) {
+               switch (brw_inst_dp_msg_type(devinfo, inst)) {
                case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
                case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
                case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
@@ -1533,9 +1543,9 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
          case GEN7_SFID_PIXEL_INTERPOLATOR:
             if (brw->gen >= 7) {
                format(file, " (%s, %s, 0x%02lx)",
-                      brw_inst_pi_nopersp(brw, inst) ? "linear" : "persp",
-                      pixel_interpolator_msg_types[brw_inst_pi_message_type(brw, inst)],
-                      brw_inst_pi_message_data(brw, inst));
+                      brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
+                      pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
+                      brw_inst_pi_message_data(devinfo, inst));
                break;
             }
             /* FALLTHROUGH */
@@ -1547,8 +1557,8 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
 
          if (space)
             string(file, " ");
-         format(file, "mlen %ld", brw_inst_mlen(brw, inst));
-         format(file, " rlen %ld", brw_inst_rlen(brw, inst));
+         format(file, "mlen %ld", brw_inst_mlen(devinfo, inst));
+         format(file, " rlen %ld", brw_inst_rlen(devinfo, inst));
       }
    }
    pad(file, 64);
@@ -1556,45 +1566,45 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
       string(file, "{");
       space = 1;
       err |= control(file, "access mode", access_mode,
-                     brw_inst_access_mode(brw, inst), &space);
+                     brw_inst_access_mode(devinfo, inst), &space);
       if (brw->gen >= 6) {
          err |= control(file, "write enable control", wectrl,
-                        brw_inst_mask_control(brw, inst), &space);
+                        brw_inst_mask_control(devinfo, inst), &space);
       } else {
          err |= control(file, "mask control", mask_ctrl,
-                        brw_inst_mask_control(brw, inst), &space);
+                        brw_inst_mask_control(devinfo, inst), &space);
       }
       err |= control(file, "dependency control", dep_ctrl,
-                     ((brw_inst_no_dd_check(brw, inst) << 1) |
-                      brw_inst_no_dd_clear(brw, inst)), &space);
+                     ((brw_inst_no_dd_check(devinfo, inst) << 1) |
+                      brw_inst_no_dd_clear(devinfo, inst)), &space);
 
       if (brw->gen >= 6)
          err |= qtr_ctrl(file, brw, inst);
       else {
-         if (brw_inst_qtr_control(brw, inst) == BRW_COMPRESSION_COMPRESSED &&
+         if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
              opcode_descs[opcode].ndst > 0 &&
-             brw_inst_dst_reg_file(brw, inst) == BRW_MESSAGE_REGISTER_FILE &&
-             brw_inst_dst_da_reg_nr(brw, inst) & (1 << 7)) {
+             brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
+             brw_inst_dst_da_reg_nr(devinfo, inst) & (1 << 7)) {
             format(file, " compr4");
          } else {
             err |= control(file, "compression control", compr_ctrl,
-                           brw_inst_qtr_control(brw, inst), &space);
+                           brw_inst_qtr_control(devinfo, inst), &space);
          }
       }
 
       err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
       err |= control(file, "thread control", thread_ctrl,
-                     brw_inst_thread_control(brw, inst), &space);
+                     brw_inst_thread_control(devinfo, inst), &space);
       if (has_branch_ctrl(brw, opcode)) {
          err |= control(file, "branch ctrl", branch_ctrl,
-                        brw_inst_branch_control(brw, inst), &space);
+                        brw_inst_branch_control(devinfo, inst), &space);
       } else if (brw->gen >= 6) {
          err |= control(file, "acc write control", accwr,
-                        brw_inst_acc_wr_control(brw, inst), &space);
+                        brw_inst_acc_wr_control(devinfo, inst), &space);
       }
       if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
          err |= control(file, "end of thread", end_of_thread,
-                        brw_inst_eot(brw, inst), &space);
+                        brw_inst_eot(devinfo, inst), &space);
       if (space)
          string(file, " ");
       string(file, "}");
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index ccd659e..b98a089 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -113,30 +113,30 @@ brw_swap_cmod(uint32_t cmod)
 void
 brw_set_default_exec_size(struct brw_compile *p, unsigned value)
 {
-   brw_inst_set_exec_size(p->brw, p->current, value);
+   brw_inst_set_exec_size(p->devinfo, p->current, value);
 }
 
 void brw_set_default_predicate_control( struct brw_compile *p, unsigned pc )
 {
-   brw_inst_set_pred_control(p->brw, p->current, pc);
+   brw_inst_set_pred_control(p->devinfo, p->current, pc);
 }
 
 void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inverse)
 {
-   brw_inst_set_pred_inv(p->brw, p->current, predicate_inverse);
+   brw_inst_set_pred_inv(p->devinfo, p->current, predicate_inverse);
 }
 
 void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg)
 {
    if (p->brw->gen >= 7)
-      brw_inst_set_flag_reg_nr(p->brw, p->current, reg);
+      brw_inst_set_flag_reg_nr(p->devinfo, p->current, reg);
 
-   brw_inst_set_flag_subreg_nr(p->brw, p->current, subreg);
+   brw_inst_set_flag_subreg_nr(p->devinfo, p->current, subreg);
 }
 
 void brw_set_default_access_mode( struct brw_compile *p, unsigned access_mode )
 {
-   brw_inst_set_access_mode(p->brw, p->current, access_mode);
+   brw_inst_set_access_mode(p->devinfo, p->current, access_mode);
 }
 
 void
@@ -156,34 +156,34 @@ brw_set_default_compression_control(struct brw_compile *p,
 	 /* This is the "use the first set of bits of dmask/vmask/arf
 	  * according to execsize" option.
 	  */
-         brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_1Q);
+         brw_inst_set_qtr_control(p->devinfo, p->current, GEN6_COMPRESSION_1Q);
 	 break;
       case BRW_COMPRESSION_2NDHALF:
 	 /* For SIMD8, this is "use the second set of 8 bits." */
-         brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_2Q);
+         brw_inst_set_qtr_control(p->devinfo, p->current, GEN6_COMPRESSION_2Q);
 	 break;
       case BRW_COMPRESSION_COMPRESSED:
 	 /* For SIMD16 instruction compression, use the first set of 16 bits
 	  * since we don't do SIMD32 dispatch.
 	  */
-         brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_1H);
+         brw_inst_set_qtr_control(p->devinfo, p->current, GEN6_COMPRESSION_1H);
 	 break;
       default:
          unreachable("not reached");
       }
    } else {
-      brw_inst_set_qtr_control(brw, p->current, compression_control);
+      brw_inst_set_qtr_control(p->devinfo, p->current, compression_control);
    }
 }
 
 void brw_set_default_mask_control( struct brw_compile *p, unsigned value )
 {
-   brw_inst_set_mask_control(p->brw, p->current, value);
+   brw_inst_set_mask_control(p->devinfo, p->current, value);
 }
 
 void brw_set_default_saturate( struct brw_compile *p, bool enable )
 {
-   brw_inst_set_saturate(p->brw, p->current, enable);
+   brw_inst_set_saturate(p->devinfo, p->current, enable);
 }
 
 void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
@@ -191,7 +191,7 @@ void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
    struct brw_context *brw = p->brw;
 
    if (brw->gen >= 6)
-      brw_inst_set_acc_wr_control(p->brw, p->current, value);
+      brw_inst_set_acc_wr_control(p->devinfo, p->current, value);
 }
 
 void brw_push_insn_state( struct brw_compile *p )
@@ -270,7 +270,7 @@ brw_disassemble(struct brw_context *brw,
    for (int offset = start; offset < end;) {
       brw_inst *insn = assembly + offset;
       brw_inst uncompacted;
-      bool compacted = brw_inst_cmpt_control(brw, insn);
+      bool compacted = brw_inst_cmpt_control(brw->intelScreen->devinfo, insn);
       if (0)
          fprintf(out, "0x%08x: ", offset);
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index dc62cf0..1bb5686 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -346,16 +346,16 @@ void brw_shader_time_add(struct brw_compile *p,
  * instruction.
  */
 static inline unsigned
-brw_jump_scale(const struct brw_context *brw)
+brw_jump_scale(const struct brw_device_info *devinfo)
 {
    /* Broadwell measures jump targets in bytes. */
-   if (brw->gen >= 8)
+   if (devinfo->gen >= 8)
       return 16;
 
    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
     * (to support compaction), so each 128-bit instruction requires 2 chunks.
     */
-   if (brw->gen >= 5)
+   if (devinfo->gen >= 5)
       return 2;
 
    /* Gen4 simply uses the number of 128-bit instructions. */
@@ -475,11 +475,11 @@ void brw_debug_compact_uncompact(struct brw_context *brw, brw_inst *orig,
                                  brw_inst *uncompacted);
 
 static inline int
-next_offset(const struct brw_context *brw, void *store, int offset)
+next_offset(const struct brw_device_info *devinfo, void *store, int offset)
 {
    brw_inst *insn = (brw_inst *)((char *)store + offset);
 
-   if (brw_inst_cmpt_control(brw, insn))
+   if (brw_inst_cmpt_control(devinfo, insn))
       return offset + 8;
    else
       return offset + 16;
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 26c41ea..23aac0a 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -774,7 +774,7 @@ set_src1_index(struct brw_context *brw, brw_compact_inst *dst, brw_inst *src,
    uint16_t compacted;
 
    if (is_immediate) {
-      compacted = (brw_inst_imm_ud(brw, src) >> 8) & 0x1f;
+      compacted = (brw_inst_imm_ud(brw->intelScreen->devinfo, src) >> 8) & 0x1f;
    } else {
       uint16_t uncompacted = brw_inst_bits(src, 120, 109); /* 12b */
 
@@ -898,8 +898,9 @@ brw_try_compact_3src_instruction(struct brw_context *brw, brw_compact_inst *dst,
    if (has_3src_unmapped_bits(brw, src))
       return false;
 
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
 #define compact(field) \
-   brw_compact_inst_set_3src_##field(dst, brw_inst_3src_##field(brw, src))
+   brw_compact_inst_set_3src_##field(dst, brw_inst_3src_##field(devinfo, src))
 
    compact(opcode);
 
@@ -961,11 +962,12 @@ bool
 brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst,
                             brw_inst *src)
 {
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
    brw_compact_inst temp;
 
-   assert(brw_inst_cmpt_control(brw, src) == 0);
+   assert(brw_inst_cmpt_control(devinfo, src) == 0);
 
-   if (is_3src(brw_inst_opcode(brw, src))) {
+   if (is_3src(brw_inst_opcode(devinfo, src))) {
       if (brw->gen >= 8) {
          memset(&temp, 0, sizeof(temp));
          if (brw_try_compact_3src_instruction(brw, &temp, src)) {
@@ -980,10 +982,10 @@ brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst,
    }
 
    bool is_immediate =
-      brw_inst_src0_reg_file(brw, src) == BRW_IMMEDIATE_VALUE ||
-      brw_inst_src1_reg_file(brw, src) == BRW_IMMEDIATE_VALUE;
+      brw_inst_src0_reg_file(devinfo, src) == BRW_IMMEDIATE_VALUE ||
+      brw_inst_src1_reg_file(devinfo, src) == BRW_IMMEDIATE_VALUE;
    if (is_immediate &&
-       (brw->gen < 6 || !is_compactable_immediate(brw_inst_imm_ud(brw, src)))) {
+       (brw->gen < 6 || !is_compactable_immediate(brw_inst_imm_ud(devinfo, src)))) {
       return false;
    }
 
@@ -992,8 +994,8 @@ brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst,
 
    memset(&temp, 0, sizeof(temp));
 
-   brw_compact_inst_set_opcode(&temp, brw_inst_opcode(brw, src));
-   brw_compact_inst_set_debug_control(&temp, brw_inst_debug_control(brw, src));
+   brw_compact_inst_set_opcode(&temp, brw_inst_opcode(devinfo, src));
+   brw_compact_inst_set_debug_control(&temp, brw_inst_debug_control(devinfo, src));
    if (!set_control_index(brw, &temp, src))
       return false;
    if (!set_datatype_index(brw, &temp, src))
@@ -1001,23 +1003,25 @@ brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst,
    if (!set_subreg_index(brw, &temp, src, is_immediate))
       return false;
    brw_compact_inst_set_acc_wr_control(&temp,
-                                       brw_inst_acc_wr_control(brw, src));
-   brw_compact_inst_set_cond_modifier(&temp, brw_inst_cond_modifier(brw, src));
+                                       brw_inst_acc_wr_control(devinfo, src));
+   brw_compact_inst_set_cond_modifier(&temp,
+                                      brw_inst_cond_modifier(devinfo, src));
    if (brw->gen <= 6)
       brw_compact_inst_set_flag_subreg_nr(&temp,
-                                          brw_inst_flag_subreg_nr(brw, src));
+                                          brw_inst_flag_subreg_nr(devinfo, src));
    brw_compact_inst_set_cmpt_control(&temp, true);
    if (!set_src0_index(brw, &temp, src))
       return false;
    if (!set_src1_index(brw, &temp, src, is_immediate))
       return false;
-   brw_compact_inst_set_dst_reg_nr(&temp, brw_inst_dst_da_reg_nr(brw, src));
-   brw_compact_inst_set_src0_reg_nr(&temp, brw_inst_src0_da_reg_nr(brw, src));
+   brw_compact_inst_set_dst_reg_nr(&temp, brw_inst_dst_da_reg_nr(devinfo, src));
+   brw_compact_inst_set_src0_reg_nr(&temp, brw_inst_src0_da_reg_nr(devinfo, src));
    if (is_immediate) {
-      brw_compact_inst_set_src1_reg_nr(&temp, brw_inst_imm_ud(brw, src) & 0xff);
+      brw_compact_inst_set_src1_reg_nr(&temp,
+                                       brw_inst_imm_ud(devinfo, src) & 0xff);
    } else {
       brw_compact_inst_set_src1_reg_nr(&temp,
-                                       brw_inst_src1_da_reg_nr(brw, src));
+                                       brw_inst_src1_da_reg_nr(devinfo, src));
    }
 
    *dst = temp;
@@ -1091,7 +1095,7 @@ set_uncompacted_src1(struct brw_context *brw, brw_inst *dst,
    if (is_immediate) {
       signed high5 = brw_compact_inst_src1_index(src);
       /* Replicate top bit of src1_index into high 20 bits of the immediate. */
-      brw_inst_set_imm_ud(brw, dst, (high5 << 27) >> 19);
+      brw_inst_set_imm_ud(brw->intelScreen->devinfo, dst, (high5 << 27) >> 19);
    } else {
       uint16_t uncompacted = src_index_table[brw_compact_inst_src1_index(src)];
 
@@ -1146,8 +1150,9 @@ brw_uncompact_3src_instruction(struct brw_context *brw, brw_inst *dst,
 {
    assert(brw->gen >= 8);
 
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
 #define uncompact(field) \
-   brw_inst_set_3src_##field(brw, dst, brw_compact_inst_3src_##field(src))
+   brw_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(src))
 
    uncompact(opcode);
 
@@ -1156,7 +1161,7 @@ brw_uncompact_3src_instruction(struct brw_context *brw, brw_inst *dst,
 
    uncompact(dst_reg_nr);
    uncompact(src0_rep_ctrl);
-   brw_inst_set_3src_cmpt_control(brw, dst, false);
+   brw_inst_set_3src_cmpt_control(devinfo, dst, false);
    uncompact(debug_control);
    uncompact(saturate);
    uncompact(src1_rep_ctrl);
@@ -1177,37 +1182,38 @@ brw_uncompact_instruction(struct brw_context *brw, brw_inst *dst,
 {
    memset(dst, 0, sizeof(*dst));
 
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
    if (brw->gen >= 8 && is_3src(brw_compact_inst_3src_opcode(src))) {
       brw_uncompact_3src_instruction(brw, dst, src);
       return;
    }
 
-   brw_inst_set_opcode(brw, dst, brw_compact_inst_opcode(src));
-   brw_inst_set_debug_control(brw, dst, brw_compact_inst_debug_control(src));
+   brw_inst_set_opcode(devinfo, dst, brw_compact_inst_opcode(src));
+   brw_inst_set_debug_control(devinfo, dst, brw_compact_inst_debug_control(src));
 
    set_uncompacted_control(brw, dst, src);
    set_uncompacted_datatype(brw, dst, src);
 
    /* src0/1 register file fields are in the datatype table. */
-   bool is_immediate = brw_inst_src0_reg_file(brw, dst) == BRW_IMMEDIATE_VALUE ||
-                       brw_inst_src1_reg_file(brw, dst) == BRW_IMMEDIATE_VALUE;
+   bool is_immediate = brw_inst_src0_reg_file(devinfo, dst) == BRW_IMMEDIATE_VALUE ||
+                       brw_inst_src1_reg_file(devinfo, dst) == BRW_IMMEDIATE_VALUE;
 
    set_uncompacted_subreg(brw, dst, src);
-   brw_inst_set_acc_wr_control(brw, dst, brw_compact_inst_acc_wr_control(src));
-   brw_inst_set_cond_modifier(brw, dst, brw_compact_inst_cond_modifier(src));
+   brw_inst_set_acc_wr_control(devinfo, dst, brw_compact_inst_acc_wr_control(src));
+   brw_inst_set_cond_modifier(devinfo, dst, brw_compact_inst_cond_modifier(src));
    if (brw->gen <= 6)
-      brw_inst_set_flag_subreg_nr(brw, dst,
+      brw_inst_set_flag_subreg_nr(devinfo, dst,
                                   brw_compact_inst_flag_subreg_nr(src));
    set_uncompacted_src0(brw, dst, src);
    set_uncompacted_src1(brw, dst, src, is_immediate);
-   brw_inst_set_dst_da_reg_nr(brw, dst, brw_compact_inst_dst_reg_nr(src));
-   brw_inst_set_src0_da_reg_nr(brw, dst, brw_compact_inst_src0_reg_nr(src));
+   brw_inst_set_dst_da_reg_nr(devinfo, dst, brw_compact_inst_dst_reg_nr(src));
+   brw_inst_set_src0_da_reg_nr(devinfo, dst, brw_compact_inst_src0_reg_nr(src));
    if (is_immediate) {
-      brw_inst_set_imm_ud(brw, dst,
-                          brw_inst_imm_ud(brw, dst) |
+      brw_inst_set_imm_ud(devinfo, dst,
+                          brw_inst_imm_ud(devinfo, dst) |
                           brw_compact_inst_src1_reg_nr(src));
    } else {
-      brw_inst_set_src1_da_reg_nr(brw, dst, brw_compact_inst_src1_reg_nr(src));
+      brw_inst_set_src1_da_reg_nr(devinfo, dst, brw_compact_inst_src1_reg_nr(src));
    }
 }
 
@@ -1251,28 +1257,29 @@ static void
 update_uip_jip(struct brw_context *brw, brw_inst *insn,
                int this_old_ip, int *compacted_counts)
 {
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
    /* JIP and UIP are in units of:
     *    - bytes on Gen8+; and
     *    - compacted instructions on Gen6+.
     */
    int shift = brw->gen >= 8 ? 3 : 0;
 
-   int32_t jip_compacted = brw_inst_jip(brw, insn) >> shift;
+   int32_t jip_compacted = brw_inst_jip(devinfo, insn) >> shift;
    jip_compacted -= compacted_between(this_old_ip,
                                       this_old_ip + (jip_compacted / 2),
                                       compacted_counts);
-   brw_inst_set_jip(brw, insn, jip_compacted << shift);
+   brw_inst_set_jip(devinfo, insn, jip_compacted << shift);
 
-   if (brw_inst_opcode(brw, insn) == BRW_OPCODE_ENDIF ||
-       brw_inst_opcode(brw, insn) == BRW_OPCODE_WHILE ||
-       (brw_inst_opcode(brw, insn) == BRW_OPCODE_ELSE && brw->gen <= 7))
+   if (brw_inst_opcode(devinfo, insn) == BRW_OPCODE_ENDIF ||
+       brw_inst_opcode(devinfo, insn) == BRW_OPCODE_WHILE ||
+       (brw_inst_opcode(devinfo, insn) == BRW_OPCODE_ELSE && brw->gen <= 7))
       return;
 
-   int32_t uip_compacted = brw_inst_uip(brw, insn) >> shift;
+   int32_t uip_compacted = brw_inst_uip(devinfo, insn) >> shift;
    uip_compacted -= compacted_between(this_old_ip,
                                       this_old_ip + (uip_compacted / 2),
                                       compacted_counts);
-   brw_inst_set_uip(brw, insn, uip_compacted << shift);
+   brw_inst_set_uip(devinfo, insn, uip_compacted << shift);
 }
 
 static void
@@ -1281,13 +1288,14 @@ update_gen4_jump_count(struct brw_context *brw, brw_inst *insn,
 {
    assert(brw->gen == 5 || brw->is_g4x);
 
+   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
    /* Jump Count is in units of:
     *    - uncompacted instructions on G45; and
     *    - compacted instructions on Gen5.
     */
    int shift = brw->is_g4x ? 1 : 0;
 
-   int jump_count_compacted = brw_inst_gen4_jump_count(brw, insn) << shift;
+   int jump_count_compacted = brw_inst_gen4_jump_count(devinfo, insn) << shift;
 
    int target_old_ip = this_old_ip + (jump_count_compacted / 2);
 
@@ -1295,7 +1303,7 @@ update_gen4_jump_count(struct brw_context *brw, brw_inst *insn,
    int target_compacted_count = compacted_counts[target_old_ip];
 
    jump_count_compacted -= (target_compacted_count - this_compacted_count);
-   brw_inst_set_gen4_jump_count(brw, insn, jump_count_compacted >> shift);
+   brw_inst_set_gen4_jump_count(devinfo, insn, jump_count_compacted >> shift);
 }
 
 void
@@ -1359,6 +1367,7 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
                          int num_annotations, struct annotation *annotation)
 {
    struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    void *store = p->store + start_offset / 16;
    /* For an instruction at byte offset 16*i before compaction, this is the
     * number of compacted instructions minus the number of padding NOP/NENOPs
@@ -1403,9 +1412,9 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
           * aligned on G45.
           */
          if ((offset & sizeof(brw_compact_inst)) != 0 &&
-             (((brw_inst_opcode(brw, src) == BRW_OPCODE_SEND ||
-                brw_inst_opcode(brw, src) == BRW_OPCODE_SENDC) &&
-               brw_inst_eot(brw, src)) ||
+             (((brw_inst_opcode(devinfo, src) == BRW_OPCODE_SEND ||
+                brw_inst_opcode(devinfo, src) == BRW_OPCODE_SENDC) &&
+               brw_inst_eot(devinfo, src)) ||
               brw->is_g4x)) {
             brw_compact_inst *align = store + offset;
             memset(align, 0, sizeof(*align));
@@ -1433,12 +1442,12 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
    /* Fix up control flow offsets. */
    p->next_insn_offset = start_offset + offset;
    for (offset = 0; offset < p->next_insn_offset - start_offset;
-        offset = next_offset(brw, store, offset)) {
+        offset = next_offset(devinfo, store, offset)) {
       brw_inst *insn = store + offset;
       int this_old_ip = old_ip[offset / sizeof(brw_compact_inst)];
       int this_compacted_count = compacted_counts[this_old_ip];
 
-      switch (brw_inst_opcode(brw, insn)) {
+      switch (brw_inst_opcode(devinfo, insn)) {
       case BRW_OPCODE_BREAK:
       case BRW_OPCODE_CONTINUE:
       case BRW_OPCODE_HALT:
@@ -1455,7 +1464,7 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
       case BRW_OPCODE_ENDIF:
       case BRW_OPCODE_WHILE:
          if (brw->gen >= 7) {
-            if (brw_inst_cmpt_control(brw, insn)) {
+            if (brw_inst_cmpt_control(devinfo, insn)) {
                brw_inst uncompacted;
                brw_uncompact_instruction(brw, &uncompacted,
                                          (brw_compact_inst *)insn);
@@ -1470,15 +1479,15 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
                update_uip_jip(brw, insn, this_old_ip, compacted_counts);
             }
          } else if (brw->gen == 6) {
-            assert(!brw_inst_cmpt_control(brw, insn));
+            assert(!brw_inst_cmpt_control(devinfo, insn));
 
             /* Jump Count is in units of compacted instructions on Gen6. */
-            int jump_count_compacted = brw_inst_gen6_jump_count(brw, insn);
+            int jump_count_compacted = brw_inst_gen6_jump_count(devinfo, insn);
 
             int target_old_ip = this_old_ip + (jump_count_compacted / 2);
             int target_compacted_count = compacted_counts[target_old_ip];
             jump_count_compacted -= (target_compacted_count - this_compacted_count);
-            brw_inst_set_gen6_jump_count(brw, insn, jump_count_compacted);
+            brw_inst_set_gen6_jump_count(devinfo, insn, jump_count_compacted);
          } else {
             update_gen4_jump_count(brw, insn, this_old_ip, compacted_counts);
          }
@@ -1489,20 +1498,20 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
           * and Gens that use this cannot compact instructions with immediate
           * operands.
           */
-         if (brw_inst_cmpt_control(brw, insn))
+         if (brw_inst_cmpt_control(devinfo, insn))
             break;
 
-         if (brw_inst_dst_reg_file(brw, insn) == BRW_ARCHITECTURE_REGISTER_FILE &&
-             brw_inst_dst_da_reg_nr(brw, insn) == BRW_ARF_IP) {
-            assert(brw_inst_src1_reg_file(brw, insn) == BRW_IMMEDIATE_VALUE);
+         if (brw_inst_dst_reg_file(devinfo, insn) == BRW_ARCHITECTURE_REGISTER_FILE &&
+             brw_inst_dst_da_reg_nr(devinfo, insn) == BRW_ARF_IP) {
+            assert(brw_inst_src1_reg_file(devinfo, insn) == BRW_IMMEDIATE_VALUE);
 
             int shift = 3;
-            int jump_compacted = brw_inst_imm_d(brw, insn) >> shift;
+            int jump_compacted = brw_inst_imm_d(devinfo, insn) >> shift;
 
             int target_old_ip = this_old_ip + (jump_compacted / 2);
             int target_compacted_count = compacted_counts[target_old_ip];
             jump_compacted -= (target_compacted_count - this_compacted_count);
-            brw_inst_set_imm_ud(brw, insn, jump_compacted << shift);
+            brw_inst_set_imm_ud(devinfo, insn, jump_compacted << shift);
          }
          break;
       }
@@ -1529,12 +1538,12 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
                 sizeof(brw_inst) != annotation[i].offset) {
             assert(start_offset + old_ip[offset / sizeof(brw_compact_inst)] *
                    sizeof(brw_inst) < annotation[i].offset);
-            offset = next_offset(brw, store, offset);
+            offset = next_offset(devinfo, store, offset);
          }
 
          annotation[i].offset = start_offset + offset;
 
-         offset = next_offset(brw, store, offset);
+         offset = next_offset(devinfo, store, offset);
       }
 
       annotation[num_annotations].offset = p->next_insn_offset;
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index b9faf36..d11c220 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -91,7 +91,7 @@ gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg)
  * The hardware encoding may depend on whether the value is an immediate.
  */
 unsigned
-brw_reg_type_to_hw_type(const struct brw_context *brw,
+brw_reg_type_to_hw_type(const struct brw_device_info *devinfo,
                         enum brw_reg_type type, unsigned file)
 {
    if (file == BRW_IMMEDIATE_VALUE) {
@@ -113,7 +113,7 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
       };
       assert(type < ARRAY_SIZE(imm_hw_types));
       assert(imm_hw_types[type] != -1);
-      assert(brw->gen >= 8 || type < BRW_REGISTER_TYPE_DF);
+      assert(devinfo->gen >= 8 || type < BRW_REGISTER_TYPE_DF);
       return imm_hw_types[type];
    } else {
       /* Non-immediate registers */
@@ -135,8 +135,8 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
       };
       assert(type < ARRAY_SIZE(hw_types));
       assert(hw_types[type] != -1);
-      assert(brw->gen >= 7 || type < BRW_REGISTER_TYPE_DF);
-      assert(brw->gen >= 8 || type < BRW_REGISTER_TYPE_HF);
+      assert(devinfo->gen >= 7 || type < BRW_REGISTER_TYPE_DF);
+      assert(devinfo->gen >= 8 || type < BRW_REGISTER_TYPE_HF);
       return hw_types[type];
    }
 }
@@ -144,7 +144,7 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
 void
 brw_set_dest(struct brw_compile *p, brw_inst *inst, struct brw_reg dest)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE &&
        dest.file != BRW_MESSAGE_REGISTER_FILE)
@@ -152,22 +152,23 @@ brw_set_dest(struct brw_compile *p, brw_inst *inst, struct brw_reg dest)
 
    gen7_convert_mrf_to_grf(p, &dest);
 
-   brw_inst_set_dst_reg_file(brw, inst, dest.file);
-   brw_inst_set_dst_reg_type(brw, inst, brw_reg_type_to_hw_type(brw, dest.type,
-                                                                dest.file));
-   brw_inst_set_dst_address_mode(brw, inst, dest.address_mode);
+   brw_inst_set_dst_reg_file(devinfo, inst, dest.file);
+   brw_inst_set_dst_reg_type(devinfo, inst,
+                             brw_reg_type_to_hw_type(devinfo, dest.type,
+                                                     dest.file));
+   brw_inst_set_dst_address_mode(devinfo, inst, dest.address_mode);
 
    if (dest.address_mode == BRW_ADDRESS_DIRECT) {
-      brw_inst_set_dst_da_reg_nr(brw, inst, dest.nr);
+      brw_inst_set_dst_da_reg_nr(devinfo, inst, dest.nr);
 
-      if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-         brw_inst_set_dst_da1_subreg_nr(brw, inst, dest.subnr);
+      if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+         brw_inst_set_dst_da1_subreg_nr(devinfo, inst, dest.subnr);
 	 if (dest.hstride == BRW_HORIZONTAL_STRIDE_0)
 	    dest.hstride = BRW_HORIZONTAL_STRIDE_1;
-         brw_inst_set_dst_hstride(brw, inst, dest.hstride);
+         brw_inst_set_dst_hstride(devinfo, inst, dest.hstride);
       } else {
-         brw_inst_set_dst_da16_subreg_nr(brw, inst, dest.subnr / 16);
-         brw_inst_set_da16_writemask(brw, inst, dest.dw1.bits.writemask);
+         brw_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16);
+         brw_inst_set_da16_writemask(devinfo, inst, dest.dw1.bits.writemask);
          if (dest.file == BRW_GENERAL_REGISTER_FILE ||
              dest.file == BRW_MESSAGE_REGISTER_FILE) {
             assert(dest.dw1.bits.writemask != 0);
@@ -176,24 +177,24 @@ brw_set_dest(struct brw_compile *p, brw_inst *inst, struct brw_reg dest)
 	  *    Although Dst.HorzStride is a don't care for Align16, HW needs
 	  *    this to be programmed as "01".
 	  */
-         brw_inst_set_dst_hstride(brw, inst, 1);
+         brw_inst_set_dst_hstride(devinfo, inst, 1);
       }
    } else {
-      brw_inst_set_dst_ia_subreg_nr(brw, inst, dest.subnr);
+      brw_inst_set_dst_ia_subreg_nr(devinfo, inst, dest.subnr);
 
       /* These are different sizes in align1 vs align16:
        */
-      if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-         brw_inst_set_dst_ia1_addr_imm(brw, inst,
+      if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+         brw_inst_set_dst_ia1_addr_imm(devinfo, inst,
                                        dest.dw1.bits.indirect_offset);
 	 if (dest.hstride == BRW_HORIZONTAL_STRIDE_0)
 	    dest.hstride = BRW_HORIZONTAL_STRIDE_1;
-         brw_inst_set_dst_hstride(brw, inst, dest.hstride);
+         brw_inst_set_dst_hstride(devinfo, inst, dest.hstride);
       } else {
-         brw_inst_set_dst_ia16_addr_imm(brw, inst,
+         brw_inst_set_dst_ia16_addr_imm(devinfo, inst,
                                         dest.dw1.bits.indirect_offset);
 	 /* even ignored in da16, still need to set as '01' */
-         brw_inst_set_dst_hstride(brw, inst, 1);
+         brw_inst_set_dst_hstride(devinfo, inst, 1);
       }
    }
 
@@ -202,13 +203,14 @@ brw_set_dest(struct brw_compile *p, brw_inst *inst, struct brw_reg dest)
     * small registers, we automatically reduce it to match the register size.
     */
    if (dest.width < BRW_EXECUTE_8)
-      brw_inst_set_exec_size(brw, inst, dest.width);
+      brw_inst_set_exec_size(devinfo, inst, dest.width);
 }
 
 extern int reg_type_size[];
 
 static void
-validate_reg(const struct brw_context *brw, brw_inst *inst, struct brw_reg reg)
+validate_reg(const struct brw_device_info *devinfo,
+             brw_inst *inst, struct brw_reg reg)
 {
    const int hstride_for_reg[] = {0, 1, 2, 4};
    const int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32};
@@ -222,8 +224,8 @@ validate_reg(const struct brw_context *brw, brw_inst *inst, struct brw_reg reg)
        * destination horiz stride has to be a word.
        */
       if (reg.type == BRW_REGISTER_TYPE_V) {
-         assert(hstride_for_reg[brw_inst_dst_hstride(brw, inst)] *
-                reg_type_size[brw_inst_dst_reg_type(brw, inst)] == 2);
+         assert(hstride_for_reg[brw_inst_dst_hstride(devinfo, inst)] *
+                reg_type_size[brw_inst_dst_reg_type(devinfo, inst)] == 2);
       }
 
       return;
@@ -246,9 +248,9 @@ validate_reg(const struct brw_context *brw, brw_inst *inst, struct brw_reg reg)
    assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg));
    width = width_for_reg[reg.width];
 
-   assert(brw_inst_exec_size(brw, inst) >= 0 &&
-          brw_inst_exec_size(brw, inst) < ARRAY_SIZE(execsize_for_reg));
-   execsize = execsize_for_reg[brw_inst_exec_size(brw, inst)];
+   assert(brw_inst_exec_size(devinfo, inst) >= 0 &&
+          brw_inst_exec_size(devinfo, inst) < ARRAY_SIZE(execsize_for_reg));
+   execsize = execsize_for_reg[brw_inst_exec_size(devinfo, inst)];
 
    /* Restrictions from 3.3.10: Register Region Restrictions. */
    /* 3. */
@@ -296,15 +298,15 @@ is_compactable_immediate(unsigned imm)
 void
 brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE)
       assert(reg.nr < 128);
 
    gen7_convert_mrf_to_grf(p, &reg);
 
-   if (brw->gen >= 6 && (brw_inst_opcode(brw, inst) == BRW_OPCODE_SEND ||
-                         brw_inst_opcode(brw, inst) == BRW_OPCODE_SENDC)) {
+   if (devinfo->gen >= 6 && (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
+                             brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC)) {
       /* Any source modifiers or regions will be ignored, since this just
        * identifies the MRF/GRF to start reading the message contents from.
        * Check for some likely failures.
@@ -314,17 +316,17 @@ brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
       assert(reg.address_mode == BRW_ADDRESS_DIRECT);
    }
 
-   validate_reg(brw, inst, reg);
+   validate_reg(devinfo, inst, reg);
 
-   brw_inst_set_src0_reg_file(brw, inst, reg.file);
-   brw_inst_set_src0_reg_type(brw, inst,
-                              brw_reg_type_to_hw_type(brw, reg.type, reg.file));
-   brw_inst_set_src0_abs(brw, inst, reg.abs);
-   brw_inst_set_src0_negate(brw, inst, reg.negate);
-   brw_inst_set_src0_address_mode(brw, inst, reg.address_mode);
+   brw_inst_set_src0_reg_file(devinfo, inst, reg.file);
+   brw_inst_set_src0_reg_type(devinfo, inst,
+                              brw_reg_type_to_hw_type(devinfo, reg.type, reg.file));
+   brw_inst_set_src0_abs(devinfo, inst, reg.abs);
+   brw_inst_set_src0_negate(devinfo, inst, reg.negate);
+   brw_inst_set_src0_address_mode(devinfo, inst, reg.address_mode);
 
    if (reg.file == BRW_IMMEDIATE_VALUE) {
-      brw_inst_set_imm_ud(brw, inst, reg.dw1.ud);
+      brw_inst_set_imm_ud(devinfo, inst, reg.dw1.ud);
 
       /* The Bspec's section titled "Non-present Operands" claims that if src0
        * is an immediate that src1's type must be the same as that of src0.
@@ -348,12 +350,12 @@ brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
        * so it's not clear whether it has the restriction. We'll assume it was
        * lifted on SNB. (FINISHME: decode the GM45 tables and check.)
        */
-      brw_inst_set_src1_reg_file(brw, inst, BRW_ARCHITECTURE_REGISTER_FILE);
-      if (brw->gen < 6) {
-         brw_inst_set_src1_reg_type(brw, inst,
-                                    brw_inst_src0_reg_type(brw, inst));
+      brw_inst_set_src1_reg_file(devinfo, inst, BRW_ARCHITECTURE_REGISTER_FILE);
+      if (devinfo->gen < 6) {
+         brw_inst_set_src1_reg_type(devinfo, inst,
+                                    brw_inst_src0_reg_type(devinfo, inst));
       } else {
-         brw_inst_set_src1_reg_type(brw, inst, BRW_HW_REG_TYPE_UD);
+         brw_inst_set_src1_reg_type(devinfo, inst, BRW_HW_REG_TYPE_UD);
       }
 
       /* Compacted instructions only have 12-bits (plus 1 for the other 20)
@@ -367,67 +369,67 @@ brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
        *
        * If we see a 0.0:F, change the type to VF so that it can be compacted.
        */
-      if (brw_inst_imm_ud(brw, inst) == 0x0 &&
-          brw_inst_src0_reg_type(brw, inst) == BRW_HW_REG_TYPE_F) {
-         brw_inst_set_src0_reg_type(brw, inst, BRW_HW_REG_IMM_TYPE_VF);
+      if (brw_inst_imm_ud(devinfo, inst) == 0x0 &&
+          brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_REG_TYPE_F) {
+         brw_inst_set_src0_reg_type(devinfo, inst, BRW_HW_REG_IMM_TYPE_VF);
       }
 
       /* There are no mappings for dst:d | i:d, so if the immediate is suitable
        * set the types to :UD so the instruction can be compacted.
        */
-      if (is_compactable_immediate(brw_inst_imm_ud(brw, inst)) &&
-          brw_inst_cond_modifier(brw, inst) == BRW_CONDITIONAL_NONE &&
-          brw_inst_src0_reg_type(brw, inst) == BRW_HW_REG_TYPE_D &&
-          brw_inst_dst_reg_type(brw, inst) == BRW_HW_REG_TYPE_D) {
-         brw_inst_set_src0_reg_type(brw, inst, BRW_HW_REG_TYPE_UD);
-         brw_inst_set_dst_reg_type(brw, inst, BRW_HW_REG_TYPE_UD);
+      if (is_compactable_immediate(brw_inst_imm_ud(devinfo, inst)) &&
+          brw_inst_cond_modifier(devinfo, inst) == BRW_CONDITIONAL_NONE &&
+          brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_REG_TYPE_D &&
+          brw_inst_dst_reg_type(devinfo, inst) == BRW_HW_REG_TYPE_D) {
+         brw_inst_set_src0_reg_type(devinfo, inst, BRW_HW_REG_TYPE_UD);
+         brw_inst_set_dst_reg_type(devinfo, inst, BRW_HW_REG_TYPE_UD);
       }
    } else {
       if (reg.address_mode == BRW_ADDRESS_DIRECT) {
-         brw_inst_set_src0_da_reg_nr(brw, inst, reg.nr);
-         if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-             brw_inst_set_src0_da1_subreg_nr(brw, inst, reg.subnr);
+         brw_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr);
+         if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+             brw_inst_set_src0_da1_subreg_nr(devinfo, inst, reg.subnr);
 	 } else {
-            brw_inst_set_src0_da16_subreg_nr(brw, inst, reg.subnr / 16);
+            brw_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16);
 	 }
       } else {
-         brw_inst_set_src0_ia_subreg_nr(brw, inst, reg.subnr);
+         brw_inst_set_src0_ia_subreg_nr(devinfo, inst, reg.subnr);
 
-         if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-            brw_inst_set_src0_ia1_addr_imm(brw, inst, reg.dw1.bits.indirect_offset);
+         if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+            brw_inst_set_src0_ia1_addr_imm(devinfo, inst, reg.dw1.bits.indirect_offset);
 	 } else {
-            brw_inst_set_src0_ia_subreg_nr(brw, inst, reg.dw1.bits.indirect_offset);
+            brw_inst_set_src0_ia_subreg_nr(devinfo, inst, reg.dw1.bits.indirect_offset);
 	 }
       }
 
-      if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
+      if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
 	 if (reg.width == BRW_WIDTH_1 &&
-             brw_inst_exec_size(brw, inst) == BRW_EXECUTE_1) {
-            brw_inst_set_src0_hstride(brw, inst, BRW_HORIZONTAL_STRIDE_0);
-            brw_inst_set_src0_width(brw, inst, BRW_WIDTH_1);
-            brw_inst_set_src0_vstride(brw, inst, BRW_VERTICAL_STRIDE_0);
+             brw_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1) {
+            brw_inst_set_src0_hstride(devinfo, inst, BRW_HORIZONTAL_STRIDE_0);
+            brw_inst_set_src0_width(devinfo, inst, BRW_WIDTH_1);
+            brw_inst_set_src0_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_0);
 	 } else {
-            brw_inst_set_src0_hstride(brw, inst, reg.hstride);
-            brw_inst_set_src0_width(brw, inst, reg.width);
-            brw_inst_set_src0_vstride(brw, inst, reg.vstride);
+            brw_inst_set_src0_hstride(devinfo, inst, reg.hstride);
+            brw_inst_set_src0_width(devinfo, inst, reg.width);
+            brw_inst_set_src0_vstride(devinfo, inst, reg.vstride);
 	 }
       } else {
-         brw_inst_set_src0_da16_swiz_x(brw, inst,
+         brw_inst_set_src0_da16_swiz_x(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X));
-         brw_inst_set_src0_da16_swiz_y(brw, inst,
+         brw_inst_set_src0_da16_swiz_y(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y));
-         brw_inst_set_src0_da16_swiz_z(brw, inst,
+         brw_inst_set_src0_da16_swiz_z(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z));
-         brw_inst_set_src0_da16_swiz_w(brw, inst,
+         brw_inst_set_src0_da16_swiz_w(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W));
 
 	 /* This is an oddity of the fact we're using the same
 	  * descriptions for registers in align_16 as align_1:
 	  */
 	 if (reg.vstride == BRW_VERTICAL_STRIDE_8)
-            brw_inst_set_src0_vstride(brw, inst, BRW_VERTICAL_STRIDE_4);
+            brw_inst_set_src0_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_4);
 	 else
-            brw_inst_set_src0_vstride(brw, inst, reg.vstride);
+            brw_inst_set_src0_vstride(devinfo, inst, reg.vstride);
       }
    }
 }
@@ -436,7 +438,7 @@ brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
 void
 brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE)
       assert(reg.nr < 128);
@@ -444,20 +446,20 @@ brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
    gen7_convert_mrf_to_grf(p, &reg);
    assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
 
-   validate_reg(brw, inst, reg);
+   validate_reg(devinfo, inst, reg);
 
-   brw_inst_set_src1_reg_file(brw, inst, reg.file);
-   brw_inst_set_src1_reg_type(brw, inst,
-                              brw_reg_type_to_hw_type(brw, reg.type, reg.file));
-   brw_inst_set_src1_abs(brw, inst, reg.abs);
-   brw_inst_set_src1_negate(brw, inst, reg.negate);
+   brw_inst_set_src1_reg_file(devinfo, inst, reg.file);
+   brw_inst_set_src1_reg_type(devinfo, inst,
+                              brw_reg_type_to_hw_type(devinfo, reg.type, reg.file));
+   brw_inst_set_src1_abs(devinfo, inst, reg.abs);
+   brw_inst_set_src1_negate(devinfo, inst, reg.negate);
 
    /* Only src1 can be immediate in two-argument instructions.
     */
-   assert(brw_inst_src0_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE);
+   assert(brw_inst_src0_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE);
 
    if (reg.file == BRW_IMMEDIATE_VALUE) {
-      brw_inst_set_imm_ud(brw, inst, reg.dw1.ud);
+      brw_inst_set_imm_ud(devinfo, inst, reg.dw1.ud);
    } else {
       /* This is a hardware restriction, which may or may not be lifted
        * in the future:
@@ -465,41 +467,41 @@ brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
       assert (reg.address_mode == BRW_ADDRESS_DIRECT);
       /* assert (reg.file == BRW_GENERAL_REGISTER_FILE); */
 
-      brw_inst_set_src1_da_reg_nr(brw, inst, reg.nr);
-      if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
-         brw_inst_set_src1_da1_subreg_nr(brw, inst, reg.subnr);
+      brw_inst_set_src1_da_reg_nr(devinfo, inst, reg.nr);
+      if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
+         brw_inst_set_src1_da1_subreg_nr(devinfo, inst, reg.subnr);
       } else {
-         brw_inst_set_src1_da16_subreg_nr(brw, inst, reg.subnr / 16);
+         brw_inst_set_src1_da16_subreg_nr(devinfo, inst, reg.subnr / 16);
       }
 
-      if (brw_inst_access_mode(brw, inst) == BRW_ALIGN_1) {
+      if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
 	 if (reg.width == BRW_WIDTH_1 &&
-             brw_inst_exec_size(brw, inst) == BRW_EXECUTE_1) {
-            brw_inst_set_src1_hstride(brw, inst, BRW_HORIZONTAL_STRIDE_0);
-            brw_inst_set_src1_width(brw, inst, BRW_WIDTH_1);
-            brw_inst_set_src1_vstride(brw, inst, BRW_VERTICAL_STRIDE_0);
+             brw_inst_exec_size(devinfo, inst) == BRW_EXECUTE_1) {
+            brw_inst_set_src1_hstride(devinfo, inst, BRW_HORIZONTAL_STRIDE_0);
+            brw_inst_set_src1_width(devinfo, inst, BRW_WIDTH_1);
+            brw_inst_set_src1_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_0);
 	 } else {
-            brw_inst_set_src1_hstride(brw, inst, reg.hstride);
-            brw_inst_set_src1_width(brw, inst, reg.width);
-            brw_inst_set_src1_vstride(brw, inst, reg.vstride);
+            brw_inst_set_src1_hstride(devinfo, inst, reg.hstride);
+            brw_inst_set_src1_width(devinfo, inst, reg.width);
+            brw_inst_set_src1_vstride(devinfo, inst, reg.vstride);
 	 }
       } else {
-         brw_inst_set_src1_da16_swiz_x(brw, inst,
+         brw_inst_set_src1_da16_swiz_x(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X));
-         brw_inst_set_src1_da16_swiz_y(brw, inst,
+         brw_inst_set_src1_da16_swiz_y(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y));
-         brw_inst_set_src1_da16_swiz_z(brw, inst,
+         brw_inst_set_src1_da16_swiz_z(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z));
-         brw_inst_set_src1_da16_swiz_w(brw, inst,
+         brw_inst_set_src1_da16_swiz_w(devinfo, inst,
             BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W));
 
 	 /* This is an oddity of the fact we're using the same
 	  * descriptions for registers in align_16 as align_1:
 	  */
 	 if (reg.vstride == BRW_VERTICAL_STRIDE_8)
-            brw_inst_set_src1_vstride(brw, inst, BRW_VERTICAL_STRIDE_4);
+            brw_inst_set_src1_vstride(devinfo, inst, BRW_VERTICAL_STRIDE_4);
 	 else
-            brw_inst_set_src1_vstride(brw, inst, reg.vstride);
+            brw_inst_set_src1_vstride(devinfo, inst, reg.vstride);
       }
    }
 }
@@ -521,7 +523,7 @@ brw_set_message_descriptor(struct brw_compile *p,
 			   bool header_present,
 			   bool end_of_thread)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    brw_set_src1(p, inst, brw_imm_d(0));
 
@@ -532,17 +534,17 @@ brw_set_message_descriptor(struct brw_compile *p,
     * since they go on the later SEND/SENDC instead and if set here would
     * instead clobber the conditionalmod bits.
     */
-   unsigned opcode = brw_inst_opcode(brw, inst);
+   unsigned opcode = brw_inst_opcode(devinfo, inst);
    if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
-      brw_inst_set_sfid(brw, inst, sfid);
+      brw_inst_set_sfid(devinfo, inst, sfid);
    }
 
-   brw_inst_set_mlen(brw, inst, msg_length);
-   brw_inst_set_rlen(brw, inst, response_length);
-   brw_inst_set_eot(brw, inst, end_of_thread);
+   brw_inst_set_mlen(devinfo, inst, msg_length);
+   brw_inst_set_rlen(devinfo, inst, response_length);
+   brw_inst_set_eot(devinfo, inst, end_of_thread);
 
-   if (brw->gen >= 5) {
-      brw_inst_set_header_present(brw, inst, header_present);
+   if (devinfo->gen >= 5) {
+      brw_inst_set_header_present(devinfo, inst, header_present);
    }
 }
 
@@ -553,7 +555,7 @@ static void brw_set_math_message( struct brw_compile *p,
 				  bool low_precision,
 				  unsigned dataType )
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    unsigned msg_length;
    unsigned response_length;
 
@@ -584,12 +586,12 @@ static void brw_set_math_message( struct brw_compile *p,
 
    brw_set_message_descriptor(p, inst, BRW_SFID_MATH,
 			      msg_length, response_length, false, false);
-   brw_inst_set_math_msg_function(brw, inst, function);
-   brw_inst_set_math_msg_signed_int(brw, inst, integer_type);
-   brw_inst_set_math_msg_precision(brw, inst, low_precision);
-   brw_inst_set_math_msg_saturate(brw, inst, brw_inst_saturate(brw, inst));
-   brw_inst_set_math_msg_data_type(brw, inst, dataType);
-   brw_inst_set_saturate(brw, inst, 0);
+   brw_inst_set_math_msg_function(devinfo, inst, function);
+   brw_inst_set_math_msg_signed_int(devinfo, inst, integer_type);
+   brw_inst_set_math_msg_precision(devinfo, inst, low_precision);
+   brw_inst_set_math_msg_saturate(devinfo, inst, brw_inst_saturate(devinfo, inst));
+   brw_inst_set_math_msg_data_type(devinfo, inst, dataType);
+   brw_inst_set_saturate(devinfo, inst, 0);
 }
 
 
@@ -599,17 +601,17 @@ static void brw_set_ff_sync_message(struct brw_compile *p,
 				    unsigned response_length,
 				    bool end_of_thread)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    brw_set_message_descriptor(p, insn, BRW_SFID_URB,
 			      1, response_length, true, end_of_thread);
-   brw_inst_set_urb_opcode(brw, insn, 1); /* FF_SYNC */
-   brw_inst_set_urb_allocate(brw, insn, allocate);
+   brw_inst_set_urb_opcode(devinfo, insn, 1); /* FF_SYNC */
+   brw_inst_set_urb_allocate(devinfo, insn, allocate);
    /* The following fields are not used by FF_SYNC: */
-   brw_inst_set_urb_global_offset(brw, insn, 0);
-   brw_inst_set_urb_swizzle_control(brw, insn, 0);
-   brw_inst_set_urb_used(brw, insn, 0);
-   brw_inst_set_urb_complete(brw, insn, 0);
+   brw_inst_set_urb_global_offset(devinfo, insn, 0);
+   brw_inst_set_urb_swizzle_control(devinfo, insn, 0);
+   brw_inst_set_urb_used(devinfo, insn, 0);
+   brw_inst_set_urb_complete(devinfo, insn, 0);
 }
 
 static void brw_set_urb_message( struct brw_compile *p,
@@ -620,11 +622,11 @@ static void brw_set_urb_message( struct brw_compile *p,
 				 unsigned offset,
 				 unsigned swizzle_control )
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
-   assert(brw->gen < 7 || swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE);
-   assert(brw->gen < 7 || !(flags & BRW_URB_WRITE_ALLOCATE));
-   assert(brw->gen >= 7 || !(flags & BRW_URB_WRITE_PER_SLOT_OFFSET));
+   assert(devinfo->gen < 7 || swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE);
+   assert(devinfo->gen < 7 || !(flags & BRW_URB_WRITE_ALLOCATE));
+   assert(devinfo->gen >= 7 || !(flags & BRW_URB_WRITE_PER_SLOT_OFFSET));
 
    brw_set_message_descriptor(p, insn, BRW_SFID_URB,
 			      msg_length, response_length, true,
@@ -632,23 +634,23 @@ static void brw_set_urb_message( struct brw_compile *p,
 
    if (flags & BRW_URB_WRITE_OWORD) {
       assert(msg_length == 2); /* header + one OWORD of data */
-      brw_inst_set_urb_opcode(brw, insn, BRW_URB_OPCODE_WRITE_OWORD);
+      brw_inst_set_urb_opcode(devinfo, insn, BRW_URB_OPCODE_WRITE_OWORD);
    } else {
-      brw_inst_set_urb_opcode(brw, insn, BRW_URB_OPCODE_WRITE_HWORD);
+      brw_inst_set_urb_opcode(devinfo, insn, BRW_URB_OPCODE_WRITE_HWORD);
    }
 
-   brw_inst_set_urb_global_offset(brw, insn, offset);
-   brw_inst_set_urb_swizzle_control(brw, insn, swizzle_control);
+   brw_inst_set_urb_global_offset(devinfo, insn, offset);
+   brw_inst_set_urb_swizzle_control(devinfo, insn, swizzle_control);
 
-   if (brw->gen < 8) {
-      brw_inst_set_urb_complete(brw, insn, !!(flags & BRW_URB_WRITE_COMPLETE));
+   if (devinfo->gen < 8) {
+      brw_inst_set_urb_complete(devinfo, insn, !!(flags & BRW_URB_WRITE_COMPLETE));
    }
 
-   if (brw->gen < 7) {
-      brw_inst_set_urb_allocate(brw, insn, !!(flags & BRW_URB_WRITE_ALLOCATE));
-      brw_inst_set_urb_used(brw, insn, !(flags & BRW_URB_WRITE_UNUSED));
+   if (devinfo->gen < 7) {
+      brw_inst_set_urb_allocate(devinfo, insn, !!(flags & BRW_URB_WRITE_ALLOCATE));
+      brw_inst_set_urb_used(devinfo, insn, !(flags & BRW_URB_WRITE_UNUSED));
    } else {
-      brw_inst_set_urb_per_slot_offset(brw, insn,
+      brw_inst_set_urb_per_slot_offset(devinfo, insn,
          !!(flags & BRW_URB_WRITE_PER_SLOT_OFFSET));
    }
 }
@@ -666,16 +668,16 @@ brw_set_dp_write_message(struct brw_compile *p,
 			 unsigned end_of_thread,
 			 unsigned send_commit_msg)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    unsigned sfid;
 
-   if (brw->gen >= 7) {
+   if (devinfo->gen >= 7) {
       /* Use the Render Cache for RT writes; otherwise use the Data Cache */
       if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE)
 	 sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
       else
 	 sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
-   } else if (brw->gen == 6) {
+   } else if (devinfo->gen == 6) {
       /* Use the render cache for all write messages. */
       sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
    } else {
@@ -685,12 +687,12 @@ brw_set_dp_write_message(struct brw_compile *p,
    brw_set_message_descriptor(p, insn, sfid, msg_length, response_length,
 			      header_present, end_of_thread);
 
-   brw_inst_set_binding_table_index(brw, insn, binding_table_index);
-   brw_inst_set_dp_write_msg_type(brw, insn, msg_type);
-   brw_inst_set_dp_write_msg_control(brw, insn, msg_control);
-   brw_inst_set_rt_last(brw, insn, last_render_target);
-   if (brw->gen < 7) {
-      brw_inst_set_dp_write_commit(brw, insn, send_commit_msg);
+   brw_inst_set_binding_table_index(devinfo, insn, binding_table_index);
+   brw_inst_set_dp_write_msg_type(devinfo, insn, msg_type);
+   brw_inst_set_dp_write_msg_control(devinfo, insn, msg_control);
+   brw_inst_set_rt_last(devinfo, insn, last_render_target);
+   if (devinfo->gen < 7) {
+      brw_inst_set_dp_write_commit(devinfo, insn, send_commit_msg);
    }
 }
 
@@ -705,12 +707,12 @@ brw_set_dp_read_message(struct brw_compile *p,
                         bool header_present,
 			unsigned response_length)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    unsigned sfid;
 
-   if (brw->gen >= 7) {
+   if (devinfo->gen >= 7) {
       sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
-   } else if (brw->gen == 6) {
+   } else if (devinfo->gen == 6) {
       if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE)
 	 sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
       else
@@ -722,11 +724,11 @@ brw_set_dp_read_message(struct brw_compile *p,
    brw_set_message_descriptor(p, insn, sfid, msg_length, response_length,
 			      header_present, false);
 
-   brw_inst_set_binding_table_index(brw, insn, binding_table_index);
-   brw_inst_set_dp_read_msg_type(brw, insn, msg_type);
-   brw_inst_set_dp_read_msg_control(brw, insn, msg_control);
-   if (brw->gen < 6)
-      brw_inst_set_dp_read_target_cache(brw, insn, target_cache);
+   brw_inst_set_binding_table_index(devinfo, insn, binding_table_index);
+   brw_inst_set_dp_read_msg_type(devinfo, insn, msg_type);
+   brw_inst_set_dp_read_msg_control(devinfo, insn, msg_control);
+   if (devinfo->gen < 6)
+      brw_inst_set_dp_read_target_cache(devinfo, insn, target_cache);
 }
 
 void
@@ -741,18 +743,18 @@ brw_set_sampler_message(struct brw_compile *p,
                         unsigned simd_mode,
                         unsigned return_format)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    brw_set_message_descriptor(p, inst, BRW_SFID_SAMPLER, msg_length,
 			      response_length, header_present, false);
 
-   brw_inst_set_binding_table_index(brw, inst, binding_table_index);
-   brw_inst_set_sampler(brw, inst, sampler);
-   brw_inst_set_sampler_msg_type(brw, inst, msg_type);
-   if (brw->gen >= 5) {
-      brw_inst_set_sampler_simd_mode(brw, inst, simd_mode);
-   } else if (brw->gen == 4 && !brw->is_g4x) {
-      brw_inst_set_sampler_return_format(brw, inst, return_format);
+   brw_inst_set_binding_table_index(devinfo, inst, binding_table_index);
+   brw_inst_set_sampler(devinfo, inst, sampler);
+   brw_inst_set_sampler_msg_type(devinfo, inst, msg_type);
+   if (devinfo->gen >= 5) {
+      brw_inst_set_sampler_simd_mode(devinfo, inst, simd_mode);
+   } else if (devinfo->gen == 4 && !devinfo->is_g4x) {
+      brw_inst_set_sampler_return_format(devinfo, inst, return_format);
    }
 }
 
@@ -768,24 +770,24 @@ gen7_set_dp_scratch_message(struct brw_compile *p,
                             unsigned rlen,
                             bool header_present)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    assert(num_regs == 1 || num_regs == 2 || num_regs == 4 ||
-          (brw->gen >= 8 && num_regs == 8));
+          (devinfo->gen >= 8 && num_regs == 8));
    brw_set_message_descriptor(p, inst, GEN7_SFID_DATAPORT_DATA_CACHE,
                               mlen, rlen, header_present, false);
-   brw_inst_set_dp_category(brw, inst, 1); /* Scratch Block Read/Write msgs */
-   brw_inst_set_scratch_read_write(brw, inst, write);
-   brw_inst_set_scratch_type(brw, inst, dword);
-   brw_inst_set_scratch_invalidate_after_read(brw, inst, invalidate_after_read);
-   brw_inst_set_scratch_block_size(brw, inst, ffs(num_regs) - 1);
-   brw_inst_set_scratch_addr_offset(brw, inst, addr_offset);
+   brw_inst_set_dp_category(devinfo, inst, 1); /* Scratch Block Read/Write msgs */
+   brw_inst_set_scratch_read_write(devinfo, inst, write);
+   brw_inst_set_scratch_type(devinfo, inst, dword);
+   brw_inst_set_scratch_invalidate_after_read(devinfo, inst, invalidate_after_read);
+   brw_inst_set_scratch_block_size(devinfo, inst, ffs(num_regs) - 1);
+   brw_inst_set_scratch_addr_offset(devinfo, inst, addr_offset);
 }
 
 #define next_insn brw_next_insn
 brw_inst *
 brw_next_insn(struct brw_compile *p, unsigned opcode)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    if (p->nr_insn + 1 > p->store_size) {
@@ -797,7 +799,7 @@ brw_next_insn(struct brw_compile *p, unsigned opcode)
    insn = &p->store[p->nr_insn++];
    memcpy(insn, p->current, sizeof(*insn));
 
-   brw_inst_set_opcode(brw, insn, opcode);
+   brw_inst_set_opcode(devinfo, insn, opcode);
    return insn;
 }
 
@@ -837,12 +839,12 @@ static brw_inst *
 brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest,
          struct brw_reg src0, struct brw_reg src1, struct brw_reg src2)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *inst = next_insn(p, opcode);
 
    gen7_convert_mrf_to_grf(p, &dest);
 
-   assert(brw_inst_access_mode(brw, inst) == BRW_ALIGN_16);
+   assert(brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_16);
 
    assert(dest.file == BRW_GENERAL_REGISTER_FILE ||
 	  dest.file == BRW_MESSAGE_REGISTER_FILE);
@@ -851,48 +853,48 @@ brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest,
    assert(dest.type == BRW_REGISTER_TYPE_F ||
           dest.type == BRW_REGISTER_TYPE_D ||
           dest.type == BRW_REGISTER_TYPE_UD);
-   if (brw->gen == 6) {
-      brw_inst_set_3src_dst_reg_file(brw, inst,
+   if (devinfo->gen == 6) {
+      brw_inst_set_3src_dst_reg_file(devinfo, inst,
                                      dest.file == BRW_MESSAGE_REGISTER_FILE);
    }
-   brw_inst_set_3src_dst_reg_nr(brw, inst, dest.nr);
-   brw_inst_set_3src_dst_subreg_nr(brw, inst, dest.subnr / 16);
-   brw_inst_set_3src_dst_writemask(brw, inst, dest.dw1.bits.writemask);
+   brw_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr);
+   brw_inst_set_3src_dst_subreg_nr(devinfo, inst, dest.subnr / 16);
+   brw_inst_set_3src_dst_writemask(devinfo, inst, dest.dw1.bits.writemask);
 
    assert(src0.file == BRW_GENERAL_REGISTER_FILE);
    assert(src0.address_mode == BRW_ADDRESS_DIRECT);
    assert(src0.nr < 128);
-   brw_inst_set_3src_src0_swizzle(brw, inst, src0.dw1.bits.swizzle);
-   brw_inst_set_3src_src0_subreg_nr(brw, inst, get_3src_subreg_nr(src0));
-   brw_inst_set_3src_src0_reg_nr(brw, inst, src0.nr);
-   brw_inst_set_3src_src0_abs(brw, inst, src0.abs);
-   brw_inst_set_3src_src0_negate(brw, inst, src0.negate);
-   brw_inst_set_3src_src0_rep_ctrl(brw, inst,
+   brw_inst_set_3src_src0_swizzle(devinfo, inst, src0.dw1.bits.swizzle);
+   brw_inst_set_3src_src0_subreg_nr(devinfo, inst, get_3src_subreg_nr(src0));
+   brw_inst_set_3src_src0_reg_nr(devinfo, inst, src0.nr);
+   brw_inst_set_3src_src0_abs(devinfo, inst, src0.abs);
+   brw_inst_set_3src_src0_negate(devinfo, inst, src0.negate);
+   brw_inst_set_3src_src0_rep_ctrl(devinfo, inst,
                                    src0.vstride == BRW_VERTICAL_STRIDE_0);
 
    assert(src1.file == BRW_GENERAL_REGISTER_FILE);
    assert(src1.address_mode == BRW_ADDRESS_DIRECT);
    assert(src1.nr < 128);
-   brw_inst_set_3src_src1_swizzle(brw, inst, src1.dw1.bits.swizzle);
-   brw_inst_set_3src_src1_subreg_nr(brw, inst, get_3src_subreg_nr(src1));
-   brw_inst_set_3src_src1_reg_nr(brw, inst, src1.nr);
-   brw_inst_set_3src_src1_abs(brw, inst, src1.abs);
-   brw_inst_set_3src_src1_negate(brw, inst, src1.negate);
-   brw_inst_set_3src_src1_rep_ctrl(brw, inst,
+   brw_inst_set_3src_src1_swizzle(devinfo, inst, src1.dw1.bits.swizzle);
+   brw_inst_set_3src_src1_subreg_nr(devinfo, inst, get_3src_subreg_nr(src1));
+   brw_inst_set_3src_src1_reg_nr(devinfo, inst, src1.nr);
+   brw_inst_set_3src_src1_abs(devinfo, inst, src1.abs);
+   brw_inst_set_3src_src1_negate(devinfo, inst, src1.negate);
+   brw_inst_set_3src_src1_rep_ctrl(devinfo, inst,
                                    src1.vstride == BRW_VERTICAL_STRIDE_0);
 
    assert(src2.file == BRW_GENERAL_REGISTER_FILE);
    assert(src2.address_mode == BRW_ADDRESS_DIRECT);
    assert(src2.nr < 128);
-   brw_inst_set_3src_src2_swizzle(brw, inst, src2.dw1.bits.swizzle);
-   brw_inst_set_3src_src2_subreg_nr(brw, inst, get_3src_subreg_nr(src2));
-   brw_inst_set_3src_src2_reg_nr(brw, inst, src2.nr);
-   brw_inst_set_3src_src2_abs(brw, inst, src2.abs);
-   brw_inst_set_3src_src2_negate(brw, inst, src2.negate);
-   brw_inst_set_3src_src2_rep_ctrl(brw, inst,
+   brw_inst_set_3src_src2_swizzle(devinfo, inst, src2.dw1.bits.swizzle);
+   brw_inst_set_3src_src2_subreg_nr(devinfo, inst, get_3src_subreg_nr(src2));
+   brw_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr);
+   brw_inst_set_3src_src2_abs(devinfo, inst, src2.abs);
+   brw_inst_set_3src_src2_negate(devinfo, inst, src2.negate);
+   brw_inst_set_3src_src2_rep_ctrl(devinfo, inst,
                                    src2.vstride == BRW_VERTICAL_STRIDE_0);
 
-   if (brw->gen >= 7) {
+   if (devinfo->gen >= 7) {
       /* Set both the source and destination types based on dest.type,
        * ignoring the source register types.  The MAD and LRP emitters ensure
        * that all four types are float.  The BFE and BFI2 emitters, however,
@@ -901,16 +903,16 @@ brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest,
        */
       switch (dest.type) {
       case BRW_REGISTER_TYPE_F:
-         brw_inst_set_3src_src_type(brw, inst, BRW_3SRC_TYPE_F);
-         brw_inst_set_3src_dst_type(brw, inst, BRW_3SRC_TYPE_F);
+         brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_F);
+         brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_F);
          break;
       case BRW_REGISTER_TYPE_D:
-         brw_inst_set_3src_src_type(brw, inst, BRW_3SRC_TYPE_D);
-         brw_inst_set_3src_dst_type(brw, inst, BRW_3SRC_TYPE_D);
+         brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_D);
+         brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_D);
          break;
       case BRW_REGISTER_TYPE_UD:
-         brw_inst_set_3src_src_type(brw, inst, BRW_3SRC_TYPE_UD);
-         brw_inst_set_3src_dst_type(brw, inst, BRW_3SRC_TYPE_UD);
+         brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_UD);
+         brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_UD);
          break;
       }
    }
@@ -975,17 +977,17 @@ void brw_##OP(struct brw_compile *p,					      \
 	      struct brw_reg dest,					      \
 	      struct brw_reg src)					      \
 {									      \
-   struct brw_context *brw = p->brw;					      \
+   const struct brw_device_info *devinfo = p->devinfo;					      \
    brw_inst *rnd, *add;							      \
    rnd = next_insn(p, BRW_OPCODE_##OP);					      \
    brw_set_dest(p, rnd, dest);						      \
    brw_set_src0(p, rnd, src);						      \
 									      \
-   if (brw->gen < 6) {							      \
+   if (devinfo->gen < 6) {							      \
       /* turn on round-increments */					      \
-      brw_inst_set_cond_modifier(brw, rnd, BRW_CONDITIONAL_R);                \
+      brw_inst_set_cond_modifier(devinfo, rnd, BRW_CONDITIONAL_R);            \
       add = brw_ADD(p, dest, dest, brw_imm_f(1.0f));			      \
-      brw_inst_set_pred_control(brw, add, BRW_PREDICATE_NORMAL);              \
+      brw_inst_set_pred_control(devinfo, add, BRW_PREDICATE_NORMAL);          \
    }									      \
 }
 
@@ -1127,15 +1129,15 @@ brw_PLN(struct brw_compile *p, struct brw_reg dest,
 brw_inst *
 brw_F32TO16(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
 {
-   const struct brw_context *brw = p->brw;
-   const bool align16 = brw_inst_access_mode(brw, p->current) == BRW_ALIGN_16;
+   const struct brw_device_info *devinfo = p->devinfo;
+   const bool align16 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_16;
    /* The F32TO16 instruction doesn't support 32-bit destination types in
     * Align1 mode, and neither does the Gen8 implementation in terms of a
     * converting MOV.  Gen7 does zero out the high 16 bits in Align16 mode as
     * an undocumented feature.
     */
    const bool needs_zero_fill = (dst.type == BRW_REGISTER_TYPE_UD &&
-                                 (!align16 || brw->gen >= 8));
+                                 (!align16 || devinfo->gen >= 8));
    brw_inst *inst;
 
    if (align16) {
@@ -1154,17 +1156,17 @@ brw_F32TO16(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
       dst = spread(retype(dst, BRW_REGISTER_TYPE_W), 2);
    }
 
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       inst = brw_MOV(p, retype(dst, BRW_REGISTER_TYPE_HF), src);
    } else {
-      assert(brw->gen == 7);
+      assert(devinfo->gen == 7);
       inst = brw_alu1(p, BRW_OPCODE_F32TO16, dst, src);
    }
 
    if (needs_zero_fill) {
-      brw_inst_set_no_dd_clear(brw, inst, true);
+      brw_inst_set_no_dd_clear(devinfo, inst, true);
       inst = brw_MOV(p, suboffset(dst, 1), brw_imm_ud(0u));
-      brw_inst_set_no_dd_check(brw, inst, true);
+      brw_inst_set_no_dd_check(devinfo, inst, true);
    }
 
    brw_pop_insn_state(p);
@@ -1174,8 +1176,8 @@ brw_F32TO16(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
 brw_inst *
 brw_F16TO32(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
 {
-   const struct brw_context *brw = p->brw;
-   bool align16 = brw_inst_access_mode(brw, p->current) == BRW_ALIGN_16;
+   const struct brw_device_info *devinfo = p->devinfo;
+   bool align16 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_16;
 
    if (align16) {
       assert(src.type == BRW_REGISTER_TYPE_UD);
@@ -1194,10 +1196,10 @@ brw_F16TO32(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
              src.type == BRW_REGISTER_TYPE_HF);
    }
 
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       return brw_MOV(p, dst, retype(src, BRW_REGISTER_TYPE_HF));
    } else {
-      assert(brw->gen == 7);
+      assert(devinfo->gen == 7);
       return brw_alu1(p, BRW_OPCODE_F16TO32, dst, src);
    }
 }
@@ -1223,14 +1225,14 @@ brw_inst *
 brw_JMPI(struct brw_compile *p, struct brw_reg index,
          unsigned predicate_control)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    struct brw_reg ip = brw_ip_reg();
    brw_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index);
 
-   brw_inst_set_exec_size(brw, inst, BRW_EXECUTE_2);
-   brw_inst_set_qtr_control(brw, inst, BRW_COMPRESSION_NONE);
-   brw_inst_set_mask_control(brw, inst, BRW_MASK_DISABLE);
-   brw_inst_set_pred_control(brw, inst, predicate_control);
+   brw_inst_set_exec_size(devinfo, inst, BRW_EXECUTE_2);
+   brw_inst_set_qtr_control(devinfo, inst, BRW_COMPRESSION_NONE);
+   brw_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE);
+   brw_inst_set_pred_control(devinfo, inst, predicate_control);
 
    return inst;
 }
@@ -1293,41 +1295,41 @@ get_inner_do_insn(struct brw_compile *p)
 brw_inst *
 brw_IF(struct brw_compile *p, unsigned execute_size)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_IF);
 
    /* Override the defaults for this instruction:
     */
-   if (brw->gen < 6) {
+   if (devinfo->gen < 6) {
       brw_set_dest(p, insn, brw_ip_reg());
       brw_set_src0(p, insn, brw_ip_reg());
       brw_set_src1(p, insn, brw_imm_d(0x0));
-   } else if (brw->gen == 6) {
+   } else if (devinfo->gen == 6) {
       brw_set_dest(p, insn, brw_imm_w(0));
-      brw_inst_set_gen6_jump_count(brw, insn, 0);
+      brw_inst_set_gen6_jump_count(devinfo, insn, 0);
       brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
       brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
-   } else if (brw->gen == 7) {
+   } else if (devinfo->gen == 7) {
       brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
       brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
       brw_set_src1(p, insn, brw_imm_w(0));
-      brw_inst_set_jip(brw, insn, 0);
-      brw_inst_set_uip(brw, insn, 0);
+      brw_inst_set_jip(devinfo, insn, 0);
+      brw_inst_set_uip(devinfo, insn, 0);
    } else {
       brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
       brw_set_src0(p, insn, brw_imm_d(0));
-      brw_inst_set_jip(brw, insn, 0);
-      brw_inst_set_uip(brw, insn, 0);
+      brw_inst_set_jip(devinfo, insn, 0);
+      brw_inst_set_uip(devinfo, insn, 0);
    }
 
-   brw_inst_set_exec_size(brw, insn, execute_size);
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-   brw_inst_set_pred_control(brw, insn, BRW_PREDICATE_NORMAL);
-   brw_inst_set_mask_control(brw, insn, BRW_MASK_ENABLE);
-   if (!p->single_program_flow && brw->gen < 6)
-      brw_inst_set_thread_control(brw, insn, BRW_THREAD_SWITCH);
+   brw_inst_set_exec_size(devinfo, insn, execute_size);
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NORMAL);
+   brw_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE);
+   if (!p->single_program_flow && devinfo->gen < 6)
+      brw_inst_set_thread_control(devinfo, insn, BRW_THREAD_SWITCH);
 
    push_if_stack(p, insn);
    p->if_depth_in_loop[p->loop_stack_depth]++;
@@ -1341,21 +1343,21 @@ brw_inst *
 gen6_IF(struct brw_compile *p, enum brw_conditional_mod conditional,
 	struct brw_reg src0, struct brw_reg src1)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_IF);
 
    brw_set_dest(p, insn, brw_imm_w(0));
-   brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
+   brw_inst_set_exec_size(devinfo, insn, p->compressed ? BRW_EXECUTE_16
                                                    : BRW_EXECUTE_8);
-   brw_inst_set_gen6_jump_count(brw, insn, 0);
+   brw_inst_set_gen6_jump_count(devinfo, insn, 0);
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, src1);
 
-   assert(brw_inst_qtr_control(brw, insn) == BRW_COMPRESSION_NONE);
-   assert(brw_inst_pred_control(brw, insn) == BRW_PREDICATE_NONE);
-   brw_inst_set_cond_modifier(brw, insn, conditional);
+   assert(brw_inst_qtr_control(devinfo, insn) == BRW_COMPRESSION_NONE);
+   assert(brw_inst_pred_control(devinfo, insn) == BRW_PREDICATE_NONE);
+   brw_inst_set_cond_modifier(devinfo, insn, conditional);
 
    push_if_stack(p, insn);
    return insn;
@@ -1368,15 +1370,15 @@ static void
 convert_IF_ELSE_to_ADD(struct brw_compile *p,
                        brw_inst *if_inst, brw_inst *else_inst)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    /* The next instruction (where the ENDIF would be, if it existed) */
    brw_inst *next_inst = &p->store[p->nr_insn];
 
    assert(p->single_program_flow);
-   assert(if_inst != NULL && brw_inst_opcode(brw, if_inst) == BRW_OPCODE_IF);
-   assert(else_inst == NULL || brw_inst_opcode(brw, else_inst) == BRW_OPCODE_ELSE);
-   assert(brw_inst_exec_size(brw, if_inst) == BRW_EXECUTE_1);
+   assert(if_inst != NULL && brw_inst_opcode(devinfo, if_inst) == BRW_OPCODE_IF);
+   assert(else_inst == NULL || brw_inst_opcode(devinfo, else_inst) == BRW_OPCODE_ELSE);
+   assert(brw_inst_exec_size(devinfo, if_inst) == BRW_EXECUTE_1);
 
    /* Convert IF to an ADD instruction that moves the instruction pointer
     * to the first instruction of the ELSE block.  If there is no ELSE
@@ -1386,19 +1388,19 @@ convert_IF_ELSE_to_ADD(struct brw_compile *p,
     * stack operations, and if we're currently executing, we just want to
     * continue normally.
     */
-   brw_inst_set_opcode(brw, if_inst, BRW_OPCODE_ADD);
-   brw_inst_set_pred_inv(brw, if_inst, true);
+   brw_inst_set_opcode(devinfo, if_inst, BRW_OPCODE_ADD);
+   brw_inst_set_pred_inv(devinfo, if_inst, true);
 
    if (else_inst != NULL) {
       /* Convert ELSE to an ADD instruction that points where the ENDIF
        * would be.
        */
-      brw_inst_set_opcode(brw, else_inst, BRW_OPCODE_ADD);
+      brw_inst_set_opcode(devinfo, else_inst, BRW_OPCODE_ADD);
 
-      brw_inst_set_imm_ud(brw, if_inst, (else_inst - if_inst + 1) * 16);
-      brw_inst_set_imm_ud(brw, else_inst, (next_inst - else_inst) * 16);
+      brw_inst_set_imm_ud(devinfo, if_inst, (else_inst - if_inst + 1) * 16);
+      brw_inst_set_imm_ud(devinfo, else_inst, (next_inst - else_inst) * 16);
    } else {
-      brw_inst_set_imm_ud(brw, if_inst, (next_inst - if_inst) * 16);
+      brw_inst_set_imm_ud(devinfo, if_inst, (next_inst - if_inst) * 16);
    }
 }
 
@@ -1409,7 +1411,7 @@ static void
 patch_IF_ELSE(struct brw_compile *p,
               brw_inst *if_inst, brw_inst *else_inst, brw_inst *endif_inst)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    /* We shouldn't be patching IF and ELSE instructions in single program flow
     * mode when gen < 6, because in single program flow mode on those
@@ -1423,71 +1425,71 @@ patch_IF_ELSE(struct brw_compile *p,
     * instructions to conditional ADDs.  So we do patch IF and ELSE
     * instructions in single program flow mode on those platforms.
     */
-   if (brw->gen < 6)
+   if (devinfo->gen < 6)
       assert(!p->single_program_flow);
 
-   assert(if_inst != NULL && brw_inst_opcode(brw, if_inst) == BRW_OPCODE_IF);
+   assert(if_inst != NULL && brw_inst_opcode(devinfo, if_inst) == BRW_OPCODE_IF);
    assert(endif_inst != NULL);
-   assert(else_inst == NULL || brw_inst_opcode(brw, else_inst) == BRW_OPCODE_ELSE);
+   assert(else_inst == NULL || brw_inst_opcode(devinfo, else_inst) == BRW_OPCODE_ELSE);
 
-   unsigned br = brw_jump_scale(brw);
+   unsigned br = brw_jump_scale(devinfo);
 
-   assert(brw_inst_opcode(brw, endif_inst) == BRW_OPCODE_ENDIF);
-   brw_inst_set_exec_size(brw, endif_inst, brw_inst_exec_size(brw, if_inst));
+   assert(brw_inst_opcode(devinfo, endif_inst) == BRW_OPCODE_ENDIF);
+   brw_inst_set_exec_size(devinfo, endif_inst, brw_inst_exec_size(devinfo, if_inst));
 
    if (else_inst == NULL) {
       /* Patch IF -> ENDIF */
-      if (brw->gen < 6) {
+      if (devinfo->gen < 6) {
 	 /* Turn it into an IFF, which means no mask stack operations for
 	  * all-false and jumping past the ENDIF.
 	  */
-         brw_inst_set_opcode(brw, if_inst, BRW_OPCODE_IFF);
-         brw_inst_set_gen4_jump_count(brw, if_inst,
+         brw_inst_set_opcode(devinfo, if_inst, BRW_OPCODE_IFF);
+         brw_inst_set_gen4_jump_count(devinfo, if_inst,
                                       br * (endif_inst - if_inst + 1));
-         brw_inst_set_gen4_pop_count(brw, if_inst, 0);
-      } else if (brw->gen == 6) {
+         brw_inst_set_gen4_pop_count(devinfo, if_inst, 0);
+      } else if (devinfo->gen == 6) {
 	 /* As of gen6, there is no IFF and IF must point to the ENDIF. */
-         brw_inst_set_gen6_jump_count(brw, if_inst, br*(endif_inst - if_inst));
+         brw_inst_set_gen6_jump_count(devinfo, if_inst, br*(endif_inst - if_inst));
       } else {
-         brw_inst_set_uip(brw, if_inst, br * (endif_inst - if_inst));
-         brw_inst_set_jip(brw, if_inst, br * (endif_inst - if_inst));
+         brw_inst_set_uip(devinfo, if_inst, br * (endif_inst - if_inst));
+         brw_inst_set_jip(devinfo, if_inst, br * (endif_inst - if_inst));
       }
    } else {
-      brw_inst_set_exec_size(brw, else_inst, brw_inst_exec_size(brw, if_inst));
+      brw_inst_set_exec_size(devinfo, else_inst, brw_inst_exec_size(devinfo, if_inst));
 
       /* Patch IF -> ELSE */
-      if (brw->gen < 6) {
-         brw_inst_set_gen4_jump_count(brw, if_inst,
+      if (devinfo->gen < 6) {
+         brw_inst_set_gen4_jump_count(devinfo, if_inst,
                                       br * (else_inst - if_inst));
-         brw_inst_set_gen4_pop_count(brw, if_inst, 0);
-      } else if (brw->gen == 6) {
-         brw_inst_set_gen6_jump_count(brw, if_inst,
+         brw_inst_set_gen4_pop_count(devinfo, if_inst, 0);
+      } else if (devinfo->gen == 6) {
+         brw_inst_set_gen6_jump_count(devinfo, if_inst,
                                       br * (else_inst - if_inst + 1));
       }
 
       /* Patch ELSE -> ENDIF */
-      if (brw->gen < 6) {
+      if (devinfo->gen < 6) {
 	 /* BRW_OPCODE_ELSE pre-gen6 should point just past the
 	  * matching ENDIF.
 	  */
-         brw_inst_set_gen4_jump_count(brw, else_inst,
+         brw_inst_set_gen4_jump_count(devinfo, else_inst,
                                       br * (endif_inst - else_inst + 1));
-         brw_inst_set_gen4_pop_count(brw, else_inst, 1);
-      } else if (brw->gen == 6) {
+         brw_inst_set_gen4_pop_count(devinfo, else_inst, 1);
+      } else if (devinfo->gen == 6) {
 	 /* BRW_OPCODE_ELSE on gen6 should point to the matching ENDIF. */
-         brw_inst_set_gen6_jump_count(brw, else_inst,
+         brw_inst_set_gen6_jump_count(devinfo, else_inst,
                                       br * (endif_inst - else_inst));
       } else {
 	 /* The IF instruction's JIP should point just past the ELSE */
-         brw_inst_set_jip(brw, if_inst, br * (else_inst - if_inst + 1));
+         brw_inst_set_jip(devinfo, if_inst, br * (else_inst - if_inst + 1));
 	 /* The IF instruction's UIP and ELSE's JIP should point to ENDIF */
-         brw_inst_set_uip(brw, if_inst, br * (endif_inst - if_inst));
-         brw_inst_set_jip(brw, else_inst, br * (endif_inst - else_inst));
-         if (brw->gen >= 8) {
+         brw_inst_set_uip(devinfo, if_inst, br * (endif_inst - if_inst));
+         brw_inst_set_jip(devinfo, else_inst, br * (endif_inst - else_inst));
+         if (devinfo->gen >= 8) {
             /* Since we don't set branch_ctrl, the ELSE's JIP and UIP both
              * should point to ENDIF.
              */
-            brw_inst_set_uip(brw, else_inst, br * (endif_inst - else_inst));
+            brw_inst_set_uip(devinfo, else_inst, br * (endif_inst - else_inst));
          }
       }
    }
@@ -1496,37 +1498,37 @@ patch_IF_ELSE(struct brw_compile *p,
 void
 brw_ELSE(struct brw_compile *p)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_ELSE);
 
-   if (brw->gen < 6) {
+   if (devinfo->gen < 6) {
       brw_set_dest(p, insn, brw_ip_reg());
       brw_set_src0(p, insn, brw_ip_reg());
       brw_set_src1(p, insn, brw_imm_d(0x0));
-   } else if (brw->gen == 6) {
+   } else if (devinfo->gen == 6) {
       brw_set_dest(p, insn, brw_imm_w(0));
-      brw_inst_set_gen6_jump_count(brw, insn, 0);
+      brw_inst_set_gen6_jump_count(devinfo, insn, 0);
       brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
-   } else if (brw->gen == 7) {
+   } else if (devinfo->gen == 7) {
       brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src1(p, insn, brw_imm_w(0));
-      brw_inst_set_jip(brw, insn, 0);
-      brw_inst_set_uip(brw, insn, 0);
+      brw_inst_set_jip(devinfo, insn, 0);
+      brw_inst_set_uip(devinfo, insn, 0);
    } else {
       brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src0(p, insn, brw_imm_d(0));
-      brw_inst_set_jip(brw, insn, 0);
-      brw_inst_set_uip(brw, insn, 0);
+      brw_inst_set_jip(devinfo, insn, 0);
+      brw_inst_set_uip(devinfo, insn, 0);
    }
 
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-   brw_inst_set_mask_control(brw, insn, BRW_MASK_ENABLE);
-   if (!p->single_program_flow && brw->gen < 6)
-      brw_inst_set_thread_control(brw, insn, BRW_THREAD_SWITCH);
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE);
+   if (!p->single_program_flow && devinfo->gen < 6)
+      brw_inst_set_thread_control(devinfo, insn, BRW_THREAD_SWITCH);
 
    push_if_stack(p, insn);
 }
@@ -1534,7 +1536,7 @@ brw_ELSE(struct brw_compile *p)
 void
 brw_ENDIF(struct brw_compile *p)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn = NULL;
    brw_inst *else_inst = NULL;
    brw_inst *if_inst = NULL;
@@ -1553,7 +1555,7 @@ brw_ENDIF(struct brw_compile *p)
     * instructions to conditional ADDs.  So we only do this trick on Gen4 and
     * Gen5.
     */
-   if (brw->gen < 6 && p->single_program_flow)
+   if (devinfo->gen < 6 && p->single_program_flow)
       emit_endif = false;
 
    /*
@@ -1567,7 +1569,7 @@ brw_ENDIF(struct brw_compile *p)
    /* Pop the IF and (optional) ELSE instructions from the stack */
    p->if_depth_in_loop[p->loop_stack_depth]--;
    tmp = pop_if_stack(p);
-   if (brw_inst_opcode(brw, tmp) == BRW_OPCODE_ELSE) {
+   if (brw_inst_opcode(devinfo, tmp) == BRW_OPCODE_ELSE) {
       else_inst = tmp;
       tmp = pop_if_stack(p);
    }
@@ -1579,15 +1581,15 @@ brw_ENDIF(struct brw_compile *p)
       return;
    }
 
-   if (brw->gen < 6) {
+   if (devinfo->gen < 6) {
       brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD));
       brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD));
       brw_set_src1(p, insn, brw_imm_d(0x0));
-   } else if (brw->gen == 6) {
+   } else if (devinfo->gen == 6) {
       brw_set_dest(p, insn, brw_imm_w(0));
       brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
-   } else if (brw->gen == 7) {
+   } else if (devinfo->gen == 7) {
       brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src1(p, insn, brw_imm_w(0));
@@ -1595,19 +1597,19 @@ brw_ENDIF(struct brw_compile *p)
       brw_set_src0(p, insn, brw_imm_d(0));
    }
 
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-   brw_inst_set_mask_control(brw, insn, BRW_MASK_ENABLE);
-   if (brw->gen < 6)
-      brw_inst_set_thread_control(brw, insn, BRW_THREAD_SWITCH);
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_mask_control(devinfo, insn, BRW_MASK_ENABLE);
+   if (devinfo->gen < 6)
+      brw_inst_set_thread_control(devinfo, insn, BRW_THREAD_SWITCH);
 
    /* Also pop item off the stack in the endif instruction: */
-   if (brw->gen < 6) {
-      brw_inst_set_gen4_jump_count(brw, insn, 0);
-      brw_inst_set_gen4_pop_count(brw, insn, 1);
-   } else if (brw->gen == 6) {
-      brw_inst_set_gen6_jump_count(brw, insn, 2);
+   if (devinfo->gen < 6) {
+      brw_inst_set_gen4_jump_count(devinfo, insn, 0);
+      brw_inst_set_gen4_pop_count(devinfo, insn, 1);
+   } else if (devinfo->gen == 6) {
+      brw_inst_set_gen6_jump_count(devinfo, insn, 2);
    } else {
-      brw_inst_set_jip(brw, insn, 2);
+      brw_inst_set_jip(devinfo, insn, 2);
    }
    patch_IF_ELSE(p, if_inst, else_inst, insn);
 }
@@ -1615,14 +1617,14 @@ brw_ENDIF(struct brw_compile *p)
 brw_inst *
 brw_BREAK(struct brw_compile *p)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_BREAK);
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src0(p, insn, brw_imm_d(0x0));
-   } else if (brw->gen >= 6) {
+   } else if (devinfo->gen >= 6) {
       brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       brw_set_src1(p, insn, brw_imm_d(0x0));
@@ -1630,11 +1632,11 @@ brw_BREAK(struct brw_compile *p)
       brw_set_dest(p, insn, brw_ip_reg());
       brw_set_src0(p, insn, brw_ip_reg());
       brw_set_src1(p, insn, brw_imm_d(0x0));
-      brw_inst_set_gen4_pop_count(brw, insn,
+      brw_inst_set_gen4_pop_count(devinfo, insn,
                                   p->if_depth_in_loop[p->loop_stack_depth]);
    }
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-   brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_exec_size(devinfo, insn, p->compressed ? BRW_EXECUTE_16
                                                    : BRW_EXECUTE_8);
 
    return insn;
@@ -1643,24 +1645,24 @@ brw_BREAK(struct brw_compile *p)
 brw_inst *
 brw_CONT(struct brw_compile *p)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_CONTINUE);
    brw_set_dest(p, insn, brw_ip_reg());
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       brw_set_src0(p, insn, brw_imm_d(0x0));
    } else {
       brw_set_src0(p, insn, brw_ip_reg());
       brw_set_src1(p, insn, brw_imm_d(0x0));
    }
 
-   if (brw->gen < 6) {
-      brw_inst_set_gen4_pop_count(brw, insn,
+   if (devinfo->gen < 6) {
+      brw_inst_set_gen4_pop_count(devinfo, insn,
                                   p->if_depth_in_loop[p->loop_stack_depth]);
    }
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-   brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_exec_size(devinfo, insn, p->compressed ? BRW_EXECUTE_16
                                                    : BRW_EXECUTE_8);
    return insn;
 }
@@ -1668,12 +1670,12 @@ brw_CONT(struct brw_compile *p)
 brw_inst *
 gen6_HALT(struct brw_compile *p)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_HALT);
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       brw_set_src0(p, insn, brw_imm_d(0x0));
    } else {
       brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
@@ -1681,10 +1683,10 @@ gen6_HALT(struct brw_compile *p)
    }
 
    if (p->compressed) {
-      brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_16);
+      brw_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_16);
    } else {
-      brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-      brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_8);
+      brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+      brw_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_8);
    }
    return insn;
 }
@@ -1708,9 +1710,9 @@ gen6_HALT(struct brw_compile *p)
 brw_inst *
 brw_DO(struct brw_compile *p, unsigned execute_size)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
-   if (brw->gen >= 6 || p->single_program_flow) {
+   if (devinfo->gen >= 6 || p->single_program_flow) {
       push_loop_stack(p, &p->store[p->nr_insn]);
       return &p->store[p->nr_insn];
    } else {
@@ -1724,9 +1726,9 @@ brw_DO(struct brw_compile *p, unsigned execute_size)
       brw_set_src0(p, insn, brw_null_reg());
       brw_set_src1(p, insn, brw_null_reg());
 
-      brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
-      brw_inst_set_exec_size(brw, insn, execute_size);
-      brw_inst_set_pred_control(brw, insn, BRW_PREDICATE_NONE);
+      brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
+      brw_inst_set_exec_size(devinfo, insn, execute_size);
+      brw_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NONE);
 
       return insn;
    }
@@ -1742,24 +1744,24 @@ brw_DO(struct brw_compile *p, unsigned execute_size)
 static void
 brw_patch_break_cont(struct brw_compile *p, brw_inst *while_inst)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *do_inst = get_inner_do_insn(p);
    brw_inst *inst;
-   unsigned br = brw_jump_scale(brw);
+   unsigned br = brw_jump_scale(devinfo);
 
-   assert(brw->gen < 6);
+   assert(devinfo->gen < 6);
 
    for (inst = while_inst - 1; inst != do_inst; inst--) {
       /* If the jump count is != 0, that means that this instruction has already
        * been patched because it's part of a loop inside of the one we're
        * patching.
        */
-      if (brw_inst_opcode(brw, inst) == BRW_OPCODE_BREAK &&
-          brw_inst_gen4_jump_count(brw, inst) == 0) {
-         brw_inst_set_gen4_jump_count(brw, inst, br*((while_inst - inst) + 1));
-      } else if (brw_inst_opcode(brw, inst) == BRW_OPCODE_CONTINUE &&
-                 brw_inst_gen4_jump_count(brw, inst) == 0) {
-         brw_inst_set_gen4_jump_count(brw, inst, br * (while_inst - inst));
+      if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_BREAK &&
+          brw_inst_gen4_jump_count(devinfo, inst) == 0) {
+         brw_inst_set_gen4_jump_count(devinfo, inst, br*((while_inst - inst) + 1));
+      } else if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_CONTINUE &&
+                 brw_inst_gen4_jump_count(devinfo, inst) == 0) {
+         brw_inst_set_gen4_jump_count(devinfo, inst, br * (while_inst - inst));
       }
    }
 }
@@ -1767,31 +1769,31 @@ brw_patch_break_cont(struct brw_compile *p, brw_inst *while_inst)
 brw_inst *
 brw_WHILE(struct brw_compile *p)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn, *do_insn;
-   unsigned br = brw_jump_scale(brw);
+   unsigned br = brw_jump_scale(devinfo);
 
-   if (brw->gen >= 6) {
+   if (devinfo->gen >= 6) {
       insn = next_insn(p, BRW_OPCODE_WHILE);
       do_insn = get_inner_do_insn(p);
 
-      if (brw->gen >= 8) {
+      if (devinfo->gen >= 8) {
          brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
          brw_set_src0(p, insn, brw_imm_d(0));
-         brw_inst_set_jip(brw, insn, br * (do_insn - insn));
-      } else if (brw->gen == 7) {
+         brw_inst_set_jip(devinfo, insn, br * (do_insn - insn));
+      } else if (devinfo->gen == 7) {
          brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
          brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
          brw_set_src1(p, insn, brw_imm_w(0));
-         brw_inst_set_jip(brw, insn, br * (do_insn - insn));
+         brw_inst_set_jip(devinfo, insn, br * (do_insn - insn));
       } else {
          brw_set_dest(p, insn, brw_imm_w(0));
-         brw_inst_set_gen6_jump_count(brw, insn, br * (do_insn - insn));
+         brw_inst_set_gen6_jump_count(devinfo, insn, br * (do_insn - insn));
          brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
          brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
       }
 
-      brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
+      brw_inst_set_exec_size(devinfo, insn, p->compressed ? BRW_EXECUTE_16
                                                       : BRW_EXECUTE_8);
    } else {
       if (p->single_program_flow) {
@@ -1801,25 +1803,25 @@ brw_WHILE(struct brw_compile *p)
 	 brw_set_dest(p, insn, brw_ip_reg());
 	 brw_set_src0(p, insn, brw_ip_reg());
 	 brw_set_src1(p, insn, brw_imm_d((do_insn - insn) * 16));
-         brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_1);
+         brw_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_1);
       } else {
 	 insn = next_insn(p, BRW_OPCODE_WHILE);
          do_insn = get_inner_do_insn(p);
 
-         assert(brw_inst_opcode(brw, do_insn) == BRW_OPCODE_DO);
+         assert(brw_inst_opcode(devinfo, do_insn) == BRW_OPCODE_DO);
 
 	 brw_set_dest(p, insn, brw_ip_reg());
 	 brw_set_src0(p, insn, brw_ip_reg());
 	 brw_set_src1(p, insn, brw_imm_d(0));
 
-         brw_inst_set_exec_size(brw, insn, brw_inst_exec_size(brw, do_insn));
-         brw_inst_set_gen4_jump_count(brw, insn, br * (do_insn - insn + 1));
-         brw_inst_set_gen4_pop_count(brw, insn, 0);
+         brw_inst_set_exec_size(devinfo, insn, brw_inst_exec_size(devinfo, do_insn));
+         brw_inst_set_gen4_jump_count(devinfo, insn, br * (do_insn - insn + 1));
+         brw_inst_set_gen4_pop_count(devinfo, insn, 0);
 
 	 brw_patch_break_cont(p, insn);
       }
    }
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
 
    p->loop_stack_depth--;
 
@@ -1830,17 +1832,17 @@ brw_WHILE(struct brw_compile *p)
  */
 void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *jmp_insn = &p->store[jmp_insn_idx];
    unsigned jmpi = 1;
 
-   if (brw->gen >= 5)
+   if (devinfo->gen >= 5)
       jmpi = 2;
 
-   assert(brw_inst_opcode(brw, jmp_insn) == BRW_OPCODE_JMPI);
-   assert(brw_inst_src1_reg_file(brw, jmp_insn) == BRW_IMMEDIATE_VALUE);
+   assert(brw_inst_opcode(devinfo, jmp_insn) == BRW_OPCODE_JMPI);
+   assert(brw_inst_src1_reg_file(devinfo, jmp_insn) == BRW_IMMEDIATE_VALUE);
 
-   brw_inst_set_gen4_jump_count(brw, jmp_insn,
+   brw_inst_set_gen4_jump_count(devinfo, jmp_insn,
                                 jmpi * (p->nr_insn - jmp_insn_idx - 1));
 }
 
@@ -1854,10 +1856,10 @@ void brw_CMP(struct brw_compile *p,
 	     struct brw_reg src0,
 	     struct brw_reg src1)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_CMP);
 
-   brw_inst_set_cond_modifier(brw, insn, conditional);
+   brw_inst_set_cond_modifier(devinfo, insn, conditional);
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, src1);
@@ -1869,10 +1871,10 @@ void brw_CMP(struct brw_compile *p,
     * It also applies to other Gen7 platforms (IVB, BYT) even though it isn't
     * mentioned on their work-arounds pages.
     */
-   if (brw->gen == 7) {
+   if (devinfo->gen == 7) {
       if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE &&
           dest.nr == BRW_ARF_NULL) {
-         brw_inst_set_thread_control(brw, insn, BRW_THREAD_SWITCH);
+         brw_inst_set_thread_control(devinfo, insn, BRW_THREAD_SWITCH);
       }
    }
 }
@@ -1890,7 +1892,7 @@ void gen4_math(struct brw_compile *p,
 	       struct brw_reg src,
 	       unsigned precision )
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
    unsigned data_type;
    if (has_scalar_region(src)) {
@@ -1899,13 +1901,13 @@ void gen4_math(struct brw_compile *p,
       data_type = BRW_MATH_DATA_VECTOR;
    }
 
-   assert(brw->gen < 6);
+   assert(devinfo->gen < 6);
 
    /* Example code doesn't set predicate_control for send
     * instructions.
     */
-   brw_inst_set_pred_control(brw, insn, 0);
-   brw_inst_set_base_mrf(brw, insn, msg_reg_nr);
+   brw_inst_set_pred_control(devinfo, insn, 0);
+   brw_inst_set_base_mrf(devinfo, insn, msg_reg_nr);
 
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src);
@@ -1923,18 +1925,18 @@ void gen6_math(struct brw_compile *p,
 	       struct brw_reg src0,
 	       struct brw_reg src1)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_MATH);
 
-   assert(brw->gen >= 6);
+   assert(devinfo->gen >= 6);
 
    assert(dest.file == BRW_GENERAL_REGISTER_FILE ||
-          (brw->gen >= 7 && dest.file == BRW_MESSAGE_REGISTER_FILE));
+          (devinfo->gen >= 7 && dest.file == BRW_MESSAGE_REGISTER_FILE));
    assert(src0.file == BRW_GENERAL_REGISTER_FILE ||
-          (brw->gen >= 8 && src0.file == BRW_IMMEDIATE_VALUE));
+          (devinfo->gen >= 8 && src0.file == BRW_IMMEDIATE_VALUE));
 
    assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1);
-   if (brw->gen == 6) {
+   if (devinfo->gen == 6) {
       assert(src0.hstride == BRW_HORIZONTAL_STRIDE_1);
       assert(src1.hstride == BRW_HORIZONTAL_STRIDE_1);
    }
@@ -1945,13 +1947,13 @@ void gen6_math(struct brw_compile *p,
       assert(src0.type != BRW_REGISTER_TYPE_F);
       assert(src1.type != BRW_REGISTER_TYPE_F);
       assert(src1.file == BRW_GENERAL_REGISTER_FILE ||
-             (brw->gen >= 8 && src1.file == BRW_IMMEDIATE_VALUE));
+             (devinfo->gen >= 8 && src1.file == BRW_IMMEDIATE_VALUE));
    } else {
       assert(src0.type == BRW_REGISTER_TYPE_F);
       assert(src1.type == BRW_REGISTER_TYPE_F);
       if (function == BRW_MATH_FUNCTION_POW) {
          assert(src1.file == BRW_GENERAL_REGISTER_FILE ||
-                (brw->gen >= 8 && src1.file == BRW_IMMEDIATE_VALUE));
+                (devinfo->gen >= 8 && src1.file == BRW_IMMEDIATE_VALUE));
       } else {
          assert(src1.file == BRW_ARCHITECTURE_REGISTER_FILE &&
                 src1.nr == BRW_ARF_NULL);
@@ -1959,14 +1961,14 @@ void gen6_math(struct brw_compile *p,
    }
 
    /* Source modifiers are ignored for extended math instructions on Gen6. */
-   if (brw->gen == 6) {
+   if (devinfo->gen == 6) {
       assert(!src0.negate);
       assert(!src0.abs);
       assert(!src1.negate);
       assert(!src1.abs);
    }
 
-   brw_inst_set_math_function(brw, insn, function);
+   brw_inst_set_math_function(devinfo, insn, function);
 
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src0);
@@ -1986,11 +1988,11 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
 				   int num_regs,
 				   unsigned offset)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    uint32_t msg_control, msg_type;
    int mlen;
 
-   if (brw->gen >= 6)
+   if (devinfo->gen >= 6)
       offset /= 16;
 
    mrf = retype(mrf, BRW_REGISTER_TYPE_UD);
@@ -2033,13 +2035,13 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
       struct brw_reg src_header = retype(brw_vec8_grf(0, 0),
 					 BRW_REGISTER_TYPE_UW);
 
-      if (brw_inst_qtr_control(brw, insn) != BRW_COMPRESSION_NONE) {
-         brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
+      if (brw_inst_qtr_control(devinfo, insn) != BRW_COMPRESSION_NONE) {
+         brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
 	 src_header = vec16(src_header);
       }
-      assert(brw_inst_pred_control(brw, insn) == BRW_PREDICATE_NONE);
-      if (brw->gen < 6)
-         brw_inst_set_base_mrf(brw, insn, mrf.nr);
+      assert(brw_inst_pred_control(devinfo, insn) == BRW_PREDICATE_NONE);
+      if (devinfo->gen < 6)
+         brw_inst_set_base_mrf(devinfo, insn, mrf.nr);
 
       /* Until gen6, writes followed by reads from the same location
        * are not guaranteed to be ordered unless write_commit is set.
@@ -2051,7 +2053,7 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
        * protection.  Our use of DP writes is all about register
        * spilling within a thread.
        */
-      if (brw->gen >= 6) {
+      if (devinfo->gen >= 6) {
 	 dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW);
 	 send_commit_msg = 0;
       } else {
@@ -2060,13 +2062,13 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
       }
 
       brw_set_dest(p, insn, dest);
-      if (brw->gen >= 6) {
+      if (devinfo->gen >= 6) {
 	 brw_set_src0(p, insn, mrf);
       } else {
 	 brw_set_src0(p, insn, brw_null_reg());
       }
 
-      if (brw->gen >= 6)
+      if (devinfo->gen >= 6)
 	 msg_type = GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE;
       else
 	 msg_type = BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE;
@@ -2100,14 +2102,14 @@ brw_oword_block_read_scratch(struct brw_compile *p,
 			     int num_regs,
 			     unsigned offset)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    uint32_t msg_control;
    int rlen;
 
-   if (brw->gen >= 6)
+   if (devinfo->gen >= 6)
       offset /= 16;
 
-   if (p->brw->gen >= 7) {
+   if (p->devinfo->gen >= 7) {
       /* On gen 7 and above, we no longer have message registers and we can
        * send from any register we want.  By using the destination register
        * for the message, we guarantee that the implied message write won't
@@ -2146,15 +2148,15 @@ brw_oword_block_read_scratch(struct brw_compile *p,
    {
       brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
-      assert(brw_inst_pred_control(brw, insn) == 0);
-      brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
+      assert(brw_inst_pred_control(devinfo, insn) == 0);
+      brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
 
       brw_set_dest(p, insn, dest);	/* UW? */
-      if (brw->gen >= 6) {
+      if (devinfo->gen >= 6) {
 	 brw_set_src0(p, insn, mrf);
       } else {
 	 brw_set_src0(p, insn, brw_null_reg());
-         brw_inst_set_base_mrf(brw, insn, mrf.nr);
+         brw_inst_set_base_mrf(devinfo, insn, mrf.nr);
       }
 
       brw_set_dp_read_message(p,
@@ -2175,11 +2177,11 @@ gen7_block_read_scratch(struct brw_compile *p,
                         int num_regs,
                         unsigned offset)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
-   assert(brw_inst_pred_control(brw, insn) == BRW_PREDICATE_NONE);
+   assert(brw_inst_pred_control(devinfo, insn) == BRW_PREDICATE_NONE);
 
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
    brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UW));
 
    /* The HW requires that the header is present; this is to get the g0.5
@@ -2216,10 +2218,10 @@ void brw_oword_block_read(struct brw_compile *p,
 			  uint32_t offset,
 			  uint32_t bind_table_index)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    /* On newer hardware, offset is in units of owords. */
-   if (brw->gen >= 6)
+   if (devinfo->gen >= 6)
       offset /= 16;
 
    mrf = retype(mrf, BRW_REGISTER_TYPE_UD);
@@ -2245,11 +2247,11 @@ void brw_oword_block_read(struct brw_compile *p,
    dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW);
 
    brw_set_dest(p, insn, dest);
-   if (brw->gen >= 6) {
+   if (devinfo->gen >= 6) {
       brw_set_src0(p, insn, mrf);
    } else {
       brw_set_src0(p, insn, brw_null_reg());
-      brw_inst_set_base_mrf(brw, insn, mrf.nr);
+      brw_inst_set_base_mrf(devinfo, insn, mrf.nr);
    }
 
    brw_set_dp_read_message(p,
@@ -2278,7 +2280,7 @@ void brw_fb_WRITE(struct brw_compile *p,
                   bool last_render_target,
                   bool header_present)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
    unsigned msg_type;
    struct brw_reg dest, src0;
@@ -2288,21 +2290,21 @@ void brw_fb_WRITE(struct brw_compile *p,
    else
       dest = retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW);
 
-   if (brw->gen >= 6) {
+   if (devinfo->gen >= 6) {
       insn = next_insn(p, BRW_OPCODE_SENDC);
    } else {
       insn = next_insn(p, BRW_OPCODE_SEND);
    }
-   brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
+   brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
 
-   if (brw->gen >= 6) {
+   if (devinfo->gen >= 6) {
       /* headerless version, just submit color payload */
       src0 = payload;
 
       msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE;
    } else {
       assert(payload.file == BRW_MESSAGE_REGISTER_FILE);
-      brw_inst_set_base_mrf(brw, insn, payload.nr);
+      brw_inst_set_base_mrf(devinfo, insn, payload.nr);
       src0 = implied_header;
 
       msg_type = BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE;
@@ -2342,14 +2344,14 @@ void brw_SAMPLE(struct brw_compile *p,
 		unsigned simd_mode,
 		unsigned return_format)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    if (msg_reg_nr != -1)
       gen6_resolve_implied_move(p, &src0, msg_reg_nr);
 
    insn = next_insn(p, BRW_OPCODE_SEND);
-   brw_inst_set_pred_control(brw, insn, BRW_PREDICATE_NONE); /* XXX */
+   brw_inst_set_pred_control(devinfo, insn, BRW_PREDICATE_NONE); /* XXX */
 
    /* From the 965 PRM (volume 4, part 1, section 14.2.41):
     *
@@ -2363,11 +2365,11 @@ void brw_SAMPLE(struct brw_compile *p,
     * are allowed in SIMD16 mode and they could not work without SecHalf.  For
     * these reasons, we allow BRW_COMPRESSION_2NDHALF here.
     */
-   if (brw_inst_qtr_control(brw, insn) != BRW_COMPRESSION_2NDHALF)
-      brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
+   if (brw_inst_qtr_control(devinfo, insn) != BRW_COMPRESSION_2NDHALF)
+      brw_inst_set_qtr_control(devinfo, insn, BRW_COMPRESSION_NONE);
 
-   if (brw->gen < 6)
-      brw_inst_set_base_mrf(brw, insn, msg_reg_nr);
+   if (devinfo->gen < 6)
+      brw_inst_set_base_mrf(devinfo, insn, msg_reg_nr);
 
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src0);
@@ -2398,14 +2400,14 @@ void brw_adjust_sampler_state_pointer(struct brw_compile *p,
     * exclusively use the offset - we have to use both.
     */
 
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
       const int sampler_state_size = 16; /* 16 bytes */
       uint32_t sampler = sampler_index.dw1.ud;
 
       if (sampler >= 16) {
-         assert(brw->is_haswell || brw->gen >= 8);
+         assert(devinfo->is_haswell || devinfo->gen >= 8);
          brw_ADD(p,
                  get_element_ud(header, 3),
                  get_element_ud(brw_vec8_grf(0, 0), 3),
@@ -2413,7 +2415,7 @@ void brw_adjust_sampler_state_pointer(struct brw_compile *p,
       }
    } else {
       /* Non-const sampler array indexing case */
-      if (brw->gen < 8 && !brw->is_haswell) {
+      if (devinfo->gen < 8 && !devinfo->is_haswell) {
          return;
       }
 
@@ -2442,12 +2444,12 @@ void brw_urb_WRITE(struct brw_compile *p,
 		   unsigned offset,
 		   unsigned swizzle)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    gen6_resolve_implied_move(p, &src0, msg_reg_nr);
 
-   if (brw->gen >= 7 && !(flags & BRW_URB_WRITE_USE_CHANNEL_MASKS)) {
+   if (devinfo->gen >= 7 && !(flags & BRW_URB_WRITE_USE_CHANNEL_MASKS)) {
       /* Enable Channel Masks in the URB_WRITE_HWORD message header */
       brw_push_insn_state(p);
       brw_set_default_access_mode(p, BRW_ALIGN_1);
@@ -2467,8 +2469,8 @@ void brw_urb_WRITE(struct brw_compile *p,
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, brw_imm_d(0));
 
-   if (brw->gen < 6)
-      brw_inst_set_base_mrf(brw, insn, msg_reg_nr);
+   if (devinfo->gen < 6)
+      brw_inst_set_base_mrf(devinfo, insn, msg_reg_nr);
 
    brw_set_urb_message(p,
 		       insn,
@@ -2486,7 +2488,7 @@ brw_send_indirect_message(struct brw_compile *p,
                           struct brw_reg payload,
                           struct brw_reg desc)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    struct brw_inst *send, *setup;
 
    assert(desc.type == BRW_REGISTER_TYPE_UD);
@@ -2517,7 +2519,7 @@ brw_send_indirect_message(struct brw_compile *p,
 
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD));
-   brw_inst_set_sfid(brw, send, sfid);
+   brw_inst_set_sfid(devinfo, send, sfid);
 
    return setup;
 }
@@ -2527,14 +2529,14 @@ brw_find_next_block_end(struct brw_compile *p, int start_offset)
 {
    int offset;
    void *store = p->store;
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
-   for (offset = next_offset(brw, store, start_offset);
+   for (offset = next_offset(devinfo, store, start_offset);
         offset < p->next_insn_offset;
-        offset = next_offset(brw, store, offset)) {
+        offset = next_offset(devinfo, store, offset)) {
       brw_inst *insn = store + offset;
 
-      switch (brw_inst_opcode(brw, insn)) {
+      switch (brw_inst_opcode(devinfo, insn)) {
       case BRW_OPCODE_ENDIF:
       case BRW_OPCODE_ELSE:
       case BRW_OPCODE_WHILE:
@@ -2553,24 +2555,24 @@ brw_find_next_block_end(struct brw_compile *p, int start_offset)
 static int
 brw_find_loop_end(struct brw_compile *p, int start_offset)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    int offset;
-   int scale = 16 / brw_jump_scale(brw);
+   int scale = 16 / brw_jump_scale(devinfo);
    void *store = p->store;
 
-   assert(brw->gen >= 6);
+   assert(devinfo->gen >= 6);
 
    /* Always start after the instruction (such as a WHILE) we're trying to fix
     * up.
     */
-   for (offset = next_offset(brw, store, start_offset);
+   for (offset = next_offset(devinfo, store, start_offset);
         offset < p->next_insn_offset;
-        offset = next_offset(brw, store, offset)) {
+        offset = next_offset(devinfo, store, offset)) {
       brw_inst *insn = store + offset;
 
-      if (brw_inst_opcode(brw, insn) == BRW_OPCODE_WHILE) {
-         int jip = brw->gen == 6 ? brw_inst_gen6_jump_count(brw, insn)
-                                 : brw_inst_jip(brw, insn);
+      if (brw_inst_opcode(devinfo, insn) == BRW_OPCODE_WHILE) {
+         int jip = devinfo->gen == 6 ? brw_inst_gen6_jump_count(devinfo, insn)
+                                     : brw_inst_jip(devinfo, insn);
 	 if (offset + jip * scale <= start_offset)
 	    return offset;
       }
@@ -2585,54 +2587,54 @@ brw_find_loop_end(struct brw_compile *p, int start_offset)
 void
 brw_set_uip_jip(struct brw_compile *p)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    int offset;
-   int br = brw_jump_scale(brw);
+   int br = brw_jump_scale(devinfo);
    int scale = 16 / br;
    void *store = p->store;
 
-   if (brw->gen < 6)
+   if (devinfo->gen < 6)
       return;
 
    for (offset = 0; offset < p->next_insn_offset;
-        offset = next_offset(brw, store, offset)) {
+        offset = next_offset(devinfo, store, offset)) {
       brw_inst *insn = store + offset;
 
-      if (brw_inst_cmpt_control(brw, insn)) {
+      if (brw_inst_cmpt_control(devinfo, insn)) {
 	 /* Fixups for compacted BREAK/CONTINUE not supported yet. */
-         assert(brw_inst_opcode(brw, insn) != BRW_OPCODE_BREAK &&
-                brw_inst_opcode(brw, insn) != BRW_OPCODE_CONTINUE &&
-                brw_inst_opcode(brw, insn) != BRW_OPCODE_HALT);
+         assert(brw_inst_opcode(devinfo, insn) != BRW_OPCODE_BREAK &&
+                brw_inst_opcode(devinfo, insn) != BRW_OPCODE_CONTINUE &&
+                brw_inst_opcode(devinfo, insn) != BRW_OPCODE_HALT);
 	 continue;
       }
 
       int block_end_offset = brw_find_next_block_end(p, offset);
-      switch (brw_inst_opcode(brw, insn)) {
+      switch (brw_inst_opcode(devinfo, insn)) {
       case BRW_OPCODE_BREAK:
          assert(block_end_offset != 0);
-         brw_inst_set_jip(brw, insn, (block_end_offset - offset) / scale);
+         brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale);
 	 /* Gen7 UIP points to WHILE; Gen6 points just after it */
-         brw_inst_set_uip(brw, insn,
+         brw_inst_set_uip(devinfo, insn,
 	    (brw_find_loop_end(p, offset) - offset +
-             (brw->gen == 6 ? 16 : 0)) / scale);
+             (devinfo->gen == 6 ? 16 : 0)) / scale);
 	 break;
       case BRW_OPCODE_CONTINUE:
          assert(block_end_offset != 0);
-         brw_inst_set_jip(brw, insn, (block_end_offset - offset) / scale);
-         brw_inst_set_uip(brw, insn,
+         brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale);
+         brw_inst_set_uip(devinfo, insn,
             (brw_find_loop_end(p, offset) - offset) / scale);
 
-         assert(brw_inst_uip(brw, insn) != 0);
-         assert(brw_inst_jip(brw, insn) != 0);
+         assert(brw_inst_uip(devinfo, insn) != 0);
+         assert(brw_inst_jip(devinfo, insn) != 0);
 	 break;
 
       case BRW_OPCODE_ENDIF: {
          int32_t jump = (block_end_offset == 0) ?
                         1 * br : (block_end_offset - offset) / scale;
-         if (brw->gen >= 7)
-            brw_inst_set_jip(brw, insn, jump);
+         if (devinfo->gen >= 7)
+            brw_inst_set_jip(devinfo, insn, jump);
          else
-            brw_inst_set_gen6_jump_count(brw, insn, jump);
+            brw_inst_set_gen6_jump_count(devinfo, insn, jump);
 	 break;
       }
 
@@ -2649,12 +2651,12 @@ brw_set_uip_jip(struct brw_compile *p)
 	  * instruction.
 	  */
 	 if (block_end_offset == 0) {
-            brw_inst_set_jip(brw, insn, brw_inst_uip(brw, insn));
+            brw_inst_set_jip(devinfo, insn, brw_inst_uip(devinfo, insn));
 	 } else {
-            brw_inst_set_jip(brw, insn, (block_end_offset - offset) / scale);
+            brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale);
 	 }
-         assert(brw_inst_uip(brw, insn) != 0);
-         assert(brw_inst_jip(brw, insn) != 0);
+         assert(brw_inst_uip(devinfo, insn) != 0);
+         assert(brw_inst_jip(devinfo, insn) != 0);
 	 break;
       }
    }
@@ -2668,7 +2670,7 @@ void brw_ff_sync(struct brw_compile *p,
 		   unsigned response_length,
 		   bool eot)
 {
-   struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn;
 
    gen6_resolve_implied_move(p, &src0, msg_reg_nr);
@@ -2678,8 +2680,8 @@ void brw_ff_sync(struct brw_compile *p,
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, brw_imm_d(0));
 
-   if (brw->gen < 6)
-      brw_inst_set_base_mrf(brw, insn, msg_reg_nr);
+   if (devinfo->gen < 6)
+      brw_inst_set_base_mrf(devinfo, insn, msg_reg_nr);
 
    brw_set_ff_sync_message(p,
 			   insn,
@@ -2733,7 +2735,7 @@ brw_surface_payload_size(struct brw_compile *p,
                          bool has_simd4x2,
                          bool has_simd16)
 {
-   if (has_simd4x2 && brw_inst_access_mode(p->brw, p->current) == BRW_ALIGN_16)
+   if (has_simd4x2 && brw_inst_access_mode(p->devinfo, p->current) == BRW_ALIGN_16)
       return 1;
    else if (has_simd16 && p->compressed)
       return 2 * num_channels;
@@ -2750,26 +2752,26 @@ brw_set_dp_untyped_atomic_message(struct brw_compile *p,
                                   unsigned response_length,
                                   bool header_present)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
 
    unsigned msg_control =
       atomic_op | /* Atomic Operation Type: BRW_AOP_* */
       (response_length ? 1 << 5 : 0); /* Return data expected */
 
-   if (brw->gen >= 8 || brw->is_haswell) {
+   if (devinfo->gen >= 8 || devinfo->is_haswell) {
       brw_set_message_descriptor(p, insn, HSW_SFID_DATAPORT_DATA_CACHE_1,
                                  msg_length, response_length,
                                  header_present, false);
 
 
-      if (brw_inst_access_mode(brw, insn) == BRW_ALIGN_1) {
-         if (brw_inst_exec_size(brw, insn) != BRW_EXECUTE_16)
+      if (brw_inst_access_mode(devinfo, insn) == BRW_ALIGN_1) {
+         if (brw_inst_exec_size(devinfo, insn) != BRW_EXECUTE_16)
             msg_control |= 1 << 4; /* SIMD8 mode */
 
-         brw_inst_set_dp_msg_type(brw, insn,
+         brw_inst_set_dp_msg_type(devinfo, insn,
                                   HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP);
       } else {
-         brw_inst_set_dp_msg_type(brw, insn,
+         brw_inst_set_dp_msg_type(devinfo, insn,
             HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2);
       }
    } else {
@@ -2777,14 +2779,14 @@ brw_set_dp_untyped_atomic_message(struct brw_compile *p,
                                  msg_length, response_length,
                                  header_present, false);
 
-      brw_inst_set_dp_msg_type(brw, insn, GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP);
+      brw_inst_set_dp_msg_type(devinfo, insn, GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP);
 
-      if (brw_inst_exec_size(brw, insn) != BRW_EXECUTE_16)
+      if (brw_inst_exec_size(devinfo, insn) != BRW_EXECUTE_16)
          msg_control |= 1 << 4; /* SIMD8 mode */
    }
 
-   brw_inst_set_binding_table_index(brw, insn, bind_table_index);
-   brw_inst_set_dp_msg_control(brw, insn, msg_control);
+   brw_inst_set_binding_table_index(devinfo, insn, bind_table_index);
+   brw_inst_set_dp_msg_control(devinfo, insn, msg_control);
 }
 
 void
@@ -2796,8 +2798,8 @@ brw_untyped_atomic(struct brw_compile *p,
                    unsigned msg_length,
                    bool response_expected)
 {
-   const struct brw_context *brw = p->brw;
-   const bool align1 = brw_inst_access_mode(brw, p->current) == BRW_ALIGN_1;
+   const struct brw_device_info *devinfo = p->devinfo;
+   const bool align1 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1;
    /* Mask out unused components -- This is especially important in Align16
     * mode on generations that don't have native support for SIMD4x2 atomics,
     * because unused but enabled components will cause the dataport to perform
@@ -2814,7 +2816,7 @@ brw_untyped_atomic(struct brw_compile *p,
    brw_set_dp_untyped_atomic_message(
       p, insn, atomic_op, bind_table_index, msg_length,
       brw_surface_payload_size(p, response_expected,
-                               brw->gen >= 8 || brw->is_haswell, true),
+                               devinfo->gen >= 8 || devinfo->is_haswell, true),
       align1);
 }
 
@@ -2827,38 +2829,38 @@ brw_set_dp_untyped_surface_read_message(struct brw_compile *p,
                                         unsigned num_channels,
                                         bool header_present)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    const unsigned dispatch_width =
-      (brw_inst_exec_size(brw, insn) == BRW_EXECUTE_16 ? 16 : 8);
+      (brw_inst_exec_size(devinfo, insn) == BRW_EXECUTE_16 ? 16 : 8);
 
-   if (brw->gen >= 8 || brw->is_haswell) {
+   if (devinfo->gen >= 8 || devinfo->is_haswell) {
       brw_set_message_descriptor(p, insn, HSW_SFID_DATAPORT_DATA_CACHE_1,
                                  msg_length, response_length,
                                  header_present, false);
 
-      brw_inst_set_dp_msg_type(brw, insn,
+      brw_inst_set_dp_msg_type(devinfo, insn,
                                HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ);
    } else {
       brw_set_message_descriptor(p, insn, GEN7_SFID_DATAPORT_DATA_CACHE,
                                  msg_length, response_length,
                                  header_present, false);
 
-      brw_inst_set_dp_msg_type(brw, insn,
+      brw_inst_set_dp_msg_type(devinfo, insn,
                                GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ);
    }
 
    /* Set mask of 32-bit channels to drop. */
    unsigned msg_control = (0xf & (0xf << num_channels));
 
-   if (brw_inst_access_mode(brw, insn) == BRW_ALIGN_1) {
+   if (brw_inst_access_mode(devinfo, insn) == BRW_ALIGN_1) {
       if (dispatch_width == 16)
          msg_control |= 1 << 4; /* SIMD16 mode */
       else
          msg_control |= 2 << 4; /* SIMD8 mode */
    }
 
-   brw_inst_set_binding_table_index(brw, insn, bind_table_index);
-   brw_inst_set_dp_msg_control(brw, insn, msg_control);
+   brw_inst_set_binding_table_index(devinfo, insn, bind_table_index);
+   brw_inst_set_dp_msg_control(devinfo, insn, msg_control);
 }
 
 void
@@ -2869,7 +2871,7 @@ brw_untyped_surface_read(struct brw_compile *p,
                          unsigned msg_length,
                          unsigned num_channels)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
    brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UD));
@@ -2877,7 +2879,7 @@ brw_untyped_surface_read(struct brw_compile *p,
    brw_set_dp_untyped_surface_read_message(
       p, insn, bind_table_index, msg_length,
       brw_surface_payload_size(p, num_channels, true, true),
-      num_channels, brw_inst_access_mode(brw, insn) == BRW_ALIGN_1);
+      num_channels, brw_inst_access_mode(devinfo, insn) == BRW_ALIGN_1);
 }
 
 void
@@ -2890,7 +2892,7 @@ brw_pixel_interpolator_query(struct brw_compile *p,
                              unsigned msg_length,
                              unsigned response_length)
 {
-   const struct brw_context *brw = p->brw;
+   const struct brw_device_info *devinfo = p->devinfo;
    struct brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
    brw_set_dest(p, insn, dest);
@@ -2901,11 +2903,11 @@ brw_pixel_interpolator_query(struct brw_compile *p,
                               false);
 
    brw_inst_set_pi_simd_mode(
-         brw, insn, brw_inst_exec_size(brw, insn) == BRW_EXECUTE_16);
-   brw_inst_set_pi_slot_group(brw, insn, 0); /* zero unless 32/64px dispatch */
-   brw_inst_set_pi_nopersp(brw, insn, noperspective);
-   brw_inst_set_pi_message_type(brw, insn, mode);
-   brw_inst_set_pi_message_data(brw, insn, data);
+         devinfo, insn, brw_inst_exec_size(devinfo, insn) == BRW_EXECUTE_16);
+   brw_inst_set_pi_slot_group(devinfo, insn, 0); /* zero unless 32/64px dispatch */
+   brw_inst_set_pi_nopersp(devinfo, insn, noperspective);
+   brw_inst_set_pi_message_type(devinfo, insn, mode);
+   brw_inst_set_pi_message_data(devinfo, insn, data);
 }
 
 /**
@@ -2928,7 +2930,7 @@ void brw_shader_time_add(struct brw_compile *p,
                          struct brw_reg payload,
                          uint32_t surf_index)
 {
-   assert(p->brw->gen >= 7);
+   assert(p->devinfo->gen >= 7);
 
    brw_push_insn_state(p);
    brw_set_default_access_mode(p, BRW_ALIGN_1);
diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
index 3f31597..e7e8e02 100644
--- a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
@@ -346,7 +346,6 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
 	         unsigned num_verts, bool check_edge_flags)
 {
    struct brw_compile *p = &c->func;
-   struct brw_context *brw = p->brw;
    brw_inst *inst;
    c->prog_data.svbi_postincrement_value = num_verts;
 
@@ -412,7 +411,7 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
          inst = brw_MOV(p, destination_indices_uw,
                         brw_imm_v(key->pv_first ? 0x00010200    /* (0, 2, 1) */
                                                 : 0x00020001)); /* (1, 0, 2) */
-         brw_inst_set_pred_control(brw, inst, BRW_PREDICATE_NORMAL);
+         brw_inst_set_pred_control(p->devinfo, inst, BRW_PREDICATE_NORMAL);
       }
       brw_ADD(p, c->reg.destination_indices,
               c->reg.destination_indices, get_element_ud(c->reg.SVBI, 0));
@@ -502,7 +501,7 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
          brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
                  get_element_ud(c->reg.R0, 2),
                  brw_imm_ud(BRW_GS_EDGE_INDICATOR_0));
-         brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+         brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
          brw_IF(p, BRW_EXECUTE_1);
       }
       brw_ff_gs_offset_header_dw2(c, URB_WRITE_PRIM_START);
@@ -518,7 +517,7 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
          brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
                  get_element_ud(c->reg.R0, 2),
                  brw_imm_ud(BRW_GS_EDGE_INDICATOR_1));
-         brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+         brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
          brw_set_default_predicate_control(p, BRW_PREDICATE_NORMAL);
       }
       brw_ff_gs_offset_header_dw2(c, URB_WRITE_PRIM_END);
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 8d34d8a..6b4362b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -164,7 +164,7 @@ fs_generator::patch_discard_jumps_to_fb_writes()
    if (brw->gen < 6 || this->discard_halt_patches.is_empty())
       return false;
 
-   int scale = brw_jump_scale(brw);
+   int scale = brw_jump_scale(p->devinfo);
 
    /* There is a somewhat strange undocumented requirement of using
     * HALT, according to the simulator.  If some channel has HALTed to
@@ -178,17 +178,17 @@ fs_generator::patch_discard_jumps_to_fb_writes()
     * tests.
     */
    brw_inst *last_halt = gen6_HALT(p);
-   brw_inst_set_uip(brw, last_halt, 1 * scale);
-   brw_inst_set_jip(brw, last_halt, 1 * scale);
+   brw_inst_set_uip(p->devinfo, last_halt, 1 * scale);
+   brw_inst_set_jip(p->devinfo, last_halt, 1 * scale);
 
    int ip = p->nr_insn;
 
    foreach_in_list(ip_record, patch_ip, &discard_halt_patches) {
       brw_inst *patch = &p->store[patch_ip->ip];
 
-      assert(brw_inst_opcode(brw, patch) == BRW_OPCODE_HALT);
+      assert(brw_inst_opcode(p->devinfo, patch) == BRW_OPCODE_HALT);
       /* HALT takes a half-instruction distance from the pre-incremented IP. */
-      brw_inst_set_uip(brw, patch, (ip - patch_ip->ip) * scale);
+      brw_inst_set_uip(p->devinfo, patch, (ip - patch_ip->ip) * scale);
    }
 
    this->discard_halt_patches.make_empty();
@@ -337,10 +337,10 @@ fs_generator::generate_fb_write(fs_inst *inst, struct brw_reg payload)
               v1_null_ud,
               retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD),
               brw_imm_ud(1<<26));
-      brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
+      brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
 
       int jmp = brw_JMPI(p, brw_imm_ud(0), BRW_PREDICATE_NORMAL) - p->store;
-      brw_inst_set_exec_size(brw, brw_last_inst, BRW_EXECUTE_1);
+      brw_inst_set_exec_size(p->devinfo, brw_last_inst, BRW_EXECUTE_1);
       {
          /* Don't send AA data */
          fire_fb_write(inst, offset(payload, 1), implied_header, inst->mlen-1);
@@ -361,14 +361,14 @@ fs_generator::generate_urb_write(fs_inst *inst, struct brw_reg payload)
    brw_set_src0(p, insn, payload);
    brw_set_src1(p, insn, brw_imm_d(0));
 
-   brw_inst_set_sfid(brw, insn, BRW_SFID_URB);
-   brw_inst_set_urb_opcode(brw, insn, GEN8_URB_OPCODE_SIMD8_WRITE);
+   brw_inst_set_sfid(p->devinfo, insn, BRW_SFID_URB);
+   brw_inst_set_urb_opcode(p->devinfo, insn, GEN8_URB_OPCODE_SIMD8_WRITE);
 
-   brw_inst_set_mlen(brw, insn, inst->mlen);
-   brw_inst_set_rlen(brw, insn, 0);
-   brw_inst_set_eot(brw, insn, inst->eot);
-   brw_inst_set_header_present(brw, insn, true);
-   brw_inst_set_urb_global_offset(brw, insn, inst->offset);
+   brw_inst_set_mlen(p->devinfo, insn, inst->mlen);
+   brw_inst_set_rlen(p->devinfo, insn, 0);
+   brw_inst_set_eot(p->devinfo, insn, inst->eot);
+   brw_inst_set_header_present(p->devinfo, insn, true);
+   brw_inst_set_urb_global_offset(p->devinfo, insn, inst->offset);
 }
 
 void
@@ -793,8 +793,8 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
    }
 
    if (is_combined_send) {
-      brw_inst_set_eot(brw, brw_last_inst, true);
-      brw_inst_set_opcode(brw, brw_last_inst, BRW_OPCODE_SENDC);
+      brw_inst_set_eot(p->devinfo, brw_last_inst, true);
+      brw_inst_set_opcode(p->devinfo, brw_last_inst, BRW_OPCODE_SENDC);
    }
 }
 
@@ -1091,7 +1091,7 @@ fs_generator::generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 
       /* a0.0 = surf_index & 0xff */
       brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND);
-      brw_inst_set_exec_size(p->brw, insn_and, BRW_EXECUTE_1);
+      brw_inst_set_exec_size(p->devinfo, insn_and, BRW_EXECUTE_1);
       brw_set_dest(p, insn_and, addr);
       brw_set_src0(p, insn_and, vec1(retype(index, BRW_REGISTER_TYPE_UD)));
       brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
@@ -1162,11 +1162,11 @@ fs_generator::generate_varying_pull_constant_load(fs_inst *inst,
    gen6_resolve_implied_move(p, &header, inst->base_mrf);
 
    brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
-   brw_inst_set_qtr_control(brw, send, BRW_COMPRESSION_NONE);
+   brw_inst_set_qtr_control(p->devinfo, send, BRW_COMPRESSION_NONE);
    brw_set_dest(p, send, retype(dst, BRW_REGISTER_TYPE_UW));
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
-      brw_inst_set_base_mrf(brw, send, inst->base_mrf);
+      brw_inst_set_base_mrf(p->devinfo, send, inst->base_mrf);
 
    /* Our surface is set up as floats, regardless of what actual data is
     * stored in it.
@@ -1239,7 +1239,7 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
 
       /* a0.0 = surf_index & 0xff */
       brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND);
-      brw_inst_set_exec_size(p->brw, insn_and, BRW_EXECUTE_1);
+      brw_inst_set_exec_size(p->devinfo, insn_and, BRW_EXECUTE_1);
       brw_set_dest(p, insn_and, addr);
       brw_set_src0(p, insn_and, vec1(retype(index, BRW_REGISTER_TYPE_UD)));
       brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
@@ -1658,8 +1658,8 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
 	    brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
             if (inst->conditional_mod) {
-               brw_inst_set_cond_modifier(brw, f, inst->conditional_mod);
-               brw_inst_set_cond_modifier(brw, s, inst->conditional_mod);
+               brw_inst_set_cond_modifier(p->devinfo, f, inst->conditional_mod);
+               brw_inst_set_cond_modifier(p->devinfo, s, inst->conditional_mod);
                multiple_instructions_emitted = true;
             }
 	 } else {
@@ -1680,8 +1680,8 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
 	    brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
             if (inst->conditional_mod) {
-               brw_inst_set_cond_modifier(brw, f, inst->conditional_mod);
-               brw_inst_set_cond_modifier(brw, s, inst->conditional_mod);
+               brw_inst_set_cond_modifier(p->devinfo, f, inst->conditional_mod);
+               brw_inst_set_cond_modifier(p->devinfo, s, inst->conditional_mod);
                multiple_instructions_emitted = true;
             }
 	 } else {
@@ -2115,9 +2115,9 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
          brw_inst *last = &p->store[last_insn_offset / 16];
 
          if (inst->conditional_mod)
-            brw_inst_set_cond_modifier(brw, last, inst->conditional_mod);
-         brw_inst_set_no_dd_clear(brw, last, inst->no_dd_clear);
-         brw_inst_set_no_dd_check(brw, last, inst->no_dd_check);
+            brw_inst_set_cond_modifier(p->devinfo, last, inst->conditional_mod);
+         brw_inst_set_no_dd_clear(p->devinfo, last, inst->no_dd_clear);
+         brw_inst_set_no_dd_check(p->devinfo, last, inst->no_dd_check);
       }
    }
 
diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index d067b72..e347c51 100644
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -52,19 +52,19 @@ static inline void brw_inst_set_bits(brw_inst *inst,
 
 #define FC(name, high, low, assertions)                       \
 static inline void                                            \
-brw_inst_set_##name(const struct brw_context *brw,            \
+brw_inst_set_##name(const struct brw_device_info *devinfo,    \
                     brw_inst *inst, uint64_t v)               \
 {                                                             \
    assert(assertions);                                        \
-   (void) brw;                                                \
+   (void) devinfo;                                            \
    brw_inst_set_bits(inst, high, low, v);                     \
 }                                                             \
 static inline uint64_t                                        \
-brw_inst_##name(const struct brw_context *brw,                \
+brw_inst_##name(const struct brw_device_info *devinfo,        \
                 const brw_inst *inst)                         \
 {                                                             \
    assert(assertions);                                        \
-   (void) brw;                                                \
+   (void) devinfo;                                            \
    return brw_inst_bits(inst, high, low);                     \
 }
 
@@ -73,15 +73,15 @@ brw_inst_##name(const struct brw_context *brw,                \
 
 #define BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8) \
    unsigned high, low;                                                       \
-   if (brw->gen >= 8) {                                                      \
+   if (devinfo->gen >= 8) {                                                  \
       high = hi8;  low = lo8;                                                \
-   } else if (brw->gen >= 7) {                                               \
+   } else if (devinfo->gen >= 7) {                                           \
       high = hi7;  low = lo7;                                                \
-   } else if (brw->gen >= 6) {                                               \
+   } else if (devinfo->gen >= 6) {                                           \
       high = hi6;  low = lo6;                                                \
-   } else if (brw->gen >= 5) {                                               \
+   } else if (devinfo->gen >= 5) {                                           \
       high = hi5;  low = lo5;                                                \
-   } else if (brw->is_g4x) {                                                 \
+   } else if (devinfo->is_g4x) {                                             \
       high = hi45; low = lo45;                                               \
    } else {                                                                  \
       high = hi4;  low = lo4;                                                \
@@ -94,14 +94,14 @@ brw_inst_##name(const struct brw_context *brw,                \
  */
 #define FF(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)\
 static inline void                                                            \
-brw_inst_set_##name(const struct brw_context *brw,                            \
+brw_inst_set_##name(const struct brw_device_info *devinfo,                    \
                     brw_inst *inst, uint64_t value)                           \
 {                                                                             \
    BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)       \
    brw_inst_set_bits(inst, high, low, value);                                 \
 }                                                                             \
 static inline uint64_t                                                        \
-brw_inst_##name(const struct brw_context *brw, const brw_inst *inst)          \
+brw_inst_##name(const struct brw_device_info *devinfo, const brw_inst *inst)  \
 {                                                                             \
    BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)       \
    return brw_inst_bits(inst, high, low);                                     \
@@ -171,10 +171,10 @@ F8(flag_subreg_nr,     /* 4+ */  89, 89, /* 8+ */ 32, 32)
 F(saturate,             31,  31)
 F(debug_control,        30,  30)
 F(cmpt_control,         29,  29)
-FC(branch_control,      28,  28, brw->gen >= 8)
+FC(branch_control,      28,  28, devinfo->gen >= 8)
 F(acc_wr_control,       28,  28)
 F(cond_modifier,        27,  24)
-FC(math_function,       27,  24, brw->gen >= 6)
+FC(math_function,       27,  24, devinfo->gen >= 6)
 F(exec_size,            23,  21)
 F(pred_inv,             20,  20)
 F(pred_control,         19,  16)
@@ -247,12 +247,12 @@ F(3src_opcode,           6,  0)
  *  @{
  */
 static inline void
-brw_inst_set_uip(const struct brw_context *brw,
+brw_inst_set_uip(const struct brw_device_info *devinfo,
                  brw_inst *inst, int32_t value)
 {
-   assert(brw->gen >= 6);
+   assert(devinfo->gen >= 6);
 
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       brw_inst_set_bits(inst, 95, 64, (uint32_t)value);
    } else {
       assert(value <= (1 << 16) - 1);
@@ -262,11 +262,11 @@ brw_inst_set_uip(const struct brw_context *brw,
 }
 
 static inline int32_t
-brw_inst_uip(const struct brw_context *brw, const brw_inst *inst)
+brw_inst_uip(const struct brw_device_info *devinfo, const brw_inst *inst)
 {
-   assert(brw->gen >= 6);
+   assert(devinfo->gen >= 6);
 
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       return brw_inst_bits(inst, 95, 64);
    } else {
       return (int16_t)brw_inst_bits(inst, 127, 112);
@@ -274,12 +274,12 @@ brw_inst_uip(const struct brw_context *brw, const brw_inst *inst)
 }
 
 static inline void
-brw_inst_set_jip(const struct brw_context *brw,
+brw_inst_set_jip(const struct brw_device_info *devinfo,
                  brw_inst *inst, int32_t value)
 {
-   assert(brw->gen >= 6);
+   assert(devinfo->gen >= 6);
 
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       brw_inst_set_bits(inst, 127, 96, (uint32_t)value);
    } else {
       assert(value <= (1 << 16) - 1);
@@ -289,11 +289,11 @@ brw_inst_set_jip(const struct brw_context *brw,
 }
 
 static inline int32_t
-brw_inst_jip(const struct brw_context *brw, const brw_inst *inst)
+brw_inst_jip(const struct brw_device_info *devinfo, const brw_inst *inst)
 {
-   assert(brw->gen >= 6);
+   assert(devinfo->gen >= 6);
 
-   if (brw->gen >= 8) {
+   if (devinfo->gen >= 8) {
       return brw_inst_bits(inst, 127, 96);
    } else {
       return (int16_t)brw_inst_bits(inst, 111, 96);
@@ -303,23 +303,23 @@ brw_inst_jip(const struct brw_context *brw, const brw_inst *inst)
 /** Like FC, but using int16_t to handle negative jump targets. */
 #define FJ(name, high, low, assertions)                                       \
 static inline void                                                            \
-brw_inst_set_##name(const struct brw_context *brw, brw_inst *inst, int16_t v) \
+brw_inst_set_##name(const struct brw_device_info *devinfo, brw_inst *inst, int16_t v) \
 {                                                                             \
    assert(assertions);                                                        \
-   (void) brw;                                                                \
+   (void) devinfo;                                                            \
    brw_inst_set_bits(inst, high, low, (uint16_t) v);                          \
 }                                                                             \
 static inline int16_t                                                         \
-brw_inst_##name(const struct brw_context *brw, const brw_inst *inst)          \
+brw_inst_##name(const struct brw_device_info *devinfo, const brw_inst *inst)  \
 {                                                                             \
    assert(assertions);                                                        \
-   (void) brw;                                                                \
+   (void) devinfo;                                                            \
    return brw_inst_bits(inst, high, low);                                     \
 }
 
-FJ(gen6_jump_count,  63,  48, brw->gen == 6)
-FJ(gen4_jump_count, 111,  96, brw->gen < 6)
-FC(gen4_pop_count,  115, 112, brw->gen < 6)
+FJ(gen6_jump_count,  63,  48, devinfo->gen == 6)
+FJ(gen4_jump_count, 111,  96, devinfo->gen < 6)
+FC(gen4_pop_count,  115, 112, devinfo->gen < 6)
 /** @} */
 
 /**
@@ -361,7 +361,7 @@ FF(sfid,
    /* 6:   */  27,  24,
    /* 7:   */  27,  24,
    /* 8:   */  27,  24)
-FC(base_mrf,   27,  24, brw->gen < 6);
+FC(base_mrf,   27,  24, devinfo->gen < 6);
 /** @} */
 
 /* Message descriptor bits */
@@ -375,9 +375,9 @@ FF(urb_per_slot_offset,
    /* 4-6: */ -1, -1, -1, -1, -1, -1, -1, -1,
    /* 7:   */ MD(16), MD(16),
    /* 8:   */ MD(17), MD(17))
-FC(urb_complete, MD(15), MD(15), brw->gen < 8)
-FC(urb_used, MD(14), MD(14), brw->gen < 7)
-FC(urb_allocate, MD(13), MD(13), brw->gen < 7)
+FC(urb_complete, MD(15), MD(15), devinfo->gen < 8)
+FC(urb_used, MD(14), MD(14), devinfo->gen < 7)
+FC(urb_allocate, MD(13), MD(13), devinfo->gen < 7)
 FF(urb_swizzle_control,
    /* 4:   */ MD(11), MD(10),
    /* 4.5: */ MD(11), MD(10),
@@ -405,11 +405,11 @@ FF(urb_opcode,
  * Gen4-5 math messages:
  *  @{
  */
-FC(math_msg_data_type,  MD(7), MD(7), brw->gen < 6)
-FC(math_msg_saturate,   MD(6), MD(6), brw->gen < 6)
-FC(math_msg_precision,  MD(5), MD(5), brw->gen < 6)
-FC(math_msg_signed_int, MD(4), MD(4), brw->gen < 6)
-FC(math_msg_function,   MD(3), MD(0), brw->gen < 6)
+FC(math_msg_data_type,  MD(7), MD(7), devinfo->gen < 6)
+FC(math_msg_saturate,   MD(6), MD(6), devinfo->gen < 6)
+FC(math_msg_precision,  MD(5), MD(5), devinfo->gen < 6)
+FC(math_msg_signed_int, MD(4), MD(4), devinfo->gen < 6)
+FC(math_msg_function,   MD(3), MD(0), devinfo->gen < 6)
 /** @} */
 
 /**
@@ -429,7 +429,7 @@ FF(sampler_msg_type,
    /* 6:   */ MD(15), MD(12),
    /* 7:   */ MD(16), MD(12),
    /* 8:   */ MD(16), MD(12))
-FC(sampler_return_format, MD(13), MD(12), brw->gen == 4 && !brw->is_g4x)
+FC(sampler_return_format, MD(13), MD(12), devinfo->gen == 4 && !devinfo->is_g4x)
 F(sampler,                MD(11), MD(8))
 F(binding_table_index,    MD( 7), MD(0)) /* also used by other messages */
 /** @} */
@@ -438,7 +438,7 @@ F(binding_table_index,    MD( 7), MD(0)) /* also used by other messages */
  * Data port message function control bits:
  *  @{
  */
-FC(dp_category,         MD(18), MD(18), brw->gen >= 7)
+FC(dp_category,         MD(18), MD(18), devinfo->gen >= 7)
 
 /* Gen4-5 store fields in different bits for read/write messages. */
 FF(dp_read_msg_type,
@@ -469,7 +469,7 @@ FF(dp_write_msg_control,
    /* 6:   */ MD(12), MD( 8),
    /* 7:   */ MD(13), MD( 8),
    /* 8:   */ MD(13), MD( 8))
-FC(dp_read_target_cache, MD(15), MD(14), brw->gen < 6);
+FC(dp_read_target_cache, MD(15), MD(14), devinfo->gen < 6);
 
 FF(dp_write_commit,
    /* 4:   */ MD(15),  MD(15),
@@ -497,11 +497,11 @@ FF(dp_msg_control,
  * Scratch message bits (Gen7+):
  *  @{
  */
-FC(scratch_read_write, MD(17), MD(17), brw->gen >= 7) /* 0 = read,  1 = write */
-FC(scratch_type,       MD(16), MD(16), brw->gen >= 7) /* 0 = OWord, 1 = DWord */
-FC(scratch_invalidate_after_read, MD(15), MD(15), brw->gen >= 7)
-FC(scratch_block_size,  MD(13),  MD(12), brw->gen >= 7)
-FC(scratch_addr_offset, MD(11),  MD( 0), brw->gen >= 7)
+FC(scratch_read_write, MD(17), MD(17), devinfo->gen >= 7) /* 0 = read,  1 = write */
+FC(scratch_type,       MD(16), MD(16), devinfo->gen >= 7) /* 0 = OWord, 1 = DWord */
+FC(scratch_invalidate_after_read, MD(15), MD(15), devinfo->gen >= 7)
+FC(scratch_block_size,  MD(13),  MD(12), devinfo->gen >= 7)
+FC(scratch_addr_offset, MD(11),  MD( 0), devinfo->gen >= 7)
 /** @} */
 
 /**
@@ -515,7 +515,7 @@ FF(rt_last,
    /* 6:   */ MD(12), MD(12),
    /* 7:   */ MD(12), MD(12),
    /* 8:   */ MD(12), MD(12))
-FC(rt_slot_group,      MD(11),  MD(11), brw->gen >= 6)
+FC(rt_slot_group,      MD(11),  MD(11), devinfo->gen >= 6)
 F(rt_message_type,     MD(10),  MD( 8))
 /** @} */
 
@@ -544,50 +544,50 @@ F(pi_message_data,   MD(7),   MD(0))
  *  @{
  */
 static inline int
-brw_inst_imm_d(const struct brw_context *brw, const brw_inst *insn)
+brw_inst_imm_d(const struct brw_device_info *devinfo, const brw_inst *insn)
 {
-   (void) brw;
+   (void) devinfo;
    return brw_inst_bits(insn, 127, 96);
 }
 
 static inline unsigned
-brw_inst_imm_ud(const struct brw_context *brw, const brw_inst *insn)
+brw_inst_imm_ud(const struct brw_device_info *devinfo, const brw_inst *insn)
 {
-   (void) brw;
+   (void) devinfo;
    return brw_inst_bits(insn, 127, 96);
 }
 
 static inline float
-brw_inst_imm_f(const struct brw_context *brw, const brw_inst *insn)
+brw_inst_imm_f(const struct brw_device_info *devinfo, const brw_inst *insn)
 {
    fi_type ft;
-   (void) brw;
+   (void) devinfo;
    ft.u = brw_inst_bits(insn, 127, 96);
    return ft.f;
 }
 
 static inline void
-brw_inst_set_imm_d(const struct brw_context *brw,
+brw_inst_set_imm_d(const struct brw_device_info *devinfo,
                    brw_inst *insn, int value)
 {
-   (void) brw;
+   (void) devinfo;
    return brw_inst_set_bits(insn, 127, 96, value);
 }
 
 static inline void
-brw_inst_set_imm_ud(const struct brw_context *brw,
+brw_inst_set_imm_ud(const struct brw_device_info *devinfo,
                     brw_inst *insn, unsigned value)
 {
-   (void) brw;
+   (void) devinfo;
    return brw_inst_set_bits(insn, 127, 96, value);
 }
 
 static inline void
-brw_inst_set_imm_f(const struct brw_context *brw,
+brw_inst_set_imm_f(const struct brw_device_info *devinfo,
                    brw_inst *insn, float value)
 {
    fi_type ft;
-   (void) brw;
+   (void) devinfo;
    ft.f = value;
    brw_inst_set_bits(insn, 127, 96, ft.u);
 }
@@ -597,12 +597,12 @@ brw_inst_set_imm_f(const struct brw_context *brw,
 /* The AddrImm fields are split into two discontiguous sections on Gen8+ */
 #define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \
 static inline void                                                       \
-brw_inst_set_##reg##_ia1_addr_imm(const struct brw_context *brw,         \
+brw_inst_set_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo, \
                                   brw_inst *inst,                        \
                                   unsigned value)                        \
 {                                                                        \
    assert((value & ~0x3ff) == 0);                                        \
-   if (brw->gen >= 8) {                                                  \
+   if (devinfo->gen >= 8) {                                              \
       brw_inst_set_bits(inst, g8_high, g8_low, value & 0x1ff);           \
       brw_inst_set_bits(inst, g8_nine, g8_nine, value >> 9);             \
    } else {                                                              \
@@ -610,10 +610,10 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct brw_context *brw,         \
    }                                                                     \
 }                                                                        \
 static inline unsigned                                                   \
-brw_inst_##reg##_ia1_addr_imm(const struct brw_context *brw,             \
+brw_inst_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo,     \
                               const brw_inst *inst)                      \
 {                                                                        \
-   if (brw->gen >= 8) {                                                  \
+   if (devinfo->gen >= 8) {                                              \
       return brw_inst_bits(inst, g8_high, g8_low) |                      \
              (brw_inst_bits(inst, g8_nine, g8_nine) << 9);               \
    } else {                                                              \
@@ -629,11 +629,11 @@ BRW_IA1_ADDR_IMM(dst,   57, 48,  47,  56, 48)
 
 #define BRW_IA16_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \
 static inline void                                                        \
-brw_inst_set_##reg##_ia16_addr_imm(const struct brw_context *brw,         \
+brw_inst_set_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo, \
                                    brw_inst *inst, unsigned value)        \
 {                                                                         \
    assert((value & ~0x3ff) == 0);                                         \
-   if (brw->gen >= 8) {                                                   \
+   if (devinfo->gen >= 8) {                                               \
       brw_inst_set_bits(inst, g8_high, g8_low, value & 0x1ff);            \
       brw_inst_set_bits(inst, g8_nine, g8_nine, value >> 9);              \
    } else {                                                               \
@@ -641,10 +641,10 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct brw_context *brw,         \
    }                                                                      \
 }                                                                         \
 static inline unsigned                                                    \
-brw_inst_##reg##_ia16_addr_imm(const struct brw_context *brw,             \
+brw_inst_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo,     \
                                const brw_inst *inst)                      \
 {                                                                         \
-   if (brw->gen >= 8) {                                                   \
+   if (devinfo->gen >= 8) {                                               \
       return brw_inst_bits(inst, g8_high, g8_low) |                       \
              (brw_inst_bits(inst, g8_nine, g8_nine) << 9);                \
    } else {                                                               \
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index 1b2bb10..c03a8ae 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -53,7 +53,7 @@
 extern "C" {
 #endif
 
-struct brw_context;
+struct brw_device_info;
 
 /** Number of general purpose registers (VS, WM, etc) */
 #define BRW_MAX_GRF 128
@@ -218,7 +218,7 @@ enum PACKED brw_reg_type {
    BRW_REGISTER_TYPE_Q,
 };
 
-unsigned brw_reg_type_to_hw_type(const struct brw_context *brw,
+unsigned brw_reg_type_to_hw_type(const struct brw_device_info *devinfo,
                                  enum brw_reg_type type, unsigned file);
 const char *brw_reg_type_letters(unsigned brw_reg_type);
 
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index e8bf716..a16303b 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -730,7 +730,6 @@ void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate)
 void brw_emit_anyprim_setup( struct brw_sf_compile *c )
 {
    struct brw_compile *p = &c->func;
-   struct brw_context *brw = p->brw;
    struct brw_reg payload_prim = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0);
    struct brw_reg payload_attr = get_element_ud(brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0), 0);
    struct brw_reg primmask;
@@ -752,7 +751,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
 					       (1<<_3DPRIM_POLYGON) |
 					       (1<<_3DPRIM_RECTLIST) |
 					       (1<<_3DPRIM_TRIFAN_NOSTIPPLE)));
-   brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_Z);
+   brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_Z);
    jmp = brw_JMPI(p, brw_imm_d(0), BRW_PREDICATE_NORMAL) - p->store;
    brw_emit_tri_setup(c, false);
    brw_land_fwd_jump(p, jmp);
@@ -763,13 +762,13 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
 					       (1<<_3DPRIM_LINESTRIP_CONT) |
 					       (1<<_3DPRIM_LINESTRIP_BF) |
 					       (1<<_3DPRIM_LINESTRIP_CONT_BF)));
-   brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_Z);
+   brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_Z);
    jmp = brw_JMPI(p, brw_imm_d(0), BRW_PREDICATE_NORMAL) - p->store;
    brw_emit_line_setup(c, false);
    brw_land_fwd_jump(p, jmp);
 
    brw_AND(p, v1_null_ud, payload_attr, brw_imm_ud(1<<BRW_SPRITE_POINT_ENABLE));
-   brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_Z);
+   brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_Z);
    jmp = brw_JMPI(p, brw_imm_d(0), BRW_PREDICATE_NORMAL) - p->store;
    brw_emit_point_sprite_setup(c, false);
    brw_land_fwd_jump(p, jmp);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index b22a555..427f917 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -901,7 +901,7 @@ vec4_generator::generate_scratch_read(vec4_instruction *inst,
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
-      brw_inst_set_cond_modifier(brw, send, inst->base_mrf);
+      brw_inst_set_cond_modifier(p->devinfo, send, inst->base_mrf);
    brw_set_dp_read_message(p, send,
 			   255, /* binding table index: stateless access */
 			   BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
@@ -972,7 +972,7 @@ vec4_generator::generate_scratch_write(vec4_instruction *inst,
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
-      brw_inst_set_cond_modifier(brw, send, inst->base_mrf);
+      brw_inst_set_cond_modifier(p->devinfo, send, inst->base_mrf);
    brw_set_dp_write_message(p, send,
 			    255, /* binding table index: stateless access */
 			    BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
@@ -1018,7 +1018,7 @@ vec4_generator::generate_pull_constant_load(vec4_instruction *inst,
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
-      brw_inst_set_cond_modifier(brw, send, inst->base_mrf);
+      brw_inst_set_cond_modifier(p->devinfo, send, inst->base_mrf);
    brw_set_dp_read_message(p, send,
 			   surf_index,
 			   BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
@@ -1066,7 +1066,7 @@ vec4_generator::generate_pull_constant_load_gen7(vec4_instruction *inst,
 
       /* a0.0 = surf_index & 0xff */
       brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND);
-      brw_inst_set_exec_size(p->brw, insn_and, BRW_EXECUTE_1);
+      brw_inst_set_exec_size(p->devinfo, insn_and, BRW_EXECUTE_1);
       brw_set_dest(p, insn_and, addr);
       brw_set_src0(p, insn_and, vec1(retype(surf_index, BRW_REGISTER_TYPE_UD)));
       brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
@@ -1339,7 +1339,7 @@ vec4_generator::generate_code(const cfg_t *cfg)
             gen6_IF(p, inst->conditional_mod, src[0], src[1]);
          } else {
             brw_inst *if_inst = brw_IF(p, BRW_EXECUTE_8);
-            brw_inst_set_pred_control(brw, if_inst, inst->predicate);
+            brw_inst_set_pred_control(p->devinfo, if_inst, inst->predicate);
          }
          break;
 
@@ -1553,16 +1553,16 @@ vec4_generator::generate_code(const cfg_t *cfg)
          src[0].hstride = BRW_HORIZONTAL_STRIDE_0;
          dst.subnr = offset * 4;
          struct brw_inst *insn = brw_MOV(p, dst, src[0]);
-         brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_4);
-         brw_inst_set_no_dd_clear(brw, insn, true);
-         brw_inst_set_no_dd_check(brw, insn, inst->no_dd_check);
+         brw_inst_set_exec_size(p->devinfo, insn, BRW_EXECUTE_4);
+         brw_inst_set_no_dd_clear(p->devinfo, insn, true);
+         brw_inst_set_no_dd_check(p->devinfo, insn, inst->no_dd_check);
 
          src[0].subnr = 16;
          dst.subnr = 16 + offset * 4;
          insn = brw_MOV(p, dst, src[0]);
-         brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_4);
-         brw_inst_set_no_dd_clear(brw, insn, inst->no_dd_clear);
-         brw_inst_set_no_dd_check(brw, insn, true);
+         brw_inst_set_exec_size(p->devinfo, insn, BRW_EXECUTE_4);
+         brw_inst_set_no_dd_clear(p->devinfo, insn, inst->no_dd_clear);
+         brw_inst_set_no_dd_check(p->devinfo, insn, true);
 
          brw_set_default_access_mode(p, BRW_ALIGN_16);
          break;
@@ -1590,9 +1590,9 @@ vec4_generator::generate_code(const cfg_t *cfg)
          brw_inst *last = &p->store[pre_emit_nr_insn];
 
          if (inst->conditional_mod)
-            brw_inst_set_cond_modifier(brw, last, inst->conditional_mod);
-         brw_inst_set_no_dd_clear(brw, last, inst->no_dd_clear);
-         brw_inst_set_no_dd_check(brw, last, inst->no_dd_check);
+            brw_inst_set_cond_modifier(p->devinfo, last, inst->conditional_mod);
+         brw_inst_set_no_dd_clear(p->devinfo, last, inst->no_dd_clear);
+         brw_inst_set_no_dd_check(p->devinfo, last, inst->no_dd_check);
       }
    }
 
diff --git a/src/mesa/drivers/dri/i965/test_eu_compact.c b/src/mesa/drivers/dri/i965/test_eu_compact.c
index f461654..71631dc 100644
--- a/src/mesa/drivers/dri/i965/test_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/test_eu_compact.c
@@ -67,20 +67,20 @@ test_compact_instruction(struct brw_compile *p, brw_inst src)
  * become meaningless once fuzzing twiddles a related bit.
  */
 static void
-clear_pad_bits(const struct brw_context *brw, brw_inst *inst)
+clear_pad_bits(const struct brw_device_info *devinfo, brw_inst *inst)
 {
-   if (brw_inst_opcode(brw, inst) != BRW_OPCODE_SEND &&
-       brw_inst_opcode(brw, inst) != BRW_OPCODE_SENDC &&
-       brw_inst_opcode(brw, inst) != BRW_OPCODE_BREAK &&
-       brw_inst_opcode(brw, inst) != BRW_OPCODE_CONTINUE &&
-       brw_inst_src0_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE &&
-       brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
+   if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND &&
+       brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC &&
+       brw_inst_opcode(devinfo, inst) != BRW_OPCODE_BREAK &&
+       brw_inst_opcode(devinfo, inst) != BRW_OPCODE_CONTINUE &&
+       brw_inst_src0_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE &&
+       brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
       brw_inst_set_bits(inst, 127, 111, 0);
    }
 }
 
 static bool
-skip_bit(const struct brw_context *brw, brw_inst *src, int bit)
+skip_bit(const struct brw_device_info *devinfo, brw_inst *src, int bit)
 {
    /* pad bit */
    if (bit == 7)
@@ -99,12 +99,12 @@ skip_bit(const struct brw_context *brw, brw_inst *src, int bit)
       return true;
 
    /* sometimes these are pad bits. */
-   if (brw_inst_opcode(brw, src) != BRW_OPCODE_SEND &&
-       brw_inst_opcode(brw, src) != BRW_OPCODE_SENDC &&
-       brw_inst_opcode(brw, src) != BRW_OPCODE_BREAK &&
-       brw_inst_opcode(brw, src) != BRW_OPCODE_CONTINUE &&
-       brw_inst_src0_reg_file(brw, src) != BRW_IMMEDIATE_VALUE &&
-       brw_inst_src1_reg_file(brw, src) != BRW_IMMEDIATE_VALUE &&
+   if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND &&
+       brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC &&
+       brw_inst_opcode(devinfo, src) != BRW_OPCODE_BREAK &&
+       brw_inst_opcode(devinfo, src) != BRW_OPCODE_CONTINUE &&
+       brw_inst_src0_reg_file(devinfo, src) != BRW_IMMEDIATE_VALUE &&
+       brw_inst_src1_reg_file(devinfo, src) != BRW_IMMEDIATE_VALUE &&
        bit >= 121) {
       return true;
    }
@@ -116,20 +116,20 @@ static bool
 test_fuzz_compact_instruction(struct brw_compile *p, brw_inst src)
 {
    for (int bit0 = 0; bit0 < 128; bit0++) {
-      if (skip_bit(p->brw, &src, bit0))
+      if (skip_bit(p->devinfo, &src, bit0))
 	 continue;
 
       for (int bit1 = 0; bit1 < 128; bit1++) {
          brw_inst instr = src;
 	 uint32_t *bits = (uint32_t *)&instr;
 
-         if (skip_bit(p->brw, &src, bit1))
+         if (skip_bit(p->devinfo, &src, bit1))
 	    continue;
 
 	 bits[bit0 / 32] ^= (1 << (bit0 & 31));
 	 bits[bit1 / 32] ^= (1 << (bit1 & 31));
 
-         clear_pad_bits(p->brw, &instr);
+         clear_pad_bits(p->devinfo, &instr);
 
 	 if (!test_compact_instruction(p, instr)) {
 	    printf("  twiddled bits for fuzzing %d, %d\n", bit0, bit1);
@@ -233,7 +233,7 @@ gen_f0_1_MOV_GRF_GRF(struct brw_compile *p)
    brw_push_insn_state(p);
    brw_set_default_predicate_control(p, true);
    brw_inst *mov = brw_MOV(p, g0, g2);
-   brw_inst_set_flag_subreg_nr(p->brw, mov, 1);
+   brw_inst_set_flag_subreg_nr(p->devinfo, mov, 1);
    brw_pop_insn_state(p);
 }