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authorRob Clark <robclark@freedesktop.org>2015-07-05 18:23:25 -0400
committerRob Clark <robclark@freedesktop.org>2015-07-10 11:57:31 -0400
commit65b2ae510bb07b75f583ecedfd59766621e1cb43 (patch)
tree665d1dbb9db4bf43927bdec6b9a7738244da34e7 /src
parent422296e38d04789cc4ca336b46979b44abd19b5d (diff)
downloadexternal_mesa3d-65b2ae510bb07b75f583ecedfd59766621e1cb43.zip
external_mesa3d-65b2ae510bb07b75f583ecedfd59766621e1cb43.tar.gz
external_mesa3d-65b2ae510bb07b75f583ecedfd59766621e1cb43.tar.bz2
freedreno/ir3: shader-db traces
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_screen.c1
-rw-r--r--src/gallium/drivers/freedreno/freedreno_util.h1
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_cmdline.c10
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_compiler.h1
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c4
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_shader.c38
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_shader.h20
7 files changed, 67 insertions, 8 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 473823f..7b1b4e3 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -69,6 +69,7 @@ static const struct debug_named_value debug_options[] = {
{"nobin", FD_DBG_NOBIN, "Disable hw binning"},
{"optmsgs", FD_DBG_OPTMSGS,"Enable optimizer debug messages"},
{"glsl120", FD_DBG_GLSL120,"Temporary flag to force GLSL 1.20 (rather than 1.30) on a3xx+"},
+ {"shaderdb", FD_DBG_SHADERDB, "Enable shaderdb output"},
DEBUG_NAMED_VALUE_END
};
diff --git a/src/gallium/drivers/freedreno/freedreno_util.h b/src/gallium/drivers/freedreno/freedreno_util.h
index deb0e60..1b78763 100644
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -64,6 +64,7 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
#define FD_DBG_NOBIN 0x0100
#define FD_DBG_OPTMSGS 0x0200
#define FD_DBG_GLSL120 0x0400
+#define FD_DBG_SHADERDB 0x0800
extern int fd_mesa_debug;
extern bool fd_binning_enabled;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
index 2b89fb4..d2aabe1 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
@@ -46,7 +46,7 @@
static void dump_info(struct ir3_shader_variant *so, const char *str)
{
uint32_t *bin;
- const char *type = (so->type == SHADER_VERTEX) ? "VERT" : "FRAG";
+ const char *type = ir3_shader_stage(so->shader);
// TODO make gpu_id configurable on cmdline
bin = ir3_shader_assemble(so, 320);
debug_printf("; %s: %s\n", type, str);
@@ -106,6 +106,7 @@ int main(int argc, char **argv)
struct tgsi_parse_context parse;
struct ir3_compiler *compiler;
struct ir3_shader_variant v;
+ struct ir3_shader s;
struct ir3_shader_key key = {};
const char *info;
void *ptr;
@@ -182,6 +183,7 @@ int main(int argc, char **argv)
memset(&v, 0, sizeof(v));
v.key = key;
+ v.shader = &s;
ret = read_file(filename, &ptr, &size);
if (ret) {
@@ -198,13 +200,13 @@ int main(int argc, char **argv)
tgsi_parse_init(&parse, toks);
switch (parse.FullHeader.Processor.Processor) {
case TGSI_PROCESSOR_FRAGMENT:
- v.type = SHADER_FRAGMENT;
+ s.type = v.type = SHADER_FRAGMENT;
break;
case TGSI_PROCESSOR_VERTEX:
- v.type = SHADER_VERTEX;
+ s.type = v.type = SHADER_VERTEX;
break;
case TGSI_PROCESSOR_COMPUTE:
- v.type = SHADER_COMPUTE;
+ s.type = v.type = SHADER_COMPUTE;
break;
}
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.h b/src/gallium/drivers/freedreno/ir3/ir3_compiler.h
index 86b1161..378f737 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.h
@@ -36,6 +36,7 @@ struct ir3_ra_reg_set;
struct ir3_compiler {
uint32_t gpu_id;
struct ir3_ra_reg_set *set;
+ uint32_t shader_count;
};
struct ir3_compiler * ir3_compiler_create(uint32_t gpu_id);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 8d8d443..22885ff 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1983,7 +1983,7 @@ setup_input(struct ir3_compile *ctx, nir_variable *in)
unsigned semantic_index = in->data.index;
unsigned n = in->data.driver_location;
- DBG("; in: %u:%u, len=%ux%u, loc=%u\n",
+ DBG("; in: %u:%u, len=%ux%u, loc=%u",
semantic_name, semantic_index, array_len,
ncomp, n);
@@ -2078,7 +2078,7 @@ setup_output(struct ir3_compile *ctx, nir_variable *out)
unsigned n = out->data.driver_location;
unsigned comp = 0;
- DBG("; out: %u:%u, len=%ux%u, loc=%u\n",
+ DBG("; out: %u:%u, len=%ux%u, loc=%u",
semantic_name, semantic_index, array_len,
ncomp, n);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
index bfcc2ca..210dc29 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@ -147,6 +147,25 @@ assemble_variant(struct ir3_shader_variant *v)
ir3_shader_disasm(v, bin);
}
+ if (fd_mesa_debug & FD_DBG_SHADERDB) {
+ /* print generic shader info: */
+ fprintf(stderr, "SHADER-DB: %s prog %d/%d: %u instructions, %u dwords\n",
+ ir3_shader_stage(v->shader),
+ v->shader->id, v->id,
+ v->info.instrs_count,
+ v->info.sizedwords);
+ fprintf(stderr, "SHADER-DB: %s prog %d/%d: %u half, %u full\n",
+ ir3_shader_stage(v->shader),
+ v->shader->id, v->id,
+ v->info.max_half_reg + 1,
+ v->info.max_reg + 1);
+ fprintf(stderr, "SHADER-DB: %s prog %d/%d: %u const, %u constlen\n",
+ ir3_shader_stage(v->shader),
+ v->shader->id, v->id,
+ v->info.max_const + 1,
+ v->constlen);
+ }
+
free(bin);
/* no need to keep the ir around beyond this point: */
@@ -164,6 +183,7 @@ create_variant(struct ir3_shader *shader, struct ir3_shader_key key)
if (!v)
return NULL;
+ v->id = ++shader->variant_count;
v->shader = shader;
v->key = key;
v->type = shader->type;
@@ -258,9 +278,18 @@ ir3_shader_create(struct pipe_context *pctx, const struct tgsi_token *tokens,
{
struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
shader->compiler = fd_context(pctx)->screen->compiler;
+ shader->id = ++shader->compiler->shader_count;
shader->pctx = pctx;
shader->type = type;
shader->tokens = tgsi_dup_tokens(tokens);
+ if (fd_mesa_debug & FD_DBG_SHADERDB) {
+ /* if shader-db run, create a standard variant immediately
+ * (as otherwise nothing will trigger the shader to be
+ * actually compiled)
+ */
+ static struct ir3_shader_key key = {};
+ ir3_shader_variant(shader, key);
+ }
return shader;
}
@@ -283,7 +312,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
{
struct ir3 *ir = so->ir;
struct ir3_register *reg;
- const char *type = (so->type == SHADER_VERTEX) ? "VERT" : "FRAG";
+ const char *type = ir3_shader_stage(so->shader);
uint8_t regid;
unsigned i;
@@ -348,11 +377,16 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin)
debug_printf("\n");
/* print generic shader info: */
- debug_printf("; %s: %u instructions, %d half, %d full\n", type,
+ debug_printf("; %s prog %d/%d: %u instructions, %d half, %d full\n",
+ type, so->shader->id, so->id,
so->info.instrs_count,
so->info.max_half_reg + 1,
so->info.max_reg + 1);
+ debug_printf("; %d const, %u constlen\n",
+ so->info.max_const + 1,
+ so->constlen);
+
/* print shader type specific info: */
switch (so->type) {
case SHADER_VERTEX:
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
index 3cf3167..79b9f8a 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -100,6 +100,9 @@ ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
struct ir3_shader_variant {
struct fd_bo *bo;
+ /* variant id (for debug) */
+ uint32_t id;
+
struct ir3_shader_key key;
struct ir3_info info;
@@ -192,6 +195,10 @@ struct ir3_shader_variant {
struct ir3_shader {
enum shader_t type;
+ /* shader id (for debug): */
+ uint32_t id;
+ uint32_t variant_count;
+
struct ir3_compiler *compiler;
struct pipe_context *pctx;
@@ -214,6 +221,19 @@ struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
struct ir3_shader_key key);
void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin);
+static inline const char *
+ir3_shader_stage(struct ir3_shader *shader)
+{
+ switch (shader->type) {
+ case SHADER_VERTEX: return "VERT";
+ case SHADER_FRAGMENT: return "FRAG";
+ case SHADER_COMPUTE: return "CL";
+ default:
+ unreachable("invalid type");
+ return NULL;
+ }
+}
+
/*
* Helper/util:
*/