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| author | Kenneth Graunke <kenneth@whitecape.org> | 2013-08-13 11:34:01 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-08-16 15:03:38 -0700 |
| commit | 8fba8d4ee7632ae185f70356093e10a563ea64cd (patch) | |
| tree | bd96dffc9daff543f5a45ebf251eeb4837e46607 /src | |
| parent | 9c48ae751ab28f35eb878551d24c071be0ce11b0 (diff) | |
| download | external_mesa3d-8fba8d4ee7632ae185f70356093e10a563ea64cd.zip external_mesa3d-8fba8d4ee7632ae185f70356093e10a563ea64cd.tar.gz external_mesa3d-8fba8d4ee7632ae185f70356093e10a563ea64cd.tar.bz2 | |
i965: Add Gen6 depth stall flushes before disabling depth in BLORP.
We emit these before configuring depth in the normal path, or actually
using the depth buffer in BLORP - we just failed to emit them when
disabling depth altogether.
On Sandybridge, this also requires the post_sync_nonzero flush.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index a4a9081..129c113 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -914,6 +914,9 @@ static void gen6_blorp_emit_depth_disable(struct brw_context *brw, const brw_blorp_params *params) { + intel_emit_post_sync_nonzero_flush(brw); + intel_emit_depth_stall_flushes(brw); + BEGIN_BATCH(7); OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) | |