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author | Marek Olšák <marek.olsak@amd.com> | 2016-06-06 01:54:20 +0200 |
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committer | Marek Olšák <marek.olsak@amd.com> | 2016-06-08 00:22:45 +0200 |
commit | 9a472a3e0b20923e9a42d362c6fad546c591f3d1 (patch) | |
tree | d1b86c96a57656330d6b59418b1404790830a91c /src | |
parent | ffd54d1936fcd07424265b780e1d049222a01e94 (diff) | |
download | external_mesa3d-9a472a3e0b20923e9a42d362c6fad546c591f3d1.zip external_mesa3d-9a472a3e0b20923e9a42d362c6fad546c591f3d1.tar.gz external_mesa3d-9a472a3e0b20923e9a42d362c6fad546c591f3d1.tar.bz2 |
gallium/radeon: move DCC clearing into a separate function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 3 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 21 |
2 files changed, 19 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index bb090d6..edfae95 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -675,6 +675,9 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe, const struct pipe_surface *templ, unsigned width, unsigned height); unsigned r600_translate_colorswap(enum pipe_format format, bool do_endian_swap); +void vi_dcc_clear_level(struct r600_common_context *rctx, + struct r600_texture *rtex, + unsigned level, unsigned clear_value); void evergreen_do_fast_color_clear(struct r600_common_context *rctx, struct pipe_framebuffer_state *fb, struct r600_atom *fb_state, diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index b0f375e..a1c314e 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -1793,6 +1793,21 @@ static void vi_get_fast_clear_parameters(enum pipe_format surface_format, *reset_value |= 0x40404040U; } +void vi_dcc_clear_level(struct r600_common_context *rctx, + struct r600_texture *rtex, + unsigned level, unsigned clear_value) +{ + struct pipe_resource *dcc_buffer = &rtex->resource.b.b; + uint64_t dcc_offset = rtex->dcc_offset + + rtex->surface.level[level].dcc_offset; + + assert(rtex->dcc_offset && rtex->surface.level[level].dcc_enabled); + + rctx->clear_buffer(&rctx->b, dcc_buffer, dcc_offset, + rtex->surface.level[level].dcc_fast_clear_size, + clear_value, R600_COHERENCY_CB_META); +} + void evergreen_do_fast_color_clear(struct r600_common_context *rctx, struct pipe_framebuffer_state *fb, struct r600_atom *fb_state, @@ -1867,11 +1882,7 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, continue; vi_get_fast_clear_parameters(fb->cbufs[i]->format, color, &reset_value, &clear_words_needed); - - rctx->clear_buffer(&rctx->b, &tex->resource.b.b, - tex->dcc_offset, - tex->surface.level[0].dcc_fast_clear_size, - reset_value, R600_COHERENCY_CB_META); + vi_dcc_clear_level(rctx, tex, 0, reset_value); if (clear_words_needed) tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level; |