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authorMatt Turner <mattst88@gmail.com>2016-02-27 13:44:50 -0800
committerMatt Turner <mattst88@gmail.com>2016-03-01 11:41:29 -0800
commita0c3650ad359df8f770eee042d60359492df3702 (patch)
tree6dd39ef3fc71bcce75e9e7a37b039fa721b22381 /src
parent6b1fb4862e0b1b338eb78e91aa862df889d4529a (diff)
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program: Remove RelAddr2 support.
Looks like more never-used crap from the first geometry shader attempt. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Acked-by: Brian Paul <brianp@vmware.com>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/program/ir_to_mesa.cpp3
-rw-r--r--src/mesa/program/prog_instruction.h16
-rw-r--r--src/mesa/program/prog_optimize.c2
-rw-r--r--src/mesa/program/prog_print.c14
-rw-r--r--src/mesa/state_tracker/st_mesa_to_tgsi.c9
5 files changed, 3 insertions, 41 deletions
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 6d33b1b..6051df1 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2187,9 +2187,6 @@ mesa_src_reg_from_ir_src_reg(src_reg reg)
mesa_reg.RelAddr = reg.reladdr != NULL;
mesa_reg.Negate = reg.negate;
mesa_reg.Abs = 0;
- mesa_reg.HasIndex2 = GL_FALSE;
- mesa_reg.RelAddr2 = 0;
- mesa_reg.Index2 = 0;
return mesa_reg;
}
diff --git a/src/mesa/program/prog_instruction.h b/src/mesa/program/prog_instruction.h
index d56f96c..d839268 100644
--- a/src/mesa/program/prog_instruction.h
+++ b/src/mesa/program/prog_instruction.h
@@ -235,22 +235,6 @@ struct prog_src_register
* instruction which allows per-component negation.
*/
GLuint Negate:4;
-
- /**
- * Is the register two-dimensional.
- * Two dimensional registers are of the
- * REGISTER[index][index2] format.
- * They are used by the geometry shaders where
- * the first index is the index within an array
- * and the second index is the semantic of the
- * array, e.g. gl_PositionIn[index] would become
- * INPUT[index][gl_PositionIn]
- */
- GLuint HasIndex2:1;
- GLuint RelAddr2:1;
- GLint Index2:(INST_INDEX_BITS+1); /**< Extra bit here for sign bit.
- * May be negative for relative
- * addressing. */
};
diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index f9e9035..9f7d0e3 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -465,8 +465,6 @@ can_downward_mov_be_modifed(const struct prog_instruction *mov)
mov->SrcReg[0].RelAddr == 0 &&
mov->SrcReg[0].Negate == 0 &&
mov->SrcReg[0].Abs == 0 &&
- mov->SrcReg[0].HasIndex2 == 0 &&
- mov->SrcReg[0].RelAddr2 == 0 &&
mov->DstReg.RelAddr == 0 &&
mov->DstReg.CondMask == COND_TR;
}
diff --git a/src/mesa/program/prog_print.c b/src/mesa/program/prog_print.c
index bb7c2c6..2bc07cb 100644
--- a/src/mesa/program/prog_print.c
+++ b/src/mesa/program/prog_print.c
@@ -354,8 +354,7 @@ arb_output_attrib_string(GLuint index, GLenum progType)
*/
static const char *
reg_string(gl_register_file f, GLint index, gl_prog_print_mode mode,
- GLboolean relAddr, const struct gl_program *prog,
- GLboolean hasIndex2, GLboolean relAddr2, GLint index2)
+ GLboolean relAddr, const struct gl_program *prog)
{
static char str[100];
const char *addr = relAddr ? "ADDR+" : "";
@@ -366,11 +365,6 @@ reg_string(gl_register_file f, GLint index, gl_prog_print_mode mode,
case PROG_PRINT_DEBUG:
sprintf(str, "%s[%s%d]",
_mesa_register_file_name(f), addr, index);
- if (hasIndex2) {
- int offset = strlen(str);
- const char *addr2 = relAddr2 ? "ADDR+" : "";
- sprintf(str+offset, "[%s%d]", addr2, index2);
- }
break;
case PROG_PRINT_ARB:
@@ -534,8 +528,7 @@ fprint_dst_reg(FILE * f,
{
fprintf(f, "%s%s",
reg_string((gl_register_file) dstReg->File,
- dstReg->Index, mode, dstReg->RelAddr, prog,
- GL_FALSE, GL_FALSE, 0),
+ dstReg->Index, mode, dstReg->RelAddr, prog),
_mesa_writemask_string(dstReg->WriteMask));
if (dstReg->CondMask != COND_TR) {
@@ -565,8 +558,7 @@ fprint_src_reg(FILE *f,
fprintf(f, "%s%s%s%s",
abs,
reg_string((gl_register_file) srcReg->File,
- srcReg->Index, mode, srcReg->RelAddr, prog,
- srcReg->HasIndex2, srcReg->RelAddr2, srcReg->Index2),
+ srcReg->Index, mode, srcReg->RelAddr, prog),
_mesa_swizzle_string(srcReg->Swizzle,
srcReg->Negate, GL_FALSE),
abs);
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index be47823..62f0aee7 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -311,15 +311,6 @@ translate_src( struct st_translate *t,
{
struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
- if (t->procType == TGSI_PROCESSOR_GEOMETRY && SrcReg->HasIndex2) {
- src = src_register( t, SrcReg->File, SrcReg->Index2 );
- if (SrcReg->RelAddr2)
- src = ureg_src_dimension_indirect( src, ureg_src(t->address[0]),
- SrcReg->Index);
- else
- src = ureg_src_dimension( src, SrcReg->Index);
- }
-
src = ureg_swizzle( src,
GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,