summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorIlia Mirkin <imirkin@alum.mit.edu>2014-07-05 19:30:50 -0400
committerIlia Mirkin <imirkin@alum.mit.edu>2014-07-09 21:10:24 -0400
commita432079400f63c44fadb11b93c3ff8fb916159cf (patch)
treea863aab26552eb06127da060ec99ccc586f73668 /src
parent7f937875c0289c2ffc2dc8306add72d5de7951ef (diff)
downloadexternal_mesa3d-a432079400f63c44fadb11b93c3ff8fb916159cf.zip
external_mesa3d-a432079400f63c44fadb11b93c3ff8fb916159cf.tar.gz
external_mesa3d-a432079400f63c44fadb11b93c3ff8fb916159cf.tar.bz2
nvc0/ir: fix encoding of offset register into interpolation instruction
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index 84c2c6b..dfb093c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -1561,7 +1561,7 @@ CodeEmitterNVC0::emitINTERP(const Instruction *i)
defId(i->def(0), 14);
if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
- srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 17);
+ srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 17);
else
code[1] |= 0x3f << 17;
}