radeonsi: Rename the commonly occurring rscreen variable.

The "r" stands for R600.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

3 files changed, 86 insertions, 86 deletions

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 57aa4a7..517becb 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -210,13 +210,13 @@ void si_context_flush(struct si_context *ctx, unsigned flags)
 
 #if SI_TRACE_CS
 	if (ctx->screen->trace_bo) {
-		struct si_screen *rscreen = ctx->screen;
+		struct si_screen *sscreen = ctx->screen;
 		unsigned i;
 
 		for (i = 0; i < cs->cdw; i++) {
-			fprintf(stderr, "[%4d] [%5d] 0x%08x\n", rscreen->cs_count, i, cs->buf[i]);
+			fprintf(stderr, "[%4d] [%5d] 0x%08x\n", sscreen->cs_count, i, cs->buf[i]);
 		}
-		rscreen->cs_count++;
+		sscreen->cs_count++;
 	}
 #endif
 
@@ -225,20 +225,20 @@ void si_context_flush(struct si_context *ctx, unsigned flags)
 
 #if SI_TRACE_CS
 	if (ctx->screen->trace_bo) {
-		struct si_screen *rscreen = ctx->screen;
+		struct si_screen *sscreen = ctx->screen;
 		unsigned i;
 
 		for (i = 0; i < 10; i++) {
 			usleep(5);
-			if (!ctx->ws->buffer_is_busy(rscreen->trace_bo->buf, RADEON_USAGE_READWRITE)) {
+			if (!ctx->ws->buffer_is_busy(sscreen->trace_bo->buf, RADEON_USAGE_READWRITE)) {
 				break;
 			}
 		}
 		if (i == 10) {
 			fprintf(stderr, "timeout on cs lockup likely happen at cs %d dw %d\n",
-				rscreen->trace_ptr[1], rscreen->trace_ptr[0]);
+				sscreen->trace_ptr[1], sscreen->trace_ptr[0]);
 		} else {
-			fprintf(stderr, "cs %d executed in %dms\n", rscreen->trace_ptr[1], i * 5);
+			fprintf(stderr, "cs %d executed in %dms\n", sscreen->trace_ptr[1], i * 5);
 		}
 	}
 #endif
@@ -698,12 +698,12 @@ void si_context_queries_resume(struct si_context *ctx)
 #if SI_TRACE_CS
 void si_trace_emit(struct si_context *sctx)
 {
-	struct si_screen *rscreen = sctx->screen;
+	struct si_screen *sscreen = sctx->screen;
 	struct radeon_winsys_cs *cs = sctx->cs;
 	uint64_t va;
 
-	va = r600_resource_va(&rscreen->screen, (void*)rscreen->trace_bo);
-	r600_context_bo_reloc(sctx, rscreen->trace_bo, RADEON_USAGE_READWRITE);
+	va = r600_resource_va(&sscreen->screen, (void*)sscreen->trace_bo);
+	r600_context_bo_reloc(sctx, sscreen->trace_bo, RADEON_USAGE_READWRITE);
 	cs->buf[cs->cdw++] = PKT3(PKT3_WRITE_DATA, 4, 0);
 	cs->buf[cs->cdw++] = PKT3_WRITE_DATA_DST_SEL(PKT3_WRITE_DATA_DST_SEL_MEM_SYNC) |
 				PKT3_WRITE_DATA_WR_CONFIRM |
@@ -711,6 +711,6 @@ void si_trace_emit(struct si_context *sctx)
 	cs->buf[cs->cdw++] = va & 0xFFFFFFFFUL;
 	cs->buf[cs->cdw++] = (va >> 32UL) & 0xFFFFFFFFUL;
 	cs->buf[cs->cdw++] = cs->cdw;
-	cs->buf[cs->cdw++] = rscreen->cs_count;
+	cs->buf[cs->cdw++] = sscreen->cs_count;
 }
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 69069b8..6b74b18 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -126,13 +126,13 @@ static void si_destroy_context(struct pipe_context *context)
 static struct pipe_context *si_create_context(struct pipe_screen *screen, void *priv)
 {
 	struct si_context *sctx = CALLOC_STRUCT(si_context);
-	struct si_screen* rscreen = (struct si_screen *)screen;
+	struct si_screen* sscreen = (struct si_screen *)screen;
 	int shader, i;
 
 	if (sctx == NULL)
 		return NULL;
 
-	if (!r600_common_context_init(&sctx->b, &rscreen->b))
+	if (!r600_common_context_init(&sctx->b, &sscreen->b))
 		goto fail;
 
 	sctx->b.b.screen = screen;
@@ -141,14 +141,14 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
 	sctx->b.b.flush = si_flush_from_st;
 
 	/* Easy accessing of screen/winsys. */
-	sctx->screen = rscreen;
+	sctx->screen = sscreen;
 
 	si_init_blit_functions(sctx);
 	si_init_query_functions(sctx);
 	si_init_context_resource_functions(sctx);
 	si_init_compute_functions(sctx);
 
-	if (rscreen->b.info.has_uvd) {
+	if (sscreen->b.info.has_uvd) {
 		sctx->b.b.create_video_codec = si_uvd_create_decoder;
 		sctx->b.b.create_video_buffer = si_video_buffer_create;
 	} else {
@@ -267,14 +267,14 @@ static const char *si_get_family_name(enum radeon_family family)
 
 static const char* si_get_name(struct pipe_screen* pscreen)
 {
-	struct si_screen *rscreen = (struct si_screen *)pscreen;
+	struct si_screen *sscreen = (struct si_screen *)pscreen;
 
-	return si_get_family_name(rscreen->b.family);
+	return si_get_family_name(sscreen->b.family);
 }
 
 static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 {
-	struct si_screen *rscreen = (struct si_screen *)pscreen;
+	struct si_screen *sscreen = (struct si_screen *)pscreen;
 
 	switch (param) {
 	/* Supported features (boolean caps). */
@@ -319,8 +319,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
 	case PIPE_CAP_TEXTURE_MULTISAMPLE:
 		/* 2D tiling on CIK is supported since DRM 2.35.0 */
-		return HAVE_LLVM >= 0x0304 && (rscreen->b.chip_class < CIK ||
-					       rscreen->b.info.drm_minor >= 35);
+		return HAVE_LLVM >= 0x0304 && (sscreen->b.chip_class < CIK ||
+					       sscreen->b.info.drm_minor >= 35);
 
 	case PIPE_CAP_TGSI_TEXCOORD:
 		return 0;
@@ -337,7 +337,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 	case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 		return 1;
 	case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
-		return MIN2(rscreen->b.info.vram_size, 0xFFFFFFFF);
+		return MIN2(sscreen->b.info.vram_size, 0xFFFFFFFF);
 
 	/* Unsupported features. */
 	case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
@@ -357,12 +357,12 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
 	/* Stream output. */
 	case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
-		return rscreen->b.has_streamout ? 4 : 0;
+		return sscreen->b.has_streamout ? 4 : 0;
 	case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
-		return rscreen->b.has_streamout ? 1 : 0;
+		return sscreen->b.has_streamout ? 1 : 0;
 	case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 	case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
-		return rscreen->b.has_streamout ? 32*4 : 0;
+		return sscreen->b.has_streamout ? 32*4 : 0;
 
 	/* Texturing. */
 	case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
@@ -384,7 +384,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 	/* Timer queries, present when the clock frequency is non zero. */
 	case PIPE_CAP_QUERY_TIMESTAMP:
 	case PIPE_CAP_QUERY_TIME_ELAPSED:
-		return rscreen->b.info.r600_clock_crystal_freq != 0;
+		return sscreen->b.info.r600_clock_crystal_freq != 0;
 
 	case PIPE_CAP_MIN_TEXEL_OFFSET:
 		return -8;
@@ -510,11 +510,11 @@ static int si_get_compute_param(struct pipe_screen *screen,
         enum pipe_compute_cap param,
         void *ret)
 {
-	struct si_screen *rscreen = (struct si_screen *)screen;
+	struct si_screen *sscreen = (struct si_screen *)screen;
 	//TODO: select these params by asic
 	switch (param) {
 	case PIPE_COMPUTE_CAP_IR_TARGET: {
-		const char *gpu = si_get_llvm_processor_name(rscreen->b.family);
+		const char *gpu = si_get_llvm_processor_name(sscreen->b.family);
 	        if (ret) {
 			sprintf(ret, "%s-r600--", gpu);
 		}
@@ -587,91 +587,91 @@ static int si_get_compute_param(struct pipe_screen *screen,
 
 static void si_destroy_screen(struct pipe_screen* pscreen)
 {
-	struct si_screen *rscreen = (struct si_screen *)pscreen;
+	struct si_screen *sscreen = (struct si_screen *)pscreen;
 
-	if (rscreen == NULL)
+	if (sscreen == NULL)
 		return;
 
-	if (!radeon_winsys_unref(rscreen->b.ws))
+	if (!radeon_winsys_unref(sscreen->b.ws))
 		return;
 
-	r600_common_screen_cleanup(&rscreen->b);
+	r600_common_screen_cleanup(&sscreen->b);
 
 #if SI_TRACE_CS
-	if (rscreen->trace_bo) {
-		rscreen->ws->buffer_unmap(rscreen->trace_bo->cs_buf);
-		pipe_resource_reference((struct pipe_resource**)&rscreen->trace_bo, NULL);
+	if (sscreen->trace_bo) {
+		sscreen->ws->buffer_unmap(sscreen->trace_bo->cs_buf);
+		pipe_resource_reference((struct pipe_resource**)&sscreen->trace_bo, NULL);
 	}
 #endif
 
-	rscreen->b.ws->destroy(rscreen->b.ws);
-	FREE(rscreen);
+	sscreen->b.ws->destroy(sscreen->b.ws);
+	FREE(sscreen);
 }
 
 static uint64_t si_get_timestamp(struct pipe_screen *screen)
 {
-	struct si_screen *rscreen = (struct si_screen*)screen;
+	struct si_screen *sscreen = (struct si_screen*)screen;
 
-	return 1000000 * rscreen->b.ws->query_value(rscreen->b.ws, RADEON_TIMESTAMP) /
-		rscreen->b.info.r600_clock_crystal_freq;
+	return 1000000 * sscreen->b.ws->query_value(sscreen->b.ws, RADEON_TIMESTAMP) /
+		sscreen->b.info.r600_clock_crystal_freq;
 }
 
 struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
 {
-	struct si_screen *rscreen = CALLOC_STRUCT(si_screen);
-	if (rscreen == NULL) {
+	struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
+	if (sscreen == NULL) {
 		return NULL;
 	}
 
-	ws->query_info(ws, &rscreen->b.info);
+	ws->query_info(ws, &sscreen->b.info);
 
 	/* Set functions first. */
-	rscreen->b.b.context_create = si_create_context;
-	rscreen->b.b.destroy = si_destroy_screen;
-	rscreen->b.b.get_name = si_get_name;
-	rscreen->b.b.get_vendor = si_get_vendor;
-	rscreen->b.b.get_param = si_get_param;
-	rscreen->b.b.get_shader_param = si_get_shader_param;
-	rscreen->b.b.get_paramf = si_get_paramf;
-	rscreen->b.b.get_compute_param = si_get_compute_param;
-	rscreen->b.b.get_timestamp = si_get_timestamp;
-	rscreen->b.b.is_format_supported = si_is_format_supported;
-	if (rscreen->b.info.has_uvd) {
-		rscreen->b.b.get_video_param = ruvd_get_video_param;
-		rscreen->b.b.is_video_format_supported = ruvd_is_format_supported;
+	sscreen->b.b.context_create = si_create_context;
+	sscreen->b.b.destroy = si_destroy_screen;
+	sscreen->b.b.get_name = si_get_name;
+	sscreen->b.b.get_vendor = si_get_vendor;
+	sscreen->b.b.get_param = si_get_param;
+	sscreen->b.b.get_shader_param = si_get_shader_param;
+	sscreen->b.b.get_paramf = si_get_paramf;
+	sscreen->b.b.get_compute_param = si_get_compute_param;
+	sscreen->b.b.get_timestamp = si_get_timestamp;
+	sscreen->b.b.is_format_supported = si_is_format_supported;
+	if (sscreen->b.info.has_uvd) {
+		sscreen->b.b.get_video_param = ruvd_get_video_param;
+		sscreen->b.b.is_video_format_supported = ruvd_is_format_supported;
 	} else {
-		rscreen->b.b.get_video_param = si_get_video_param;
-		rscreen->b.b.is_video_format_supported = vl_video_buffer_is_format_supported;
+		sscreen->b.b.get_video_param = si_get_video_param;
+		sscreen->b.b.is_video_format_supported = vl_video_buffer_is_format_supported;
 	}
-	si_init_screen_resource_functions(&rscreen->b.b);
+	si_init_screen_resource_functions(&sscreen->b.b);
 
-	if (!r600_common_screen_init(&rscreen->b, ws)) {
-		FREE(rscreen);
+	if (!r600_common_screen_init(&sscreen->b, ws)) {
+		FREE(sscreen);
 		return NULL;
 	}
 
-	rscreen->b.has_cp_dma = true;
-	rscreen->b.has_streamout = HAVE_LLVM >= 0x0304;
+	sscreen->b.has_cp_dma = true;
+	sscreen->b.has_streamout = HAVE_LLVM >= 0x0304;
 
 	if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
-		rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
+		sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
 
 #if SI_TRACE_CS
-	rscreen->cs_count = 0;
-	if (rscreen->info.drm_minor >= 28) {
-		rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->screen,
+	sscreen->cs_count = 0;
+	if (sscreen->info.drm_minor >= 28) {
+		sscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&sscreen->screen,
 										PIPE_BIND_CUSTOM,
 										PIPE_USAGE_STAGING,
 										4096);
-		if (rscreen->trace_bo) {
-			rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->cs_buf, NULL,
+		if (sscreen->trace_bo) {
+			sscreen->trace_ptr = sscreen->ws->buffer_map(sscreen->trace_bo->cs_buf, NULL,
 									PIPE_TRANSFER_UNSYNCHRONIZED);
 		}
 	}
 #endif
 
 	/* Create the auxiliary context. This must be done last. */
-	rscreen->b.aux_context = rscreen->b.b.context_create(&rscreen->b.b, NULL);
+	sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL);
 
-	return &rscreen->b.b;
+	return &sscreen->b.b;
 }
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 5255571..b1cd4be 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -40,9 +40,9 @@
 #include "../radeon/r600_cs.h"
 #include "sid.h"
 
-static uint32_t cik_num_banks(struct si_screen *rscreen, unsigned bpe, unsigned tile_split)
+static uint32_t cik_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned tile_split)
 {
-	if (rscreen->b.info.cik_macrotile_mode_array_valid) {
+	if (sscreen->b.info.cik_macrotile_mode_array_valid) {
 		unsigned index, tileb;
 
 		tileb = 8 * 8 * bpe;
@@ -54,11 +54,11 @@ static uint32_t cik_num_banks(struct si_screen *rscreen, unsigned bpe, unsigned
 
 		assert(index < 16);
 
-		return (rscreen->b.info.cik_macrotile_mode_array[index] >> 6) & 0x3;
+		return (sscreen->b.info.cik_macrotile_mode_array[index] >> 6) & 0x3;
 	}
 
 	/* The old way. */
-	switch (rscreen->b.tiling_info.num_banks) {
+	switch (sscreen->b.tiling_info.num_banks) {
 	case 2:
 		return V_02803C_ADDR_SURF_2_BANK;
 	case 4:
@@ -140,24 +140,24 @@ static unsigned cik_bank_wh(unsigned bankwh)
 	return bankwh;
 }
 
-static unsigned cik_db_pipe_config(struct si_screen *rscreen, unsigned tile_mode)
+static unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode)
 {
-	if (rscreen->b.info.si_tile_mode_array_valid) {
-		uint32_t gb_tile_mode = rscreen->b.info.si_tile_mode_array[tile_mode];
+	if (sscreen->b.info.si_tile_mode_array_valid) {
+		uint32_t gb_tile_mode = sscreen->b.info.si_tile_mode_array[tile_mode];
 
 		return G_009910_PIPE_CONFIG(gb_tile_mode);
 	}
 
 	/* This is probably broken for a lot of chips, but it's only used
 	 * if the kernel cannot return the tile mode array for CIK. */
-	switch (rscreen->b.info.r600_num_tile_pipes) {
+	switch (sscreen->b.info.r600_num_tile_pipes) {
 	case 16:
 		return V_02803C_X_ADDR_SURF_P16_32X32_16X16;
 	case 8:
 		return V_02803C_X_ADDR_SURF_P8_32X32_16X16;
 	case 4:
 	default:
-		if (rscreen->b.info.r600_num_backends == 4)
+		if (sscreen->b.info.r600_num_backends == 4)
 			return V_02803C_X_ADDR_SURF_P4_16X16;
 		else
 			return V_02803C_X_ADDR_SURF_P4_8X16;
@@ -1062,8 +1062,8 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
 				       const struct util_format_description *desc,
 				       int first_non_void)
 {
-	struct si_screen *rscreen = (struct si_screen*)screen;
-	bool enable_s3tc = rscreen->b.info.drm_minor >= 31;
+	struct si_screen *sscreen = (struct si_screen*)screen;
+	bool enable_s3tc = sscreen->b.info.drm_minor >= 31;
 	boolean uniform = TRUE;
 	int i;
 
@@ -1476,7 +1476,7 @@ boolean si_is_format_supported(struct pipe_screen *screen,
                                unsigned sample_count,
                                unsigned usage)
 {
-	struct si_screen *rscreen = (struct si_screen *)screen;
+	struct si_screen *sscreen = (struct si_screen *)screen;
 	unsigned retval = 0;
 
 	if (target >= PIPE_MAX_TEXTURE_TYPES) {
@@ -1492,7 +1492,7 @@ boolean si_is_format_supported(struct pipe_screen *screen,
 			return FALSE;
 
 		/* 2D tiling on CIK is supported since DRM 2.35.0 */
-		if (rscreen->b.chip_class >= CIK && rscreen->b.info.drm_minor < 35)
+		if (sscreen->b.chip_class >= CIK && sscreen->b.info.drm_minor < 35)
 			return FALSE;
 
 		switch (sample_count) {
@@ -1742,7 +1742,7 @@ static void si_cb(struct si_context *sctx, struct si_pm4_state *pm4,
 static void si_db(struct si_context *sctx, struct si_pm4_state *pm4,
 		  const struct pipe_framebuffer_state *state)
 {
-	struct si_screen *rscreen = sctx->screen;
+	struct si_screen *sscreen = sctx->screen;
 	struct r600_texture *rtex;
 	struct si_surface *surf;
 	unsigned level, pitch, slice, format, tile_mode_index, array_mode;
@@ -1815,9 +1815,9 @@ static void si_db(struct si_context *sctx, struct si_pm4_state *pm4,
 		macro_aspect = cik_macro_tile_aspect(macro_aspect);
 		bankw = cik_bank_wh(bankw);
 		bankh = cik_bank_wh(bankh);
-		nbanks = cik_num_banks(rscreen, rtex->surface.bpe, rtex->surface.tile_split);
+		nbanks = cik_num_banks(sscreen, rtex->surface.bpe, rtex->surface.tile_split);
 		tile_mode_index = si_tile_mode_index(rtex, level, false);
-		pipe_config = cik_db_pipe_config(rscreen, tile_mode_index);
+		pipe_config = cik_db_pipe_config(sscreen, tile_mode_index);
 
 		db_depth_info |= S_02803C_ARRAY_MODE(array_mode) |
 			S_02803C_PIPE_CONFIG(pipe_config) |