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| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-11-03 11:00:36 +0100 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2016-11-09 14:02:14 +0000 |
| commit | b8f99c6b2f9065167cd1db7090a9d5ec7ec5f67b (patch) | |
| tree | 1067eb36d1c1f3105df120f2b341e645feff7b6b /src | |
| parent | 2789bfdbb59c4528a248dd8c02124dd384caefe6 (diff) | |
| download | external_mesa3d-b8f99c6b2f9065167cd1db7090a9d5ec7ec5f67b.zip external_mesa3d-b8f99c6b2f9065167cd1db7090a9d5ec7ec5f67b.tar.gz external_mesa3d-b8f99c6b2f9065167cd1db7090a9d5ec7ec5f67b.tar.bz2 | |
st/glsl_to_tgsi: fix dvec[34] loads from SSBO
When splitting up loads, we have to add 16 bytes to the offset for
the high components, just like already happens for stores.
Fixes arb_gpu_shader_fp64@shader_storage@layout-std140-fp64-shader.
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e4b378800eff13752dcfe1f5c6b640444208d543)
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index f376462..c4c08db 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -772,9 +772,9 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op, int i = u_bit_scan(&writemask); - /* before emitting the instruction, see if we have to adjust store + /* before emitting the instruction, see if we have to adjust load / store * address */ - if (i > 1 && inst->op == TGSI_OPCODE_STORE && + if (i > 1 && (inst->op == TGSI_OPCODE_LOAD || inst->op == TGSI_OPCODE_STORE) && addr.file == PROGRAM_UNDEFINED) { /* We have to advance the buffer address by 16 */ addr = get_temp(glsl_type::uint_type); @@ -782,7 +782,6 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op, inst->src[0], st_src_reg_for_int(16)); } - /* first time use previous instruction */ if (dinst == NULL) { dinst = inst; @@ -802,11 +801,10 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op, dinst->dst[j].writemask = (i & 1) ? WRITEMASK_ZW : WRITEMASK_XY; dinst->dst[j].index = initial_dst_idx[j]; if (i > 1) { - if (dinst->op == TGSI_OPCODE_STORE) { + if (dinst->op == TGSI_OPCODE_LOAD || dinst->op == TGSI_OPCODE_STORE) dinst->src[0] = addr; - } else { + if (dinst->op != TGSI_OPCODE_STORE) dinst->dst[j].index++; - } } } else { /* if we aren't writing to a double, just get the bit of the initial writemask |