summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorJason Ekstrand <jason.ekstrand@intel.com>2016-11-02 10:42:45 -0700
committerEmil Velikov <emil.l.velikov@gmail.com>2016-11-09 23:32:31 +0000
commitd22958eecb09e1abce115b959314640c23c39df0 (patch)
tree57b34fa59426ab7e81d23992a0d8d6bcf64afc22 /src
parentab3aeab2972cb4f36ec99e42ca7dec80f0d27043 (diff)
downloadexternal_mesa3d-d22958eecb09e1abce115b959314640c23c39df0.zip
external_mesa3d-d22958eecb09e1abce115b959314640c23c39df0.tar.gz
external_mesa3d-d22958eecb09e1abce115b959314640c23c39df0.tar.bz2
anv/batch_chain: Improve write_reloc
The old version wasn't properly handling large addresses where we have to sign-extend to get it into the "canonical form" expected by the hardware. Also, the new version is capable of doing a clflush of the newly written reloc if requested. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 095c48a496fccdd95821ee426d70674bc75dc6af)
Diffstat (limited to 'src')
-rw-r--r--src/intel/vulkan/anv_batch_chain.c27
1 files changed, 22 insertions, 5 deletions
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 2c0f803..681bbb6 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -945,12 +945,29 @@ anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer,
}
static void
-write_reloc(const struct anv_device *device, void *p, uint64_t v)
+write_reloc(const struct anv_device *device, void *p, uint64_t v, bool flush)
{
- if (device->info.gen >= 8)
- *(uint64_t *)p = v;
- else
+ unsigned reloc_size = 0;
+ if (device->info.gen >= 8) {
+ /* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
+ *
+ * "This field specifies the address of the memory location where the
+ * register value specified in the DWord above will read from. The
+ * address specifies the DWord location of the data. Range =
+ * GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
+ * [63:48] are ignored by the HW and assumed to be in correct
+ * canonical form [63:48] == [47]."
+ */
+ const int shift = 63 - 47;
+ reloc_size = sizeof(uint64_t);
+ *(uint64_t *)p = (((int64_t)v) << shift) >> shift;
+ } else {
+ reloc_size = sizeof(uint32_t);
*(uint32_t *)p = v;
+ }
+
+ if (flush && !device->info.has_llc)
+ anv_clflush_range(p, reloc_size);
}
static void
@@ -999,7 +1016,7 @@ adjust_relocations_to_state_pool(struct anv_block_pool *pool,
assert(relocs->relocs[i].offset < from_bo->size);
write_reloc(pool->device, from_bo->map + relocs->relocs[i].offset,
relocs->relocs[i].presumed_offset +
- relocs->relocs[i].delta);
+ relocs->relocs[i].delta, false);
}
}