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| author | Kenneth Graunke <kenneth@whitecape.org> | 2013-08-21 16:27:11 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-08-26 11:21:10 -0700 |
| commit | d65e3c082a02bd2e838d34b2ee9b87d36f6a2d25 (patch) | |
| tree | b8eb5bb53a120c4ec9f8f398997f248fa57402e8 /src | |
| parent | a149f744d9dfc116860c04ce30256f7bed96e323 (diff) | |
| download | external_mesa3d-d65e3c082a02bd2e838d34b2ee9b87d36f6a2d25.zip external_mesa3d-d65e3c082a02bd2e838d34b2ee9b87d36f6a2d25.tar.gz external_mesa3d-d65e3c082a02bd2e838d34b2ee9b87d36f6a2d25.tar.bz2 | |
i965/vs: Allocate register set once at context creation.
Now that we use a fixed set of register classes, we can set up the
register set and conflict graphs once, at context creation, rather than
on every VS compile. This is obviously less expensive, and also what
we already do in the FS backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 6 |
3 files changed, 6 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 6308446..2321076 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -476,6 +476,7 @@ brwCreateContext(int api, } brw_fs_alloc_reg_sets(brw); + brw_vec4_alloc_reg_set(brw); if (INTEL_DEBUG & DEBUG_SHADER_TIME) brw_init_shader_time(brw); diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 98a59fd..c456e61 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1413,6 +1413,9 @@ void brw_upload_cs_urb_state(struct brw_context *brw); */ void brw_fs_alloc_reg_sets(struct brw_context *brw); +/* brw_vec4_reg_allocate.cpp */ +void brw_vec4_alloc_reg_set(struct brw_context *brw); + /* brw_disasm.c */ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index fbd79d0..7984203 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -96,8 +96,8 @@ vec4_visitor::reg_allocate_trivial() return true; } -static void -brw_alloc_reg_set(struct brw_context *brw) +extern "C" void +brw_vec4_alloc_reg_set(struct brw_context *brw) { int base_reg_count = brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF; @@ -188,8 +188,6 @@ vec4_visitor::reg_allocate() calculate_live_intervals(); - brw_alloc_reg_set(brw); - int node_count = virtual_grf_count; int first_payload_node = node_count; node_count += payload_reg_count; |