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author | Marek Olšák <marek.olsak@amd.com> | 2015-10-22 23:36:11 +0200 |
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committer | Marek Olšák <marek.olsak@amd.com> | 2015-10-24 00:01:20 +0200 |
commit | edf6a4537c5febbe38780819df30cbfffc74c329 (patch) | |
tree | 96fadad298349eefebb6719f7c163e17a3986669 /src | |
parent | e1c098f2381de53bd0a3260d330b057c8bfb3156 (diff) | |
download | external_mesa3d-edf6a4537c5febbe38780819df30cbfffc74c329.zip external_mesa3d-edf6a4537c5febbe38780819df30cbfffc74c329.tar.gz external_mesa3d-edf6a4537c5febbe38780819df30cbfffc74c329.tar.bz2 |
radeonsi: only apply the SNORM blit workaround to *8_SNORM
Like the comment says. This fixes DCC, which doesn't like blitting RG16
as RGBA8.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index 082ea85..aa526ee 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -536,7 +536,7 @@ void si_resource_copy_region(struct pipe_context *ctx, src_force_level = src_level; } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) || /* also *8_SNORM has precision issues, use UNORM instead */ - util_format_is_snorm(src->format)) { + util_format_is_snorm8(src->format)) { if (util_format_is_subsampled_422(src->format)) { src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT; dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT; |