diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-02-18 17:45:51 -0800 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-02-19 15:15:45 -0800 |
| commit | eeacbc1a02ba2d8b9049d1108abcbd2b3dfe2712 (patch) | |
| tree | dd143e45767ffc5627bbbffb85b8e8743316cf22 /src | |
| parent | 2bd139e18c941e7ea0870ba43314a5c10fd5bb12 (diff) | |
| download | external_mesa3d-eeacbc1a02ba2d8b9049d1108abcbd2b3dfe2712.zip external_mesa3d-eeacbc1a02ba2d8b9049d1108abcbd2b3dfe2712.tar.gz external_mesa3d-eeacbc1a02ba2d8b9049d1108abcbd2b3dfe2712.tar.bz2 | |
i965: Make scheduler cycle estimates use the proper stage name.
Previously, the vec4 backend labeled shaders as "vec4" - now it uses the
specific names "VS" and "GS".
The FS backend now correctly prints "VS" for vertex shaders (rather than
"fs"). It also prints "FS" instead of "fs" for fragment shaders;
preserving that behavior didn't seem essential.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 24075bd..56f69ea 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -1517,9 +1517,9 @@ fs_visitor::schedule_instructions(instruction_scheduler_mode mode) fs_instruction_scheduler sched(this, grf_count, mode); sched.run(cfg); - if (unlikely(INTEL_DEBUG & DEBUG_WM) && mode == SCHEDULE_POST) { - fprintf(stderr, "fs%d estimated execution time: %d cycles\n", - dispatch_width, sched.time); + if (unlikely(debug_enabled) && mode == SCHEDULE_POST) { + fprintf(stderr, "%s%d estimated execution time: %d cycles\n", + stage_abbrev, dispatch_width, sched.time); } invalidate_live_intervals(); @@ -1531,8 +1531,9 @@ vec4_visitor::opt_schedule_instructions() vec4_instruction_scheduler sched(this, prog_data->total_grf); sched.run(cfg); - if (unlikely(debug_flag)) { - fprintf(stderr, "vec4 estimated execution time: %d cycles\n", sched.time); + if (unlikely(debug_enabled)) { + fprintf(stderr, "%s estimated execution time: %d cycles\n", + stage_abbrev, sched.time); } invalidate_live_intervals(); |