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-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_strings.c3
-rw-r--r--src/gallium/docs/source/tgsi.rst6
-rw-r--r--src/gallium/include/pipe/p_shader_tokens.h5
-rw-r--r--src/mesa/state_tracker/st_glsl_to_tgsi.cpp18
4 files changed, 31 insertions, 1 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c b/src/gallium/auxiliary/tgsi/tgsi_strings.c
index ae779a8..d613f5e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_strings.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_strings.c
@@ -146,6 +146,9 @@ const char *tgsi_property_names[TGSI_PROPERTY_COUNT] =
"NUM_CULLDIST_ENABLED",
"FS_EARLY_DEPTH_STENCIL",
"NEXT_SHADER",
+ "CS_FIXED_BLOCK_WIDTH",
+ "CS_FIXED_BLOCK_HEIGHT",
+ "CS_FIXED_BLOCK_DEPTH"
};
const char *tgsi_return_type_names[TGSI_RETURN_TYPE_COUNT] =
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index 3ac6ba3..ac6052a 100644
--- a/src/gallium/docs/source/tgsi.rst
+++ b/src/gallium/docs/source/tgsi.rst
@@ -3220,6 +3220,12 @@ Which shader stage will MOST LIKELY follow after this shader when the shader
is bound. This is only a hint to the driver and doesn't have to be precise.
Only set for VS and TES.
+TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH / HEIGHT / DEPTH
+"""""""""""""""""""""""""""""""""""""""""""""""""""
+
+Threads per block in each dimension, if known at compile time. If the block size
+is known all three should be at least 1. If it is unknown they should all be set
+to 0 or not set.
Texture Sampling and Texture Formats
------------------------------------
diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index 5cc18a2..c25786e 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -276,7 +276,10 @@ union tgsi_immediate_data
#define TGSI_PROPERTY_NUM_CULLDIST_ENABLED 16
#define TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL 17
#define TGSI_PROPERTY_NEXT_SHADER 18
-#define TGSI_PROPERTY_COUNT 19
+#define TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH 19
+#define TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT 20
+#define TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH 21
+#define TGSI_PROPERTY_COUNT 22
struct tgsi_property {
unsigned Type : 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 23786b8..cd481c1 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5935,6 +5935,20 @@ find_array(unsigned attr, struct array_decl *arrays, unsigned count,
return false;
}
+static void
+emit_compute_block_size(const struct gl_program *program,
+ struct ureg_program *ureg) {
+ const struct gl_compute_program *cp =
+ (const struct gl_compute_program *)program;
+
+ ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
+ cp->LocalSize[0]);
+ ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
+ cp->LocalSize[1]);
+ ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
+ cp->LocalSize[2]);
+}
+
/**
* Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
* \param program the program to translate
@@ -6180,6 +6194,10 @@ st_translate_program(
}
}
+ if (procType == TGSI_PROCESSOR_COMPUTE) {
+ emit_compute_block_size(proginfo, ureg);
+ }
+
/* Declare address register.
*/
if (program->num_address_regs > 0) {