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-rw-r--r--src/intel/vulkan/anv_genX.h2
-rw-r--r--src/intel/vulkan/anv_pipeline.c46
-rw-r--r--src/intel/vulkan/anv_private.h2
-rw-r--r--src/intel/vulkan/genX_l3.c38
-rw-r--r--src/intel/vulkan/genX_pipeline.c4
5 files changed, 25 insertions, 67 deletions
diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h
index cf5a232..11814dd 100644
--- a/src/intel/vulkan/anv_genX.h
+++ b/src/intel/vulkan/anv_genX.h
@@ -44,8 +44,6 @@ void genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer);
void genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer);
void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer);
-void genX(setup_pipeline_l3_config)(struct anv_pipeline *pipeline);
-
void genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
const struct anv_pipeline *pipeline);
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 151073e..35acc4a 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -28,6 +28,7 @@
#include <fcntl.h>
#include "util/mesa-sha1.h"
+#include "common/gen_l3_config.h"
#include "anv_private.h"
#include "brw_nir.h"
#include "anv_nir.h"
@@ -802,29 +803,6 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
return VK_SUCCESS;
}
-
-void
-anv_setup_pipeline_l3_config(struct anv_pipeline *pipeline)
-{
- const struct gen_device_info *devinfo = &pipeline->device->info;
- switch (devinfo->gen) {
- case 7:
- if (devinfo->is_haswell)
- gen75_setup_pipeline_l3_config(pipeline);
- else
- gen7_setup_pipeline_l3_config(pipeline);
- break;
- case 8:
- gen8_setup_pipeline_l3_config(pipeline);
- break;
- case 9:
- gen9_setup_pipeline_l3_config(pipeline);
- break;
- default:
- unreachable("unsupported gen\n");
- }
-}
-
void
anv_compute_urb_partition(struct anv_pipeline *pipeline)
{
@@ -1151,6 +1129,26 @@ anv_pipeline_validate_create_info(const VkGraphicsPipelineCreateInfo *info)
}
}
+/**
+ * Calculate the desired L3 partitioning based on the current state of the
+ * pipeline. For now this simply returns the conservative defaults calculated
+ * by get_default_l3_weights(), but we could probably do better by gathering
+ * more statistics from the pipeline state (e.g. guess of expected URB usage
+ * and bound surfaces), or by using feed-back from performance counters.
+ */
+void
+anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm)
+{
+ const struct gen_device_info *devinfo = &pipeline->device->info;
+
+ const struct gen_l3_weights w =
+ gen_get_default_l3_weights(devinfo, pipeline->needs_data_cache, needs_slm);
+
+ pipeline->urb.l3_config = gen_get_l3_config(devinfo, w);
+ pipeline->urb.total_size =
+ gen_get_l3_config_urb_size(devinfo, pipeline->urb.l3_config);
+}
+
VkResult
anv_pipeline_init(struct anv_pipeline *pipeline,
struct anv_device *device,
@@ -1243,7 +1241,7 @@ anv_pipeline_init(struct anv_pipeline *pipeline,
assert(extra->disable_vs);
}
- anv_setup_pipeline_l3_config(pipeline);
+ anv_pipeline_setup_l3_config(pipeline, false);
anv_compute_urb_partition(pipeline);
const VkPipelineVertexInputStateCreateInfo *vi_info =
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 5486d92..99b3acf 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1648,7 +1648,7 @@ void
anv_compute_urb_partition(struct anv_pipeline *pipeline);
void
-anv_setup_pipeline_l3_config(struct anv_pipeline *pipeline);
+anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm);
/**
* Subsurface of an anv_image.
diff --git a/src/intel/vulkan/genX_l3.c b/src/intel/vulkan/genX_l3.c
index 9efaeb1..3a96693 100644
--- a/src/intel/vulkan/genX_l3.c
+++ b/src/intel/vulkan/genX_l3.c
@@ -27,33 +27,6 @@
#include "genxml/gen_macros.h"
#include "genxml/genX_pack.h"
-/**
- * Calculate the desired L3 partitioning based on the current state of the
- * pipeline. For now this simply returns the conservative defaults calculated
- * by get_default_l3_weights(), but we could probably do better by gathering
- * more statistics from the pipeline state (e.g. guess of expected URB usage
- * and bound surfaces), or by using feed-back from performance counters.
- */
-static struct gen_l3_weights
-get_pipeline_state_l3_weights(const struct anv_pipeline *pipeline)
-{
- bool needs_dc = false, needs_slm = false;
-
- for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
- if (!anv_pipeline_has_stage(pipeline, i))
- continue;
-
- const struct brw_stage_prog_data *prog_data =
- anv_shader_bin_get_prog_data(pipeline->shaders[i]);
-
- needs_dc |= pipeline->needs_data_cache;
- needs_slm |= prog_data->total_shared;
- }
-
- return gen_get_default_l3_weights(&pipeline->device->info,
- needs_dc, needs_slm);
-}
-
#define emit_lri(batch, reg, imm) \
anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { \
lri.RegisterOffset = __anv_reg_num(reg); \
@@ -208,17 +181,6 @@ setup_l3_config(struct anv_cmd_buffer *cmd_buffer/*, struct brw_context *brw*/,
}
void
-genX(setup_pipeline_l3_config)(struct anv_pipeline *pipeline)
-{
- const struct gen_l3_weights w = get_pipeline_state_l3_weights(pipeline);
- const struct gen_device_info *devinfo = &pipeline->device->info;
-
- pipeline->urb.l3_config = gen_get_l3_config(devinfo, w);
- pipeline->urb.total_size =
- gen_get_l3_config_urb_size(devinfo, pipeline->urb.l3_config);
-}
-
-void
genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
const struct anv_pipeline *pipeline)
{
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 7d8129d..5a3e1ab 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -85,10 +85,10 @@ genX(compute_pipeline_create)(
pipeline->use_repclear = false;
- anv_setup_pipeline_l3_config(pipeline);
-
const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
+ anv_pipeline_setup_l3_config(pipeline, cs_prog_data->base.total_shared > 0);
+
uint32_t group_size = cs_prog_data->local_size[0] *
cs_prog_data->local_size[1] * cs_prog_data->local_size[2];
uint32_t remainder = group_size & (cs_prog_data->simd_size - 1);
generated by cgit v1.1 at 2024-05-23 11:05:49 +0000