diff options
| -rw-r--r-- | src/intel/blorp/blorp.c | 14 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 31 |
2 files changed, 29 insertions, 16 deletions
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 7b3b097..955e543 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -64,16 +64,6 @@ brw_blorp_surface_info_init(struct blorp_context *blorp, unsigned int level, unsigned int layer, enum isl_format format, bool is_render_target) { - /* Layer is a physical layer, so if this is a 2D multisample array texture - * using INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, then it had better - * be a multiple of num_samples. - */ - unsigned layer_multiplier = 1; - if (surf->surf->msaa_layout == ISL_MSAA_LAYOUT_ARRAY) { - assert(layer % surf->surf->samples == 0); - layer_multiplier = surf->surf->samples; - } - if (format == ISL_FORMAT_UNSUPPORTED) format = surf->surf->format; @@ -126,9 +116,9 @@ brw_blorp_surface_info_init(struct blorp_context *blorp, * guaranteed that we won't be doing any funny surface hacks. */ info->view.base_array_layer = 0; - info->z_offset = layer / layer_multiplier; + info->z_offset = layer; } else { - info->view.base_array_layer = layer / layer_multiplier; + info->view.base_array_layer = layer; assert(info->view.array_len >= info->view.base_array_layer); info->view.array_len -= info->view.base_array_layer; diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 38938d4..e864915 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -274,6 +274,20 @@ swizzle_to_scs(GLenum swizzle) return (enum isl_channel_select)((swizzle + 4) & 7); } +static unsigned +physical_to_logical_layer(struct intel_mipmap_tree *mt, + unsigned physical_layer) +{ + if (mt->num_samples > 1 && + (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS)) { + assert(physical_layer % mt->num_samples == 0); + return physical_layer / mt->num_samples; + } else { + return physical_layer; + } +} + /** * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is @@ -358,9 +372,11 @@ brw_blorp_blit_miptrees(struct brw_context *brw, struct blorp_batch batch; blorp_batch_init(&brw->blorp, &batch, brw); - blorp_blit(&batch, &src_surf, src_level, src_layer, + blorp_blit(&batch, &src_surf, src_level, + physical_to_logical_layer(src_mt, src_layer), brw_blorp_to_isl_format(brw, src_format, false), src_isl_swizzle, - &dst_surf, dst_level, dst_layer, + &dst_surf, dst_level, + physical_to_logical_layer(dst_mt, dst_layer), brw_blorp_to_isl_format(brw, dst_format, true), ISL_SWIZZLE_IDENTITY, src_x0, src_y0, src_x1, src_y1, @@ -677,6 +693,12 @@ set_write_disables(const struct intel_renderbuffer *irb, return disables; } +static unsigned +irb_logical_mt_layer(struct intel_renderbuffer *irb) +{ + return physical_to_logical_layer(irb->mt, irb->mt_layer); +} + static bool do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, struct gl_renderbuffer *rb, unsigned buf, @@ -764,7 +786,8 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, blorp_batch_init(&brw->blorp, &batch, brw); blorp_fast_clear(&batch, &surf, (enum isl_format)brw->render_target_format[format], - level, irb->mt_layer, num_layers, x0, y0, x1, y1); + level, irb_logical_mt_layer(irb), num_layers, + x0, y0, x1, y1); blorp_batch_finish(&batch); /* Now that the fast clear has occurred, put the buffer in @@ -784,7 +807,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, blorp_clear(&batch, &surf, (enum isl_format)brw->render_target_format[format], ISL_SWIZZLE_IDENTITY, - level, irb->mt_layer, num_layers, + level, irb_logical_mt_layer(irb), num_layers, x0, y0, x1, y1, clear_color, color_write_disable); blorp_batch_finish(&batch); |