diff options
34 files changed, 116 insertions, 129 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 0041876..a8369b0 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -204,7 +204,7 @@ static void upload_cc_unit(struct brw_context *brw) cc.cc2.depth_write_enable = ctx->Depth.Mask; } - if (intel->stats_wm || (INTEL_DEBUG & DEBUG_STATS)) + if (intel->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS)) cc.cc5.statistics_enable = 1; /* CACHE_NEW_CC_VP */ diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 15e60bf..1be165c 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -133,13 +133,13 @@ static void compile_clip_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - if (INTEL_DEBUG & DEBUG_CLIP) { + if (unlikely(INTEL_DEBUG & DEBUG_CLIP)) { printf("clip:\n"); for (i = 0; i < program_size / sizeof(struct brw_instruction); i++) brw_disasm(stdout, &((struct brw_instruction *)program)[i], intel->gen); printf("\n"); - } + } /* Upload */ diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c index 885167d..60fd5fa 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_state.c +++ b/src/mesa/drivers/dri/i965/brw_clip_state.c @@ -114,10 +114,10 @@ clip_unit_create_from_key(struct brw_context *brw, clip.thread4.max_threads = 1 - 1; } - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (unlikely(INTEL_DEBUG & DEBUG_SINGLE_THREAD)) clip.thread4.max_threads = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) clip.thread4.stats_enable = 1; clip.clip5.userclip_enable_flags = 0x7f; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 04bc8cb..a1f403c 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -42,7 +42,7 @@ #include "intel_batchbuffer.h" -#define FILE_DEBUG_FLAG DEBUG_BATCH +#define FILE_DEBUG_FLAG DEBUG_PRIMS static GLuint prim_to_hw_prim[GL_POLYGON+1] = { _3DPRIM_POINTLIST, @@ -83,8 +83,7 @@ static GLuint brw_set_prim(struct brw_context *brw, struct gl_context *ctx = &brw->intel.ctx; GLenum mode = prim->mode; - if (INTEL_DEBUG & DEBUG_PRIMS) - printf("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); + DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); /* Slight optimization to avoid the GS program when not needed: */ @@ -133,9 +132,8 @@ static void brw_emit_prim(struct brw_context *brw, struct brw_3d_primitive prim_packet; struct intel_context *intel = &brw->intel; - if (INTEL_DEBUG & DEBUG_PRIMS) - printf("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode), - prim->start, prim->count); + DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode), + prim->start, prim->count); prim_packet.header.opcode = CMD_3D_PRIM; prim_packet.header.length = sizeof(prim_packet)/4 - 2; diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index c465436..2cefe61 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -168,7 +168,7 @@ static GLuint byte_types_scale[5] = { static GLuint get_surface_type( GLenum type, GLuint size, GLenum format, GLboolean normalized ) { - if (INTEL_DEBUG & DEBUG_VERTS) + if (unlikely(INTEL_DEBUG & DEBUG_VERTS)) printf("type %s size %d normalized %d\n", _mesa_lookup_enum_by_nr(type), size, normalized); diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 2ed59d3..3caddae 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -3129,7 +3129,7 @@ fs_visitor::generate_code() const char *last_annotation_string = NULL; ir_instruction *last_annotation_ir = NULL; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("Native code for fragment shader %d:\n", ctx->Shader.CurrentFragmentProgram->Name); } @@ -3141,7 +3141,7 @@ fs_visitor::generate_code() fs_inst *inst = (fs_inst *)iter.get(); struct brw_reg src[3], dst; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { if (last_annotation_ir != inst->ir) { last_annotation_ir = inst->ir; if (last_annotation_ir) { @@ -3335,7 +3335,7 @@ fs_visitor::generate_code() this->fail = true; } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { for (unsigned int i = last_native_inst; i < p->nr_insn; i++) { if (0) { printf("0x%08x 0x%08x 0x%08x 0x%08x ", @@ -3376,7 +3376,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c) */ c->dispatch_width = 8; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("GLSL IR for native fragment shader %d:\n", prog->Name); _mesa_print_ir(shader->ir, NULL); printf("\n"); diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index cfcc8ea..b0c76f4 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -127,8 +127,8 @@ static void compile_gs_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - if (INTEL_DEBUG & DEBUG_GS) { - int i; + if (unlikely(INTEL_DEBUG & DEBUG_GS)) { + int i; printf("gs:\n"); for (i = 0; i < program_size / sizeof(struct brw_instruction); i++) diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c index 63562eb..69a5f7a 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_state.c +++ b/src/mesa/drivers/dri/i965/brw_gs_state.c @@ -101,7 +101,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) if (intel->gen == 5) gs.thread4.rendering_enable = 1; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) gs.thread4.stats_enable = 1; bo = brw_upload_cache(&brw->cache, BRW_GS_UNIT, diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 24041e5..1d350bc 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -555,7 +555,7 @@ static void upload_invarient_state( struct brw_context *brw ) memset(&vfs, 0, sizeof(vfs)); vfs.opcode = brw->CMD_VF_STATISTICS; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) vfs.statistics_enable = 1; BRW_BATCH_STRUCT(brw, &vfs); diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 7dbd70d..6da155b 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -108,7 +108,7 @@ static void compile_sf_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - if (INTEL_DEBUG & DEBUG_SF) { + if (unlikely(INTEL_DEBUG & DEBUG_SF)) { printf("sf:\n"); for (i = 0; i < program_size / sizeof(struct brw_instruction); i++) brw_disasm(stdout, &((struct brw_instruction *)program)[i], diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 6ad9e1b..bd3a21e 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -210,10 +210,10 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.thread4.max_threads = MIN2(chipset_max_threads, key->nr_urb_entries) - 1; - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (unlikely(INTEL_DEBUG & DEBUG_SINGLE_THREAD)) sf.thread4.max_threads = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) sf.thread4.stats_enable = 1; /* CACHE_NEW_SF_VP */ diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index b31d849..58ff528 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -61,6 +61,7 @@ #include "intel_batchbuffer.h" #include "brw_wm.h" +#define FILE_DEBUG_FLAG DEBUG_STATE static GLuint hash_key(struct brw_cache_item *item) @@ -265,10 +266,9 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache, *(void **)aux_return = (void *)((char *)item->key + item->key_size); } - if (INTEL_DEBUG & DEBUG_STATE) - printf("upload %s: %d bytes to cache id %d\n", - cache->name[cache_id], - data_size, cache_id); + DBG("upload %s: %d bytes to cache id %d\n", + cache->name[cache_id], + data_size, cache_id); /* Copy data to the buffer */ drm_intel_bo_subdata(bo, 0, data_size, data); @@ -407,8 +407,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) struct brw_cache_item *c, *next; GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - printf("%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); for (i = 0; i < cache->size; i++) { for (c = cache->items[i]; c; c = next) { @@ -434,8 +433,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) void brw_state_cache_check_size(struct brw_context *brw) { - if (INTEL_DEBUG & DEBUG_STATE) - printf("%s (n_items=%d)\n", __FUNCTION__, brw->cache.n_items); + DBG("%s (n_items=%d)\n", __FUNCTION__, brw->cache.n_items); /* un-tuned guess. Each object is generally a page, so 1000 of them is 4 MB of * state cache. @@ -450,8 +448,7 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) { GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - printf("%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); brw_clear_cache(brw, cache); for (i = 0; i < BRW_MAX_CACHE; i++) { diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index f3b6a90..338f387 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -435,7 +435,7 @@ void brw_upload_state(struct brw_context *brw) brw_clear_validated_bos(brw); - if (INTEL_DEBUG) { + if (unlikely(INTEL_DEBUG)) { /* Debug version which enforces various sanity checks on the * state flags which are generated and checked to help ensure * state atoms are ordered correctly in the list. @@ -487,7 +487,7 @@ void brw_upload_state(struct brw_context *brw) } } - if (INTEL_DEBUG & DEBUG_STATE) { + if (unlikely(INTEL_DEBUG & DEBUG_STATE)) { brw_update_dirty_count(mesa_bits, state->mesa); brw_update_dirty_count(brw_bits, state->brw); brw_update_dirty_count(cache_bits, state->cache); diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c index 0f59718..dfc1551 100644 --- a/src/mesa/drivers/dri/i965/brw_urb.c +++ b/src/mesa/drivers/dri/i965/brw_urb.c @@ -190,12 +190,12 @@ static void recalculate_urb_fence( struct brw_context *brw ) exit(1); } - if (INTEL_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS)) + if (unlikely(INTEL_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS))) printf("URB CONSTRAINED\n"); } done: - if (INTEL_DEBUG & DEBUG_URB) + if (unlikely(INTEL_DEBUG & DEBUG_URB)) printf("URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n", brw->urb.vs_start, brw->urb.gs_start, diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index e560cda..aa8048c 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -394,7 +394,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) c->prog_data.total_grf = reg; - if (INTEL_DEBUG & DEBUG_VS) { + if (unlikely(INTEL_DEBUG & DEBUG_VS)) { printf("%s NumAddrRegs %d\n", __FUNCTION__, c->vp->program.Base.NumAddressRegs); printf("%s NumTemps %d\n", __FUNCTION__, c->vp->program.Base.NumTemporaries); printf("%s reg = %d\n", __FUNCTION__, reg); @@ -1678,7 +1678,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) GLuint index; GLuint file; - if (INTEL_DEBUG & DEBUG_VS) { + if (unlikely(INTEL_DEBUG & DEBUG_VS)) { printf("vs-mesa:\n"); _mesa_fprint_program_opt(stdout, &c->vp->program.Base, PROG_PRINT_DEBUG, GL_TRUE); @@ -2048,7 +2048,7 @@ void brw_vs_emit(struct brw_vs_compile *c ) brw_optimize(p); - if (INTEL_DEBUG & DEBUG_VS) { + if (unlikely(INTEL_DEBUG & DEBUG_VS)) { int i; printf("vs-native:\n"); diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index ebae942..be92313 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -154,7 +154,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) */ vs.vs5.sampler_count = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) vs.thread4.stats_enable = 1; /* Vertex program always enabled: diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 7f3ba5f..a6d2a23 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -198,7 +198,7 @@ static void do_wm_prog( struct brw_context *brw, c->prog_data.total_scratch = 0; } - if (INTEL_DEBUG & DEBUG_WM) + if (unlikely(INTEL_DEBUG & DEBUG_WM)) fprintf(stderr, "\n"); /* get the program diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index d06c49f..2724762 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1920,7 +1920,7 @@ void brw_wm_emit( struct brw_wm_compile *c ) brw_remove_grf_to_mrf_moves(p); } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { int i; printf("wm-native:\n"); diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index 15a238c..938fb80 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -1058,7 +1058,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) struct brw_fragment_program *fp = c->fp; GLuint insn; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("pre-fp:\n"); _mesa_fprint_program_opt(stdout, &fp->program.Base, PROG_PRINT_DEBUG, GL_TRUE); @@ -1174,7 +1174,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("pass_fp:\n"); print_insns( c->prog_instructions, c->nr_fp_insns ); printf("\n"); diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index d325f85..7fe8ab1 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -19,7 +19,7 @@ GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp) { int i; - if (INTEL_DEBUG & DEBUG_GLSL_FORCE) + if (unlikely(INTEL_DEBUG & DEBUG_GLSL_FORCE)) return GL_TRUE; for (i = 0; i < fp->Base.NumInstructions; i++) { @@ -1002,7 +1002,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) } post_wm_emit(c); - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("wm-native:\n"); for (i = 0; i < p->nr_insn; i++) brw_disasm(stdout, &p->store[i], intel->gen); @@ -1016,7 +1016,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) */ void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) { - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("brw_wm_glsl_emit:\n"); } @@ -1026,7 +1026,7 @@ void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) /* actual code generation */ brw_wm_emit_glsl(brw, c); - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "brw_wm_glsl_emit done"); } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass0.c b/src/mesa/drivers/dri/i965/brw_wm_pass0.c index d6aa9f9..8315252 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass0.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass0.c @@ -440,7 +440,7 @@ void brw_wm_pass0( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass0"); } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index 962515a..3a2874b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -291,7 +291,7 @@ void brw_wm_pass1( struct brw_wm_compile *c ) track_arg(c, inst, 2, read2); } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass1"); } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index 54acb30..44e3953 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -331,13 +331,13 @@ void brw_wm_pass2( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass2"); } c->state = PASS2_DONE; - if (INTEL_DEBUG & DEBUG_WM) { + if (unlikely(INTEL_DEBUG & DEBUG_WM)) { brw_wm_print_program(c, "pass2/done"); } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 9a27b93..76de7b7 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -249,7 +249,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, wm.wm5.line_stipple = key->line_stipple; - if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm) + if (unlikely(INTEL_DEBUG & DEBUG_STATS) || key->stats_wm) wm.wm4.stats_enable = 1; bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT, diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index aaf3a57..4b498f8 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -97,7 +97,7 @@ do_flush_locked(struct intel_batchbuffer *batch, GLuint used) (x_off & 0xffff) | (y_off << 16)); } - if (INTEL_DEBUG & DEBUG_BATCH) { + if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) { drm_intel_bo_map(batch->buf, GL_FALSE); intel_decode(batch->buf->virtual, used / 4, batch->buf->offset, intel->intelScreen->deviceID, GL_TRUE); @@ -128,7 +128,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file, if (used == 0) return; - if (INTEL_DEBUG & DEBUG_BATCH) + if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) fprintf(stderr, "%s:%d: Batchbuffer flush with %db used\n", file, line, used); @@ -172,7 +172,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file, do_flush_locked(batch, used); - if (INTEL_DEBUG & DEBUG_SYNC) { + if (unlikely(INTEL_DEBUG & DEBUG_SYNC)) { fprintf(stderr, "waiting for idle\n"); drm_intel_bo_map(batch->buf, GL_TRUE); drm_intel_bo_unmap(batch->buf); diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index d781463..fa451f0 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -58,6 +58,21 @@ static const char *buffer_names[] = { [BUFFER_COLOR7] = "color7", }; +static void +debug_mask(const char *name, GLbitfield mask) +{ + GLuint i; + + if (unlikely(INTEL_DEBUG & DEBUG_BLIT)) { + DBG("%s clear:", name); + for (i = 0; i < BUFFER_COUNT; i++) { + if (mask & (1 << i)) + DBG(" %s", buffer_names[i]); + } + DBG("\n"); + } +} + /** * Called by ctx->Driver.Clear. */ @@ -70,7 +85,6 @@ intelClear(struct gl_context *ctx, GLbitfield mask) GLbitfield blit_mask = 0; GLbitfield swrast_mask = 0; struct gl_framebuffer *fb = ctx->DrawBuffer; - GLuint i; if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) { intel->front_buffer_dirty = GL_TRUE; @@ -162,39 +176,17 @@ intelClear(struct gl_context *ctx, GLbitfield mask) } if (blit_mask) { - if (INTEL_DEBUG & DEBUG_BLIT) { - DBG("blit clear:"); - for (i = 0; i < BUFFER_COUNT; i++) { - if (blit_mask & (1 << i)) - DBG(" %s", buffer_names[i]); - } - DBG("\n"); - } + debug_mask("blit", blit_mask); intelClearWithBlit(ctx, blit_mask); } if (tri_mask) { - if (INTEL_DEBUG & DEBUG_BLIT) { - DBG("tri clear:"); - for (i = 0; i < BUFFER_COUNT; i++) { - if (tri_mask & (1 << i)) - DBG(" %s", buffer_names[i]); - } - DBG("\n"); - } - + debug_mask("tri", tri_mask); _mesa_meta_Clear(&intel->ctx, tri_mask); } if (swrast_mask) { - if (INTEL_DEBUG & DEBUG_BLIT) { - DBG("swrast clear:"); - for (i = 0; i < BUFFER_COUNT; i++) { - if (swrast_mask & (1 << i)) - DBG(" %s", buffer_names[i]); - } - DBG("\n"); - } + debug_mask("swrast", swrast_mask); _swrast_Clear(ctx, swrast_mask); } } diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 7ace50b..de4bcde 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -249,7 +249,7 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) * thus ignore the invalidate. */ drawable->lastStamp = drawable->dri2.stamp; - if (INTEL_DEBUG & DEBUG_DRI) + if (unlikely(INTEL_DEBUG & DEBUG_DRI)) fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); screen = intel->intelScreen->driScrnPriv; @@ -378,14 +378,14 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) if (rb->region && rb->region->name == buffers[i].name) continue; - if (INTEL_DEBUG & DEBUG_DRI) + if (unlikely(INTEL_DEBUG & DEBUG_DRI)) fprintf(stderr, "attaching buffer %d, at %d, cpp %d, pitch %d\n", buffers[i].name, buffers[i].attachment, buffers[i].cpp, buffers[i].pitch); if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) { - if (INTEL_DEBUG & DEBUG_DRI) + if (unlikely(INTEL_DEBUG & DEBUG_DRI)) fprintf(stderr, "(reusing depth buffer as stencil)\n"); intel_region_reference(®ion, depth_region); } diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 46d10d7..2ec65b8 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -98,6 +98,16 @@ extern void intelFallback(struct intel_context *intel, GLbitfield bit, #define INTEL_MAX_FIXUP 64 +#ifndef likely +#ifdef __GNUC__ +#define likely(expr) (__builtin_expect(expr, 1)) +#define unlikely(expr) (__builtin_expect(expr, 0)) +#else +#define likely(expr) (expr) +#define unlikely(expr) (expr) +#endif +#endif + struct intel_sync_object { struct gl_sync_object Base; @@ -359,10 +369,15 @@ extern int INTEL_DEBUG; #define DEBUG_CLIP 0x8000000 #define DBG(...) do { \ - if (INTEL_DEBUG & FILE_DEBUG_FLAG) \ + if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \ printf(__VA_ARGS__); \ } while(0) +#define fallback_debug(...) do { \ + if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS)) \ + printf(__VA_ARGS__); \ +} while(0) + #define PCI_CHIP_845_G 0x2562 #define PCI_CHIP_I830_M 0x3577 #define PCI_CHIP_I855_GM 0x3582 diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c index 60583ef..d5c3577 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel.c +++ b/src/mesa/drivers/dri/intel/intel_pixel.c @@ -147,10 +147,9 @@ intel_check_blit_format(struct intel_region * region, return GL_TRUE; } - if (INTEL_DEBUG & DEBUG_PIXEL) - fprintf(stderr, "%s: bad format for blit (cpp %d, type %s format %s)\n", - __FUNCTION__, region->cpp, - _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format)); + DBG("%s: bad format for blit (cpp %d, type %s format %s)\n", + __FUNCTION__, region->cpp, + _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format)); return GL_FALSE; } diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c index 63fb4b3..e7356a6 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c @@ -113,9 +113,8 @@ static GLuint get_bitmap_rect(GLsizei width, GLsizei height, GLint incr; GLuint count = 0; - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n", - __FUNCTION__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask); + DBG("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n", + __FUNCTION__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask); if (invert) { first = h-1; @@ -285,7 +284,7 @@ do_blit_bitmap( struct gl_context *ctx, } out: - if (INTEL_DEBUG & DEBUG_SYNC) + if (unlikely(INTEL_DEBUG & DEBUG_SYNC)) intel_batchbuffer_flush(intel->batch); if (_mesa_is_bufferobj(unpack->BufferObj)) { @@ -299,6 +298,7 @@ out: return GL_TRUE; } + /* There are a large number of possible ways to implement bitmap on * this hardware, most of them have some sort of drawback. Here are a * few that spring to mind: diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c index c6b36ed..a7ca780 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c @@ -119,8 +119,7 @@ do_blit_copypixels(struct gl_context * ctx, GLboolean flip = GL_FALSE; if (type == GL_DEPTH || type == GL_STENCIL) { - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "glCopyPixels() fallback: GL_DEPTH || GL_STENCIL\n"); + fallback_debug("glCopyPixels() fallback: GL_DEPTH || GL_STENCIL\n"); return GL_FALSE; } @@ -203,8 +202,7 @@ intelCopyPixels(struct gl_context * ctx, GLsizei width, GLsizei height, GLint destx, GLint desty, GLenum type) { - if (INTEL_DEBUG & DEBUG_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); if (do_blit_copypixels(ctx, srcx, srcy, width, height, destx, desty, type)) return; diff --git a/src/mesa/drivers/dri/intel/intel_pixel_read.c b/src/mesa/drivers/dri/intel/intel_pixel_read.c index b249f9a..54da292 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_read.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_read.c @@ -42,6 +42,8 @@ #include "intel_pixel.h" #include "intel_buffer_objects.h" +#define FILE_DEBUG_FLAG DEBUG_PIXEL + /* For many applications, the new ability to pull the source buffers * back out of the GTT and then do the packing/conversion operations * in software will be as much of an improvement as trying to get the @@ -79,8 +81,7 @@ do_blit_readpixels(struct gl_context * ctx, GLboolean all; GLint dst_x, dst_y; - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); if (!src) return GL_FALSE; @@ -88,22 +89,19 @@ do_blit_readpixels(struct gl_context * ctx, if (!_mesa_is_bufferobj(pack->BufferObj)) { /* PBO only for now: */ - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s - not PBO\n", __FUNCTION__); + DBG("%s - not PBO\n", __FUNCTION__); return GL_FALSE; } if (ctx->_ImageTransferState || !intel_check_blit_format(src, format, type)) { - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s - bad format for blit\n", __FUNCTION__); + DBG("%s - bad format for blit\n", __FUNCTION__); return GL_FALSE; } if (pack->Alignment != 1 || pack->SwapBytes || pack->LsbFirst) { - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s: bad packing params\n", __FUNCTION__); + DBG("%s: bad packing params\n", __FUNCTION__); return GL_FALSE; } @@ -113,8 +111,7 @@ do_blit_readpixels(struct gl_context * ctx, rowLength = width; if (pack->Invert) { - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s: MESA_PACK_INVERT not done yet\n", __FUNCTION__); + DBG("%s: MESA_PACK_INVERT not done yet\n", __FUNCTION__); return GL_FALSE; } else { @@ -158,8 +155,7 @@ do_blit_readpixels(struct gl_context * ctx, return GL_FALSE; } - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s - DONE\n", __FUNCTION__); + DBG("%s - DONE\n", __FUNCTION__); return GL_TRUE; } @@ -173,8 +169,7 @@ intelReadPixels(struct gl_context * ctx, struct intel_context *intel = intel_context(ctx); GLboolean dirty; - if (INTEL_DEBUG & DEBUG_PIXEL) - fprintf(stderr, "%s\n", __FUNCTION__); + DBG("%s\n", __FUNCTION__); intel_flush(ctx); @@ -188,8 +183,7 @@ intelReadPixels(struct gl_context * ctx, (ctx, x, y, width, height, format, type, pack, pixels)) return; - if (INTEL_DEBUG & DEBUG_PIXEL) - printf("%s: fallback to swrast\n", __FUNCTION__); + fallback_debug("%s: fallback to swrast\n", __FUNCTION__); /* Update Mesa state before calling down into _swrast_ReadPixels, as * the spans code requires the computed buffer states to be up to date, diff --git a/src/mesa/drivers/dri/intel/intel_tex.c b/src/mesa/drivers/dri/intel/intel_tex.c index 3d9a254..743a043 100644 --- a/src/mesa/drivers/dri/intel/intel_tex.c +++ b/src/mesa/drivers/dri/intel/intel_tex.c @@ -158,8 +158,7 @@ intelGenerateMipmap(struct gl_context *ctx, GLenum target, struct intel_context *intel = intel_context(ctx); struct intel_texture_object *intelObj = intel_texture_object(texObj); - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__); + fallback_debug("%s - fallback to swrast\n", __FUNCTION__); intel_tex_map_level_images(intel, intelObj, texObj->BaseLevel); _mesa_generate_mipmap(ctx, target, texObj); diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c index 2d046fd..284ba19 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_copy.c +++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c @@ -105,16 +105,15 @@ do_copy_texsubimage(struct intel_context *intel, const struct intel_region *src = get_teximage_source(intel, internalFormat); if (!intelImage->mt || !src || !src->buffer) { - if (INTEL_DEBUG & DEBUG_FALLBACKS) + if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS)) fprintf(stderr, "%s fail %p %p (0x%08x)\n", __FUNCTION__, intelImage->mt, src, internalFormat); return GL_FALSE; } if (intelImage->mt->cpp != src->cpp) { - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s fail %d vs %d cpp\n", - __FUNCTION__, intelImage->mt->cpp, src->cpp); + fallback_debug("%s fail %d vs %d cpp\n", + __FUNCTION__, intelImage->mt->cpp, src->cpp); return GL_FALSE; } @@ -212,8 +211,7 @@ intelCopyTexImage1D(struct gl_context * ctx, GLenum target, GLint level, return; fail: - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__); + fallback_debug("%s - fallback to swrast\n", __FUNCTION__); _mesa_meta_CopyTexImage1D(ctx, target, level, internalFormat, x, y, width, border); } @@ -261,8 +259,7 @@ intelCopyTexImage2D(struct gl_context * ctx, GLenum target, GLint level, return; fail: - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__); + fallback_debug("%s - fallback to swrast\n", __FUNCTION__); _mesa_meta_CopyTexImage2D(ctx, target, level, internalFormat, x, y, width, height, border); } @@ -287,8 +284,7 @@ intelCopyTexSubImage1D(struct gl_context * ctx, GLenum target, GLint level, if (!do_copy_texsubimage(intel_context(ctx), target, intel_texture_image(texImage), internalFormat, xoffset, 0, x, y, width, 1)) { - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__); + fallback_debug("%s - fallback to swrast\n", __FUNCTION__); _mesa_meta_CopyTexSubImage1D(ctx, target, level, xoffset, x, y, width); } } @@ -314,8 +310,7 @@ intelCopyTexSubImage2D(struct gl_context * ctx, GLenum target, GLint level, internalFormat, xoffset, yoffset, x, y, width, height)) { - if (INTEL_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__); + fallback_debug("%s - fallback to swrast\n", __FUNCTION__); _mesa_meta_CopyTexSubImage2D(ctx, target, level, xoffset, yoffset, x, y, width, height); } |