diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/Makefile.sources | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_binding_tables.c | 54 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 12 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 12 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_tcs_surface_state.c | 144 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_tes_surface_state.c | 144 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_ds_state.c | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_hs_state.c | 5 |
10 files changed, 389 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index 3ab143d..d147a73 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -150,6 +150,8 @@ i965_FILES = \ brw_state.h \ brw_state_upload.c \ brw_structs.h \ + brw_tcs_surface_state.c \ + brw_tes_surface_state.c \ brw_tex.c \ brw_tex_layout.c \ brw_urb.c \ diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c index d8226e0..80935cf 100644 --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c @@ -196,6 +196,60 @@ const struct brw_tracked_state brw_wm_binding_table = { .emit = brw_upload_wm_binding_table, }; +/** Upload the TCS binding table (if TCS is active). */ +static void +brw_tcs_upload_binding_table(struct brw_context *brw) +{ + /* If there's no TCS, skip changing anything. */ + if (brw->tess_ctrl_program == NULL) + return; + + /* BRW_NEW_TCS_PROG_DATA */ + const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; + brw_upload_binding_table(brw, + _3DSTATE_BINDING_TABLE_POINTERS_HS, + prog_data, + &brw->tcs.base); +} + +const struct brw_tracked_state brw_tcs_binding_table = { + .dirty = { + .mesa = 0, + .brw = BRW_NEW_BATCH | + BRW_NEW_SURFACES | + BRW_NEW_TCS_CONSTBUF | + BRW_NEW_TCS_PROG_DATA, + }, + .emit = brw_tcs_upload_binding_table, +}; + +/** Upload the TES binding table (if TES is active). */ +static void +brw_tes_upload_binding_table(struct brw_context *brw) +{ + /* If there's no TES, skip changing anything. */ + if (brw->tess_eval_program == NULL) + return; + + /* BRW_NEW_TES_PROG_DATA */ + const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; + brw_upload_binding_table(brw, + _3DSTATE_BINDING_TABLE_POINTERS_DS, + prog_data, + &brw->tes.base); +} + +const struct brw_tracked_state brw_tes_binding_table = { + .dirty = { + .mesa = 0, + .brw = BRW_NEW_BATCH | + BRW_NEW_SURFACES | + BRW_NEW_TES_CONSTBUF | + BRW_NEW_TES_PROG_DATA, + }, + .emit = brw_tes_upload_binding_table, +}; + /** Upload the GS binding table (if GS is active). */ static void brw_gs_upload_binding_table(struct brw_context *brw) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index a845541..7e7faf9 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -195,6 +195,8 @@ enum brw_state_id { BRW_STATE_BATCH, BRW_STATE_INDEX_BUFFER, BRW_STATE_VS_CONSTBUF, + BRW_STATE_TCS_CONSTBUF, + BRW_STATE_TES_CONSTBUF, BRW_STATE_GS_CONSTBUF, BRW_STATE_PROGRAM_CACHE, BRW_STATE_STATE_BASE_ADDRESS, @@ -281,6 +283,8 @@ enum brw_state_id { /** \see brw.state.depth_region */ #define BRW_NEW_INDEX_BUFFER (1ull << BRW_STATE_INDEX_BUFFER) #define BRW_NEW_VS_CONSTBUF (1ull << BRW_STATE_VS_CONSTBUF) +#define BRW_NEW_TCS_CONSTBUF (1ull << BRW_STATE_TCS_CONSTBUF) +#define BRW_NEW_TES_CONSTBUF (1ull << BRW_STATE_TES_CONSTBUF) #define BRW_NEW_GS_CONSTBUF (1ull << BRW_STATE_GS_CONSTBUF) #define BRW_NEW_PROGRAM_CACHE (1ull << BRW_STATE_PROGRAM_CACHE) #define BRW_NEW_STATE_BASE_ADDRESS (1ull << BRW_STATE_STATE_BASE_ADDRESS) @@ -1232,7 +1236,7 @@ struct brw_context } perfmon; int num_atoms[BRW_NUM_PIPELINES]; - const struct brw_tracked_state render_atoms[62]; + const struct brw_tracked_state render_atoms[72]; const struct brw_tracked_state compute_atoms[10]; /* If (INTEL_DEBUG & DEBUG_BATCH) */ diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 59acec9..c6197cc 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -47,6 +47,8 @@ extern const struct brw_tracked_state brw_cc_unit; extern const struct brw_tracked_state brw_clip_prog; extern const struct brw_tracked_state brw_clip_unit; extern const struct brw_tracked_state brw_vs_pull_constants; +extern const struct brw_tracked_state brw_tcs_pull_constants; +extern const struct brw_tracked_state brw_tes_pull_constants; extern const struct brw_tracked_state brw_gs_pull_constants; extern const struct brw_tracked_state brw_wm_pull_constants; extern const struct brw_tracked_state brw_cs_pull_constants; @@ -74,16 +76,26 @@ extern const struct brw_tracked_state brw_gs_samplers; extern const struct brw_tracked_state brw_vs_ubo_surfaces; extern const struct brw_tracked_state brw_vs_abo_surfaces; extern const struct brw_tracked_state brw_vs_image_surfaces; +extern const struct brw_tracked_state brw_tcs_ubo_surfaces; +extern const struct brw_tracked_state brw_tcs_abo_surfaces; +extern const struct brw_tracked_state brw_tcs_image_surfaces; +extern const struct brw_tracked_state brw_tes_ubo_surfaces; +extern const struct brw_tracked_state brw_tes_abo_surfaces; +extern const struct brw_tracked_state brw_tes_image_surfaces; extern const struct brw_tracked_state brw_gs_ubo_surfaces; extern const struct brw_tracked_state brw_gs_abo_surfaces; extern const struct brw_tracked_state brw_gs_image_surfaces; extern const struct brw_tracked_state brw_vs_unit; +extern const struct brw_tracked_state brw_hs_prog; +extern const struct brw_tracked_state brw_ds_prog; extern const struct brw_tracked_state brw_gs_prog; extern const struct brw_tracked_state brw_wm_prog; extern const struct brw_tracked_state brw_renderbuffer_surfaces; extern const struct brw_tracked_state brw_texture_surfaces; extern const struct brw_tracked_state brw_wm_binding_table; extern const struct brw_tracked_state brw_gs_binding_table; +extern const struct brw_tracked_state brw_tes_binding_table; +extern const struct brw_tracked_state brw_tcs_binding_table; extern const struct brw_tracked_state brw_vs_binding_table; extern const struct brw_tracked_state brw_wm_ubo_surfaces; extern const struct brw_tracked_state brw_wm_abo_surfaces; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 76bf402..90c62f4 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -288,6 +288,8 @@ static const struct brw_tracked_state *gen8_render_atoms[] = &gen7_hw_binding_tables, /* Enable hw-generated binding tables for Broadwell */ &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */ + &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding table */ + &brw_tes_image_surfaces, /* Before tes push/pull constants and binding table */ &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */ &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */ @@ -301,6 +303,12 @@ static const struct brw_tracked_state *gen8_render_atoms[] = &brw_vs_pull_constants, &brw_vs_ubo_surfaces, &brw_vs_abo_surfaces, + &brw_tcs_pull_constants, + &brw_tcs_ubo_surfaces, + &brw_tcs_abo_surfaces, + &brw_tes_pull_constants, + &brw_tes_ubo_surfaces, + &brw_tes_abo_surfaces, &brw_gs_pull_constants, &brw_gs_ubo_surfaces, &brw_gs_abo_surfaces, @@ -310,6 +318,8 @@ static const struct brw_tracked_state *gen8_render_atoms[] = &gen6_renderbuffer_surfaces, &brw_texture_surfaces, &brw_vs_binding_table, + &brw_tcs_binding_table, + &brw_tes_binding_table, &brw_gs_binding_table, &brw_wm_binding_table, @@ -609,6 +619,8 @@ static struct dirty_bit_map brw_bits[] = { DEFINE_BIT(BRW_NEW_BATCH), DEFINE_BIT(BRW_NEW_INDEX_BUFFER), DEFINE_BIT(BRW_NEW_VS_CONSTBUF), + DEFINE_BIT(BRW_NEW_TCS_CONSTBUF), + DEFINE_BIT(BRW_NEW_TES_CONSTBUF), DEFINE_BIT(BRW_NEW_GS_CONSTBUF), DEFINE_BIT(BRW_NEW_PROGRAM_CACHE), DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS), diff --git a/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c b/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c new file mode 100644 index 0000000..115c5abd --- /dev/null +++ b/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c @@ -0,0 +1,144 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "main/mtypes.h" +#include "program/prog_parameter.h" + +#include "brw_context.h" +#include "brw_state.h" + + +/* Creates a new TCS constant buffer reflecting the current TCS program's + * constants, if needed by the TCS program. + * + * Otherwise, constants go through the CURBEs using the brw_constant_buffer + * state atom. + */ +static void +brw_upload_tcs_pull_constants(struct brw_context *brw) +{ + struct brw_stage_state *stage_state = &brw->tcs.base; + + /* BRW_NEW_TESS_CTRL_PROGRAM */ + struct brw_tess_ctrl_program *tcp = + (struct brw_tess_ctrl_program *) brw->tess_ctrl_program; + + if (!tcp) + return; + + /* BRW_NEW_TCS_PROG_DATA */ + const struct brw_stage_prog_data *prog_data = &brw->tcs.prog_data->base.base; + + /* _NEW_PROGRAM_CONSTANTS */ + brw_upload_pull_constants(brw, BRW_NEW_TCS_CONSTBUF, &tcp->program.Base, + stage_state, prog_data); +} + +const struct brw_tracked_state brw_tcs_pull_constants = { + .dirty = { + .mesa = _NEW_PROGRAM_CONSTANTS, + .brw = BRW_NEW_BATCH | + BRW_NEW_TCS_PROG_DATA | + BRW_NEW_TESS_CTRL_PROGRAM, + }, + .emit = brw_upload_tcs_pull_constants, +}; + +static void +brw_upload_tcs_ubo_surfaces(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + + /* _NEW_PROGRAM */ + struct gl_shader_program *prog = + ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; + + if (!prog) + return; + + /* BRW_NEW_TCS_PROG_DATA */ + struct brw_stage_prog_data *prog_data = &brw->tcs.prog_data->base.base; + + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], + &brw->tcs.base, prog_data); +} + +const struct brw_tracked_state brw_tcs_ubo_surfaces = { + .dirty = { + .mesa = _NEW_PROGRAM, + .brw = BRW_NEW_BATCH | + BRW_NEW_TCS_PROG_DATA | + BRW_NEW_UNIFORM_BUFFER, + }, + .emit = brw_upload_tcs_ubo_surfaces, +}; + +static void +brw_upload_tcs_abo_surfaces(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + /* _NEW_PROGRAM */ + struct gl_shader_program *prog = + ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; + + if (prog) { + /* BRW_NEW_TCS_PROG_DATA */ + brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], + &brw->tcs.base, &brw->tcs.prog_data->base.base); + } +} + +const struct brw_tracked_state brw_tcs_abo_surfaces = { + .dirty = { + .mesa = _NEW_PROGRAM, + .brw = BRW_NEW_ATOMIC_BUFFER | + BRW_NEW_BATCH | + BRW_NEW_TCS_PROG_DATA, + }, + .emit = brw_upload_tcs_abo_surfaces, +}; + +static void +brw_upload_tcs_image_surfaces(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + /* BRW_NEW_TESS_CTRL_PROGRAM */ + struct gl_shader_program *prog = + ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; + + if (prog) { + /* BRW_NEW_TCS_PROG_DATA, BRW_NEW_IMAGE_UNITS */ + brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], + &brw->tcs.base, &brw->tcs.prog_data->base.base); + } +} + +const struct brw_tracked_state brw_tcs_image_surfaces = { + .dirty = { + .brw = BRW_NEW_BATCH | + BRW_NEW_TCS_PROG_DATA | + BRW_NEW_IMAGE_UNITS | + BRW_NEW_TESS_CTRL_PROGRAM, + }, + .emit = brw_upload_tcs_image_surfaces, +}; diff --git a/src/mesa/drivers/dri/i965/brw_tes_surface_state.c b/src/mesa/drivers/dri/i965/brw_tes_surface_state.c new file mode 100644 index 0000000..142bd5a --- /dev/null +++ b/src/mesa/drivers/dri/i965/brw_tes_surface_state.c @@ -0,0 +1,144 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "main/mtypes.h" +#include "program/prog_parameter.h" + +#include "brw_context.h" +#include "brw_state.h" + + +/* Creates a new TES constant buffer reflecting the current TES program's + * constants, if needed by the TES program. + * + * Otherwise, constants go through the CURBEs using the brw_constant_buffer + * state atom. + */ +static void +brw_upload_tes_pull_constants(struct brw_context *brw) +{ + struct brw_stage_state *stage_state = &brw->tes.base; + + /* BRW_NEW_TESS_EVAL_PROGRAM */ + struct brw_tess_eval_program *dp = + (struct brw_tess_eval_program *) brw->tess_eval_program; + + if (!dp) + return; + + /* BRW_NEW_TES_PROG_DATA */ + const struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + + /* _NEW_PROGRAM_CONSTANTS */ + brw_upload_pull_constants(brw, BRW_NEW_TES_CONSTBUF, &dp->program.Base, + stage_state, prog_data); +} + +const struct brw_tracked_state brw_tes_pull_constants = { + .dirty = { + .mesa = _NEW_PROGRAM_CONSTANTS, + .brw = BRW_NEW_BATCH | + BRW_NEW_TES_PROG_DATA | + BRW_NEW_TESS_EVAL_PROGRAM, + }, + .emit = brw_upload_tes_pull_constants, +}; + +static void +brw_upload_tes_ubo_surfaces(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + + /* _NEW_PROGRAM */ + struct gl_shader_program *prog = + ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; + + if (!prog) + return; + + /* BRW_NEW_TES_PROG_DATA */ + struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], + &brw->tes.base, prog_data); +} + +const struct brw_tracked_state brw_tes_ubo_surfaces = { + .dirty = { + .mesa = _NEW_PROGRAM, + .brw = BRW_NEW_BATCH | + BRW_NEW_TES_PROG_DATA | + BRW_NEW_UNIFORM_BUFFER, + }, + .emit = brw_upload_tes_ubo_surfaces, +}; + +static void +brw_upload_tes_abo_surfaces(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + /* _NEW_PROGRAM */ + struct gl_shader_program *prog = + ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; + + if (prog) { + /* BRW_NEW_TES_PROG_DATA */ + brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], + &brw->tes.base, &brw->tes.prog_data->base.base); + } +} + +const struct brw_tracked_state brw_tes_abo_surfaces = { + .dirty = { + .mesa = _NEW_PROGRAM, + .brw = BRW_NEW_ATOMIC_BUFFER | + BRW_NEW_BATCH | + BRW_NEW_TES_PROG_DATA, + }, + .emit = brw_upload_tes_abo_surfaces, +}; + +static void +brw_upload_tes_image_surfaces(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + /* BRW_NEW_TESS_EVAL_PROGRAM */ + struct gl_shader_program *prog = + ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; + + if (prog) { + /* BRW_NEW_TES_PROG_DATA, BRW_NEW_IMAGE_UNITS */ + brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], + &brw->tes.base, &brw->tes.prog_data->base.base); + } +} + +const struct brw_tracked_state brw_tes_image_surfaces = { + .dirty = { + .brw = BRW_NEW_BATCH | + BRW_NEW_IMAGE_UNITS | + BRW_NEW_TESS_EVAL_PROGRAM | + BRW_NEW_TES_PROG_DATA, + }, + .emit = brw_upload_tes_image_surfaces, +}; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 909db32..c4ebbf3 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -862,6 +862,12 @@ brw_update_texture_surfaces(struct brw_context *brw) /* BRW_NEW_VERTEX_PROGRAM */ struct gl_program *vs = (struct gl_program *) brw->vertex_program; + /* BRW_NEW_TESS_CTRL_PROGRAM */ + struct gl_program *tcs = (struct gl_program *) brw->tess_ctrl_program; + + /* BRW_NEW_TESS_EVAL_PROGRAM */ + struct gl_program *tes = (struct gl_program *) brw->tess_eval_program; + /* BRW_NEW_GEOMETRY_PROGRAM */ struct gl_program *gs = (struct gl_program *) brw->geometry_program; @@ -873,6 +879,8 @@ brw_update_texture_surfaces(struct brw_context *brw) /* _NEW_TEXTURE */ update_stage_texture_surfaces(brw, vs, &brw->vs.base, false); + update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, false); + update_stage_texture_surfaces(brw, tes, &brw->tes.base, false); update_stage_texture_surfaces(brw, gs, &brw->gs.base, false); update_stage_texture_surfaces(brw, fs, &brw->wm.base, false); update_stage_texture_surfaces(brw, cs, &brw->cs.base, false); @@ -883,6 +891,10 @@ brw_update_texture_surfaces(struct brw_context *brw) if (brw->gen < 8) { if (vs && vs->UsesGather) update_stage_texture_surfaces(brw, vs, &brw->vs.base, true); + if (tcs && tcs->UsesGather) + update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true); + if (tes && tes->UsesGather) + update_stage_texture_surfaces(brw, tes, &brw->tes.base, true); if (gs && gs->UsesGather) update_stage_texture_surfaces(brw, gs, &brw->gs.base, true); if (fs && fs->UsesGather) @@ -903,6 +915,10 @@ const struct brw_tracked_state brw_texture_surfaces = { BRW_NEW_FS_PROG_DATA | BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_GS_PROG_DATA | + BRW_NEW_TESS_CTRL_PROGRAM | + BRW_NEW_TESS_EVAL_PROGRAM | + BRW_NEW_TCS_PROG_DATA | + BRW_NEW_TES_PROG_DATA | BRW_NEW_TEXTURE_BUFFER | BRW_NEW_VERTEX_PROGRAM | BRW_NEW_VS_PROG_DATA, diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c b/src/mesa/drivers/dri/i965/gen8_ds_state.c index 2c0a04d..3dcf3d3 100644 --- a/src/mesa/drivers/dri/i965/gen8_ds_state.c +++ b/src/mesa/drivers/dri/i965/gen8_ds_state.c @@ -50,11 +50,6 @@ gen8_upload_ds_state(struct brw_context *brw) for (int i = 0; i < ds_pkt_len - 1; i++) OUT_BATCH(0); ADVANCE_BATCH(); - - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_DS << 16 | (2 - 2)); - OUT_BATCH(brw->hw_bt_pool.next_offset); - ADVANCE_BATCH(); } const struct brw_tracked_state gen8_ds_state = { diff --git a/src/mesa/drivers/dri/i965/gen8_hs_state.c b/src/mesa/drivers/dri/i965/gen8_hs_state.c index 13f70ef..c7e4c50 100644 --- a/src/mesa/drivers/dri/i965/gen8_hs_state.c +++ b/src/mesa/drivers/dri/i965/gen8_hs_state.c @@ -55,11 +55,6 @@ gen8_upload_hs_state(struct brw_context *brw) OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); - - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_HS << 16 | (2 - 2)); - OUT_BATCH(brw->hw_bt_pool.next_offset); - ADVANCE_BATCH(); } const struct brw_tracked_state gen8_hs_state = { |