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Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_generator.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_generator.cpp73
1 files changed, 40 insertions, 33 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 8bc21df..20107ac 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -46,7 +46,7 @@ check_gen6_math_src_arg(struct brw_reg src)
/* Source swizzles are ignored. */
assert(!src.abs);
assert(!src.negate);
- assert(src.dw1.bits.swizzle == BRW_SWIZZLE_XYZW);
+ assert(src.swizzle == BRW_SWIZZLE_XYZW);
}
static void
@@ -57,7 +57,7 @@ generate_math_gen6(struct brw_codegen *p,
struct brw_reg src1)
{
/* Can't do writemask because math can't be align16. */
- assert(dst.dw1.bits.writemask == WRITEMASK_XYZW);
+ assert(dst.writemask == WRITEMASK_XYZW);
/* Source swizzles are ignored. */
check_gen6_math_src_arg(src0);
if (src1.file == BRW_GENERAL_REGISTER_FILE)
@@ -135,6 +135,10 @@ generate_tex(struct brw_codegen *p,
case SHADER_OPCODE_TXF:
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
break;
+ case SHADER_OPCODE_TXF_CMS_W:
+ assert(devinfo->gen >= 9);
+ msg_type = GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W;
+ break;
case SHADER_OPCODE_TXF_CMS:
if (devinfo->gen >= 7)
msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS;
@@ -260,7 +264,7 @@ generate_tex(struct brw_codegen *p,
: prog_data->base.binding_table.texture_start;
if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
- uint32_t sampler = sampler_index.dw1.ud;
+ uint32_t sampler = sampler_index.ud;
brw_SAMPLE(p,
dst,
@@ -352,7 +356,7 @@ generate_gs_urb_write_allocate(struct brw_codegen *p, vec4_instruction *inst)
/* We pass the temporary passed in src0 as the writeback register */
brw_urb_WRITE(p,
- inst->src[0].fixed_hw_reg, /* dest */
+ inst->src[0], /* dest */
inst->base_mrf, /* starting mrf reg nr */
src,
BRW_URB_WRITE_ALLOCATE_COMPLETE,
@@ -365,8 +369,8 @@ generate_gs_urb_write_allocate(struct brw_codegen *p, vec4_instruction *inst)
brw_push_insn_state(p);
brw_set_default_access_mode(p, BRW_ALIGN_1);
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
- brw_MOV(p, get_element_ud(inst->dst.fixed_hw_reg, 0),
- get_element_ud(inst->src[0].fixed_hw_reg, 0));
+ brw_MOV(p, get_element_ud(inst->dst, 0),
+ get_element_ud(inst->src[0], 0));
brw_pop_insn_state(p);
}
@@ -415,10 +419,10 @@ generate_gs_set_write_offset(struct brw_codegen *p,
assert(p->devinfo->gen >= 7 &&
src1.file == BRW_IMMEDIATE_VALUE &&
src1.type == BRW_REGISTER_TYPE_UD &&
- src1.dw1.ud <= USHRT_MAX);
+ src1.ud <= USHRT_MAX);
if (src0.file == BRW_IMMEDIATE_VALUE) {
brw_MOV(p, suboffset(stride(dst, 2, 2, 1), 3),
- brw_imm_ud(src0.dw1.ud * src1.dw1.ud));
+ brw_imm_ud(src0.ud * src1.ud));
} else {
brw_MUL(p, suboffset(stride(dst, 2, 2, 1), 3), stride(src0, 8, 2, 4),
retype(src1, BRW_REGISTER_TYPE_UW));
@@ -736,7 +740,7 @@ generate_oword_dual_block_offsets(struct brw_codegen *p,
brw_MOV(p, m1_0, index_0);
if (index.file == BRW_IMMEDIATE_VALUE) {
- index_4.dw1.ud += second_vertex_offset;
+ index_4.ud += second_vertex_offset;
brw_MOV(p, m1_4, index_4);
} else {
brw_ADD(p, m1_4, index_4, brw_imm_d(second_vertex_offset));
@@ -891,7 +895,7 @@ generate_pull_constant_load(struct brw_codegen *p,
const struct brw_device_info *devinfo = p->devinfo;
assert(index.file == BRW_IMMEDIATE_VALUE &&
index.type == BRW_REGISTER_TYPE_UD);
- uint32_t surf_index = index.dw1.ud;
+ uint32_t surf_index = index.ud;
struct brw_reg header = brw_vec8_grf(0, 0);
@@ -925,8 +929,6 @@ generate_pull_constant_load(struct brw_codegen *p,
2, /* mlen */
true, /* header_present */
1 /* rlen */);
-
- brw_mark_surface_used(&prog_data->base, surf_index);
}
static void
@@ -945,7 +947,7 @@ generate_get_buffer_size(struct brw_codegen *p,
dst,
inst->base_mrf,
src,
- surf_index.dw1.ud,
+ surf_index.ud,
0,
GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO,
1, /* response length */
@@ -954,7 +956,7 @@ generate_get_buffer_size(struct brw_codegen *p,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
BRW_SAMPLER_RETURN_FORMAT_SINT32);
- brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+ brw_mark_surface_used(&prog_data->base, surf_index.ud);
}
static void
@@ -973,7 +975,7 @@ generate_pull_constant_load_gen7(struct brw_codegen *p,
brw_set_dest(p, insn, dst);
brw_set_src0(p, insn, offset);
brw_set_sampler_message(p, insn,
- surf_index.dw1.ud,
+ surf_index.ud,
0, /* LD message ignores sampler unit */
GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
1, /* rlen */
@@ -982,7 +984,7 @@ generate_pull_constant_load_gen7(struct brw_codegen *p,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
- brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+ brw_mark_surface_used(&prog_data->base, surf_index.ud);
} else {
@@ -1013,10 +1015,6 @@ generate_pull_constant_load_gen7(struct brw_codegen *p,
inst->header_size != 0,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
-
- /* visitor knows more than we do about the surface limit required,
- * so has already done marking.
- */
}
}
@@ -1061,9 +1059,9 @@ generate_code(struct brw_codegen *p,
annotate(p->devinfo, &annotation, cfg, inst, p->next_insn_offset);
for (unsigned int i = 0; i < 3; i++) {
- src[i] = inst->src[i].fixed_hw_reg;
+ src[i] = inst->src[i];
}
- dst = inst->dst.fixed_hw_reg;
+ dst = inst->dst;
brw_set_default_predicate_control(p, inst->predicate);
brw_set_default_predicate_inverse(p, inst->predicate_inverse);
@@ -1243,7 +1241,7 @@ generate_code(struct brw_codegen *p,
break;
case BRW_OPCODE_IF:
- if (inst->src[0].file != BAD_FILE) {
+ if (!inst->src[0].is_null()) {
/* The instruction has an embedded compare (only allowed on gen6) */
assert(devinfo->gen == 6);
gen6_IF(p, inst->conditional_mod, src[0], src[1]);
@@ -1313,6 +1311,7 @@ generate_code(struct brw_codegen *p,
case SHADER_OPCODE_TXD:
case SHADER_OPCODE_TXF:
case SHADER_OPCODE_TXF_CMS:
+ case SHADER_OPCODE_TXF_CMS_W:
case SHADER_OPCODE_TXF_MCS:
case SHADER_OPCODE_TXL:
case SHADER_OPCODE_TXS:
@@ -1416,38 +1415,38 @@ generate_code(struct brw_codegen *p,
case SHADER_OPCODE_UNTYPED_ATOMIC:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
- brw_untyped_atomic(p, dst, src[0], src[1], src[2].dw1.ud, inst->mlen,
+ brw_untyped_atomic(p, dst, src[0], src[1], src[2].ud, inst->mlen,
!inst->dst.is_null());
break;
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_untyped_surface_read(p, dst, src[0], src[1], inst->mlen,
- src[2].dw1.ud);
+ src[2].ud);
break;
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_untyped_surface_write(p, src[0], src[1], inst->mlen,
- src[2].dw1.ud);
+ src[2].ud);
break;
case SHADER_OPCODE_TYPED_ATOMIC:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
- brw_typed_atomic(p, dst, src[0], src[1], src[2].dw1.ud, inst->mlen,
+ brw_typed_atomic(p, dst, src[0], src[1], src[2].ud, inst->mlen,
!inst->dst.is_null());
break;
case SHADER_OPCODE_TYPED_SURFACE_READ:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_typed_surface_read(p, dst, src[0], src[1], inst->mlen,
- src[2].dw1.ud);
+ src[2].ud);
break;
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_typed_surface_write(p, src[0], src[1], inst->mlen,
- src[2].dw1.ud);
+ src[2].ud);
break;
case SHADER_OPCODE_MEMORY_FENCE:
@@ -1495,9 +1494,9 @@ generate_code(struct brw_codegen *p,
*
* where they pack the four bytes from the low and high four DW.
*/
- assert(_mesa_is_pow_two(dst.dw1.bits.writemask) &&
- dst.dw1.bits.writemask != 0);
- unsigned offset = __builtin_ctz(dst.dw1.bits.writemask);
+ assert(_mesa_is_pow_two(dst.writemask) &&
+ dst.writemask != 0);
+ unsigned offset = __builtin_ctz(dst.writemask);
dst.type = BRW_REGISTER_TYPE_UB;
@@ -1549,6 +1548,13 @@ generate_code(struct brw_codegen *p,
brw_set_uip_jip(p);
annotation_finalize(&annotation, p->next_insn_offset);
+#ifndef NDEBUG
+ bool validated = brw_validate_instructions(p, 0, &annotation);
+#else
+ if (unlikely(debug_flag))
+ brw_validate_instructions(p, 0, &annotation);
+#endif
+
int before_size = p->next_insn_offset;
brw_compact_instructions(p, 0, annotation.ann_count, annotation.ann);
int after_size = p->next_insn_offset;
@@ -1566,8 +1572,9 @@ generate_code(struct brw_codegen *p,
dump_assembly(p->store, annotation.ann_count, annotation.ann,
p->devinfo);
- ralloc_free(annotation.ann);
+ ralloc_free(annotation.mem_ctx);
}
+ assert(validated);
compiler->shader_debug_log(log_data,
"%s vec4 shader: %d inst, %d loops, %u cycles, "
generated by cgit v1.1 at 2025-08-04 06:43:27 +0000