diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_gs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_gs_state.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_gs_state.c b/src/mesa/drivers/dri/i965/gen7_gs_state.c index 584f2db..d2ba354 100644 --- a/src/mesa/drivers/dri/i965/gen7_gs_state.c +++ b/src/mesa/drivers/dri/i965/gen7_gs_state.c @@ -80,6 +80,21 @@ upload_gs_state(struct brw_context *brw) gen7_upload_constant_state(brw, stage_state, active, _3DSTATE_CONSTANT_GS); + /** + * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages > + * Geometry > Geometry Shader > State: + * + * "Note: Because of corruption in IVB:GT2, software needs to flush the + * whole fixed function pipeline when the GS enable changes value in + * the 3DSTATE_GS." + * + * The hardware architects have clarified that in this context "flush the + * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS + * Stall" bit set. + */ + if (!brw->is_haswell && brw->gt == 2 && brw->gs.enabled != active) + gen7_emit_cs_stall_flush(brw); + if (active) { BEGIN_BATCH(7); OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); @@ -176,6 +191,7 @@ upload_gs_state(struct brw_context *brw) OUT_BATCH(0); ADVANCE_BATCH(); } + brw->gs.enabled = active; } const struct brw_tracked_state gen7_gs_state = { |