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-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_extensions.c1
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c75
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.h2
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_copy.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_read.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c57
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_format.c6
9 files changed, 54 insertions, 97 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index f148546..cdf1408 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -496,7 +496,7 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
- switch (irb->texformat) {
+ switch (irb->Base.Format) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
clearVal = PACK_COLOR_8888(clear[3], clear[0],
@@ -515,7 +515,7 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
break;
default:
_mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
- irb->texformat);
+ irb->Base.Format);
clearVal = 0;
}
}
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index f5fe543..86dc42c 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -124,7 +124,6 @@ static const struct dri_extension card_extensions[] = {
{ "GL_MESA_pack_invert", NULL },
{ "GL_MESA_ycbcr_texture", NULL },
{ "GL_NV_blend_square", NULL },
- { "GL_NV_point_sprite", GL_NV_point_sprite_functions },
{ "GL_NV_vertex_program", GL_NV_vertex_program_functions },
{ "GL_NV_vertex_program1_1", NULL },
{ "GL_SGIS_generate_mipmap", NULL },
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 5615040..608f75b 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -37,6 +37,7 @@
#include "drivers/common/meta.h"
#include "intel_context.h"
+#include "intel_batchbuffer.h"
#include "intel_buffers.h"
#include "intel_fbo.h"
#include "intel_mipmap_tree.h"
@@ -105,8 +106,8 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
{
struct intel_context *intel = intel_context(ctx);
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
- GLboolean softwareBuffer = GL_FALSE;
int cpp;
+ GLuint pitch;
ASSERT(rb->Name != 0);
@@ -116,18 +117,14 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
case GL_RGB5:
rb->Format = MESA_FORMAT_RGB565;
rb->DataType = GL_UNSIGNED_BYTE;
- irb->texformat = MESA_FORMAT_RGB565;
- cpp = 2;
break;
case GL_RGB:
case GL_RGB8:
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
- rb->Format = MESA_FORMAT_ARGB8888;
+ rb->Format = MESA_FORMAT_XRGB8888;
rb->DataType = GL_UNSIGNED_BYTE;
- irb->texformat = MESA_FORMAT_ARGB8888; /* XXX: Need xrgb8888 */
- cpp = 4;
break;
case GL_RGBA:
case GL_RGBA2:
@@ -139,8 +136,6 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
case GL_RGBA16:
rb->Format = MESA_FORMAT_ARGB8888;
rb->DataType = GL_UNSIGNED_BYTE;
- irb->texformat = MESA_FORMAT_ARGB8888;
- cpp = 4;
break;
case GL_STENCIL_INDEX:
case GL_STENCIL_INDEX1_EXT:
@@ -150,29 +145,21 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
/* alloc a depth+stencil buffer */
rb->Format = MESA_FORMAT_S8_Z24;
rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
- cpp = 4;
- irb->texformat = MESA_FORMAT_S8_Z24;
break;
case GL_DEPTH_COMPONENT16:
rb->Format = MESA_FORMAT_Z16;
rb->DataType = GL_UNSIGNED_SHORT;
- cpp = 2;
- irb->texformat = MESA_FORMAT_Z16;
break;
case GL_DEPTH_COMPONENT:
case GL_DEPTH_COMPONENT24:
case GL_DEPTH_COMPONENT32:
rb->Format = MESA_FORMAT_S8_Z24;
rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
- cpp = 4;
- irb->texformat = MESA_FORMAT_S8_Z24;
break;
case GL_DEPTH_STENCIL_EXT:
case GL_DEPTH24_STENCIL8_EXT:
rb->Format = MESA_FORMAT_S8_Z24;
rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
- cpp = 4;
- irb->texformat = MESA_FORMAT_S8_Z24;
break;
default:
_mesa_problem(ctx,
@@ -181,6 +168,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
}
rb->_BaseFormat = _mesa_base_fbo_format(ctx, internalFormat);
+ cpp = _mesa_get_format_bytes(rb->Format);
intelFlush(ctx);
@@ -190,32 +178,25 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
}
/* allocate new memory region/renderbuffer */
- if (softwareBuffer) {
- return _mesa_soft_renderbuffer_storage(ctx, rb, internalFormat,
- width, height);
- }
- else {
- /* Choose a pitch to match hardware requirements:
- */
- GLuint pitch = ((cpp * width + 63) & ~63) / cpp;
- /* alloc hardware renderbuffer */
- DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width,
- height, pitch);
+ /* Choose a pitch to match hardware requirements:
+ */
+ pitch = ((cpp * width + 63) & ~63) / cpp;
- irb->region = intel_region_alloc(intel, I915_TILING_NONE,
- cpp, width, height, pitch,
- GL_TRUE);
- if (!irb->region)
- return GL_FALSE; /* out of memory? */
+ /* alloc hardware renderbuffer */
+ DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width, height, pitch);
- ASSERT(irb->region->buffer);
+ irb->region = intel_region_alloc(intel, I915_TILING_NONE, cpp,
+ width, height, pitch, GL_TRUE);
+ if (!irb->region)
+ return GL_FALSE; /* out of memory? */
- rb->Width = width;
- rb->Height = height;
+ ASSERT(irb->region->buffer);
- return GL_TRUE;
- }
+ rb->Width = width;
+ rb->Height = height;
+
+ return GL_TRUE;
}
@@ -297,7 +278,6 @@ intel_create_renderbuffer(gl_format format)
GET_CURRENT_CONTEXT(ctx);
struct intel_renderbuffer *irb;
- const GLuint name = 0;
irb = CALLOC_STRUCT(intel_renderbuffer);
if (!irb) {
@@ -305,7 +285,7 @@ intel_create_renderbuffer(gl_format format)
return NULL;
}
- _mesa_init_renderbuffer(&irb->Base, name);
+ _mesa_init_renderbuffer(&irb->Base, 0);
irb->Base.ClassID = INTEL_RB_CLASS;
switch (format) {
@@ -314,10 +294,6 @@ intel_create_renderbuffer(gl_format format)
irb->Base.DataType = GL_UNSIGNED_BYTE;
break;
case MESA_FORMAT_XRGB8888:
- /* XXX this is a hack since XRGB surfaces don't seem to work
- * properly yet. Reading the alpha channel returns 0 instead of 1.
- */
- format = MESA_FORMAT_ARGB8888;
irb->Base._BaseFormat = GL_RGB;
irb->Base.DataType = GL_UNSIGNED_BYTE;
break;
@@ -346,7 +322,6 @@ intel_create_renderbuffer(gl_format format)
irb->Base.Format = format;
irb->Base.InternalFormat = irb->Base._BaseFormat;
- irb->texformat = format;
/* intel-specific methods */
irb->Base.Delete = intel_delete_renderbuffer;
@@ -423,7 +398,6 @@ static GLboolean
intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
struct gl_texture_image *texImage)
{
- irb->texformat = texImage->TexFormat;
gl_format texFormat;
if (texImage->TexFormat == MESA_FORMAT_ARGB8888) {
@@ -591,6 +565,7 @@ static void
intel_finish_render_texture(GLcontext * ctx,
struct gl_renderbuffer_attachment *att)
{
+ struct intel_context *intel = intel_context(ctx);
struct gl_texture_object *tex_obj = att->Texture;
struct gl_texture_image *image =
tex_obj->Image[att->CubeMapFace][att->TextureLevel];
@@ -598,8 +573,14 @@ intel_finish_render_texture(GLcontext * ctx,
/* Flag that this image may now be validated into the object's miptree. */
intel_image->used_as_render_target = GL_FALSE;
-}
+ /* Since we've (probably) rendered to the texture and will (likely) use
+ * it in the texture domain later on in this batchbuffer, flush the
+ * batch. Once again, we wish for a domain tracker in libdrm to cover
+ * usage inside of a batchbuffer like GEM does in the kernel.
+ */
+ intel_batchbuffer_emit_mi_flush(intel->batch);
+}
/**
* Do additional "completeness" testing of a framebuffer object.
@@ -632,7 +613,7 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
continue;
}
- switch (irb->texformat) {
+ switch (irb->Base.Format) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
case MESA_FORMAT_RGB565:
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h
index 50a8a95..fa43077 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.h
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -62,8 +62,6 @@ struct intel_renderbuffer
struct gl_renderbuffer Base;
struct intel_region *region;
- gl_format texformat;
-
GLuint vbl_pending; /**< vblank sequence number of pending flip */
uint8_t *span_cache;
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 9572b67..668697c 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -335,6 +335,8 @@ out:
unpack->BufferObj);
}
+ intel_check_front_buffer_rendering(intel);
+
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
index f058b3c..622aaa2 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
@@ -222,6 +222,8 @@ do_blit_copypixels(GLcontext * ctx,
out:
UNLOCK_HARDWARE(intel);
+ intel_check_front_buffer_rendering(intel);
+
DBG("%s: success\n", __FUNCTION__);
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_read.c b/src/mesa/drivers/dri/intel/intel_pixel_read.c
index 4707500..20424e2 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_read.c
@@ -285,11 +285,11 @@ intelReadPixels(GLcontext * ctx,
intelFlush(ctx);
-#ifdef I915
if (do_blit_readpixels
(ctx, x, y, width, height, format, type, pack, pixels))
return;
+#ifdef I915
if (do_texture_readpixels
(ctx, x, y, width, height, format, type, pack, pixels))
return;
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 2c89a66..d1681e9 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -334,7 +334,7 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#include "intel_spantmp.h"
/* x8r8g8b8 color span and pixel functions */
-#define INTEL_PIXEL_FMT GL_BGRA
+#define INTEL_PIXEL_FMT GL_BGR
#define INTEL_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
#define INTEL_READ_VALUE(offset) pread_xrgb8888(irb, offset)
#define INTEL_WRITE_VALUE(offset, v) pwrite_xrgb8888(irb, offset, v)
@@ -616,7 +616,7 @@ intel_set_span_functions(struct intel_context *intel,
uint32_t tiling = irb->region->tiling;
if (intel->intelScreen->kernel_exec_fencing) {
- switch (irb->texformat) {
+ switch (irb->Base.Format) {
case MESA_FORMAT_RGB565:
intel_gttmap_InitPointers_RGB565(rb);
break;
@@ -630,13 +630,7 @@ intel_set_span_functions(struct intel_context *intel,
intel_gttmap_InitPointers_xRGB8888(rb);
break;
case MESA_FORMAT_ARGB8888:
- if (rb->_BaseFormat == GL_RGB) {
- /* XXX remove this code someday when we enable XRGB surfaces */
- /* 8888 RGBx */
- intel_gttmap_InitPointers_xRGB8888(rb);
- } else {
- intel_gttmap_InitPointers_ARGB8888(rb);
- }
+ intel_gttmap_InitPointers_ARGB8888(rb);
break;
case MESA_FORMAT_Z16:
intel_gttmap_InitDepthPointers_z16(rb);
@@ -659,7 +653,7 @@ intel_set_span_functions(struct intel_context *intel,
default:
_mesa_problem(NULL,
"Unexpected MesaFormat %d in intelSetSpanFunctions",
- irb->texformat);
+ irb->Base.Format);
break;
}
return;
@@ -668,7 +662,7 @@ intel_set_span_functions(struct intel_context *intel,
/* If in GEM mode, we need to do the tile address swizzling ourselves,
* instead of the fence registers handling it.
*/
- switch (irb->texformat) {
+ switch (irb->Base.Format) {
case MESA_FORMAT_RGB565:
switch (tiling) {
case I915_TILING_NONE:
@@ -726,35 +720,18 @@ intel_set_span_functions(struct intel_context *intel,
}
break;
case MESA_FORMAT_ARGB8888:
- if (rb->_BaseFormat == GL_RGB) {
- /* XXX remove this code someday when we enable XRGB surfaces */
- /* 8888 RGBx */
- switch (tiling) {
- case I915_TILING_NONE:
- default:
- intelInitPointers_xRGB8888(rb);
- break;
- case I915_TILING_X:
- intel_XTile_InitPointers_xRGB8888(rb);
- break;
- case I915_TILING_Y:
- intel_YTile_InitPointers_xRGB8888(rb);
- break;
- }
- } else {
- /* 8888 RGBA */
- switch (tiling) {
- case I915_TILING_NONE:
- default:
- intelInitPointers_ARGB8888(rb);
- break;
- case I915_TILING_X:
- intel_XTile_InitPointers_ARGB8888(rb);
- break;
- case I915_TILING_Y:
- intel_YTile_InitPointers_ARGB8888(rb);
- break;
- }
+ /* 8888 RGBA */
+ switch (tiling) {
+ case I915_TILING_NONE:
+ default:
+ intelInitPointers_ARGB8888(rb);
+ break;
+ case I915_TILING_X:
+ intel_XTile_InitPointers_ARGB8888(rb);
+ break;
+ case I915_TILING_Y:
+ intel_YTile_InitPointers_ARGB8888(rb);
+ break;
}
break;
case MESA_FORMAT_Z16:
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index bfa3dba..87efb72 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -50,8 +50,7 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) {
return MESA_FORMAT_RGB565;
}
- /* XXX use MESA_FORMAT_XRGB8888 someday */
- return do32bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_RGB565;
+ return do32bpt ? MESA_FORMAT_XRGB8888 : MESA_FORMAT_RGB565;
case GL_RGBA8:
case GL_RGB10_A2:
@@ -70,8 +69,7 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
- /* XXX use MESA_FORMAT_XRGB8888 someday */
- return MESA_FORMAT_ARGB8888;
+ return MESA_FORMAT_XRGB8888;
case GL_RGB5:
case GL_RGB4:
generated by cgit v1.1 at 2024-06-23 03:08:23 +0000