diff options
Diffstat (limited to 'src/mesa/drivers/dri/intel')
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_batchbuffer.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_blit.c | 59 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_chipset.h | 15 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.c | 22 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.h | 30 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_extensions.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_span.c | 82 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_format.c | 11 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_image.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_subimage.c | 16 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_validate.c | 2 |
12 files changed, 146 insertions, 109 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index 42b4f92..53d6e7c 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -176,8 +176,6 @@ intel_batchbuffer_emit_reloc(struct intel_context *intel, { int ret; - assert(delta < buffer->size); - ret = drm_intel_bo_emit_reloc(intel->batch.bo, 4*intel->batch.used, buffer, delta, read_domains, write_domain); @@ -203,8 +201,6 @@ intel_batchbuffer_emit_reloc_fenced(struct intel_context *intel, { int ret; - assert(delta < buffer->size); - ret = drm_intel_bo_emit_reloc_fence(intel->batch.bo, 4*intel->batch.used, buffer, delta, read_domains, write_domain); diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index e1ab7f1..5aac1f6 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -146,6 +146,17 @@ intelEmitCopyBlit(struct intel_context *intel, src_pitch *= cpp; dst_pitch *= cpp; + /* For big formats (such as floating point), do the copy using 32bpp and + * multiply the coordinates. + */ + if (cpp > 4) { + assert(cpp % 4 == 0); + dst_x *= cpp / 4; + dst_x2 *= cpp / 4; + src_x *= cpp / 4; + cpp = 4; + } + BR13 = br13_for_cpp(cpp) | translate_raster_op(logic_op) << 16; switch (cpp) { @@ -211,7 +222,7 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) { struct intel_context *intel = intel_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; - GLuint clear_depth; + GLuint clear_depth_value, clear_depth_mask; GLboolean all; GLint cx, cy, cw, ch; GLbitfield fail_mask = 0; @@ -220,12 +231,15 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) /* * Compute values for clearing the buffers. */ - clear_depth = 0; + clear_depth_value = 0; + clear_depth_mask = 0; if (mask & BUFFER_BIT_DEPTH) { - clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); + clear_depth_value = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); + clear_depth_mask = XY_BLT_WRITE_RGB; } if (mask & BUFFER_BIT_STENCIL) { - clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; + clear_depth_value |= (ctx->Stencil.Clear & 0xff) << 24; + clear_depth_mask |= XY_BLT_WRITE_ALPHA; } cx = fb->_Xmin; @@ -239,12 +253,13 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) if (cw == 0 || ch == 0) return 0; - GLuint buf; all = (cw == fb->Width && ch == fb->Height); /* Loop over all renderbuffers */ - for (buf = 0; buf < BUFFER_COUNT && mask; buf++) { - const GLbitfield bufBit = 1 << buf; + mask &= (1 << BUFFER_COUNT) - 1; + while (mask) { + GLuint buf = _mesa_ffs(mask) - 1; + GLboolean is_depth_stencil = buf == BUFFER_DEPTH || buf == BUFFER_STENCIL; struct intel_renderbuffer *irb; drm_intel_bo *write_buffer; int x1, y1, x2, y2; @@ -253,11 +268,15 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) int pitch, cpp; drm_intel_bo *aper_array[2]; - if (!(mask & bufBit)) - continue; + mask &= ~(1 << buf); - /* OK, clear this renderbuffer */ irb = intel_get_renderbuffer(fb, buf); + if (irb == NULL || irb->region == NULL || irb->region->buffer == NULL) { + fail_mask |= 1 << buf; + continue; + } + + /* OK, clear this renderbuffer */ write_buffer = intel_region_buffer(intel, irb->region, all ? INTEL_WRITE_FULL : INTEL_WRITE_PART); @@ -274,16 +293,13 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) irb->region->buffer, (pitch * cpp), x1, y1, x2 - x1, y2 - y1); - BR13 = br13_for_cpp(cpp) | 0xf0 << 16; + BR13 = 0xf0 << 16; CMD = XY_COLOR_BLT_CMD; /* Setup the blit command */ if (cpp == 4) { - if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { - if (mask & BUFFER_BIT_DEPTH) - CMD |= XY_BLT_WRITE_RGB; - if (mask & BUFFER_BIT_STENCIL) - CMD |= XY_BLT_WRITE_ALPHA; + if (is_depth_stencil) { + CMD |= clear_depth_mask; } else { /* clearing RGBA */ CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; @@ -300,8 +316,8 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) #endif BR13 |= (pitch * cpp); - if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { - clear_val = clear_depth; + if (is_depth_stencil) { + clear_val = clear_depth_value; } else { uint8_t clear[4]; GLclampf *color = ctx->Color.ClearColor; @@ -333,12 +349,13 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) clear[3], clear[3]); break; default: - fail_mask |= bufBit; - mask &= ~bufBit; + fail_mask |= 1 << buf; continue; } } + BR13 |= br13_for_cpp(cpp); + assert(x1 < x2); assert(y1 < y2); @@ -367,8 +384,6 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL); - else - mask &= ~bufBit; /* turn off bit, for faster loop exit */ } return fail_mask; diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h index 4ff9140..a3f40ef 100644 --- a/src/mesa/drivers/dri/intel/intel_chipset.h +++ b/src/mesa/drivers/dri/intel/intel_chipset.h @@ -125,18 +125,17 @@ /* Compat macro for intel_decode.c */ #define IS_IRONLAKE(devid) IS_GEN5(devid) -#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ - devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ - devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ - devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ - devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ - devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ - devid == PCI_CHIP_SANDYBRIDGE_S) - #define IS_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ devid == PCI_CHIP_SANDYBRIDGE_S) +#define IS_GT2(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ + devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS) + +#define IS_GEN6(devid) (IS_GT1(devid) || IS_GT2(devid)) + #define IS_965(devid) (IS_GEN4(devid) || \ IS_G4X(devid) || \ IS_GEN5(devid) || \ diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index c2e2a98..02e7f77 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -62,10 +62,6 @@ int INTEL_DEBUG = (0); #endif -#define DRIVER_DATE "20100330 DEVELOPMENT" -#define DRIVER_DATE_GEM "GEM " DRIVER_DATE - - static const GLubyte * intelGetString(struct gl_context * ctx, GLenum name) { @@ -182,7 +178,7 @@ intelGetString(struct gl_context * ctx, GLenum name) break; } - (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0); + (void) driGetRendererString(buffer, chipset, 0); return (GLubyte *) buffer; default: @@ -728,8 +724,13 @@ intelInitContext(struct intel_context *intel, ctx->TextureFormatSupported[MESA_FORMAT_RG88] = GL_TRUE; ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = GL_TRUE; + /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */ ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = GL_TRUE; ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = GL_TRUE; /* GL_EXT_texture_sRGB */ ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = GL_TRUE; @@ -742,8 +743,19 @@ intelInitContext(struct intel_context *intel, ctx->TextureFormatSupported[MESA_FORMAT_SL8] = GL_TRUE; ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = GL_TRUE; } + +#ifdef TEXTURE_FLOAT_ENABLED + ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = GL_TRUE; + ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = GL_TRUE; #endif +#endif /* !I915 */ + driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915"); if (intel->gen < 4) diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 772b2fb..c591193 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -295,9 +295,33 @@ extern char *__progname; #define SUBPIXEL_Y 0.125 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) -#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1)) -#define ROUND_DOWN_TO(value, alignment) (ALIGN(value - alignment - 1, \ - alignment)) + +/** + * Align a value up to an alignment value + * + * If \c value is not already aligned to the requested alignment value, it + * will be rounded up. + * + * \param value Value to be rounded + * \param alignment Alignment value to be used. This must be a power of two. + * + * \sa ROUND_DOWN_TO() + */ +#define ALIGN(value, alignment) (((value) + alignment - 1) & ~(alignment - 1)) + +/** + * Align a value down to an alignment value + * + * If \c value is not already aligned to the requested alignment value, it + * will be rounded down. + * + * \param value Value to be rounded + * \param alignment Alignment value to be used. This must be a power of two. + * + * \sa ALIGN() + */ +#define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1)) + #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0) static INLINE uint32_t diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index febc1d4..e107534 100644 --- a/src/mesa/drivers/dri/intel/intel_extensions.c +++ b/src/mesa/drivers/dri/intel/intel_extensions.c @@ -160,6 +160,7 @@ static const struct dri_extension i915_extensions[] = { /** i965-only extensions */ static const struct dri_extension brw_extensions[] = { + { "GL_ARB_color_buffer_float", NULL }, { "GL_ARB_depth_clamp", NULL }, { "GL_ARB_depth_texture", NULL }, { "GL_ARB_fragment_coord_conventions", NULL }, @@ -171,6 +172,9 @@ static const struct dri_extension brw_extensions[] = { { "GL_ARB_point_sprite", NULL }, { "GL_ARB_seamless_cube_map", NULL }, { "GL_ARB_shadow", NULL }, +#ifdef TEXTURE_FLOAT_ENABLED + { "GL_ARB_texture_float", NULL }, +#endif { "GL_MESA_texture_signed_rgba", NULL }, { "GL_ARB_texture_non_power_of_two", NULL }, { "GL_ARB_texture_rg", NULL }, diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 8b57eb1..ad2468a 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -385,7 +385,7 @@ intel_update_wrapper(struct gl_context *ctx, struct intel_renderbuffer *irb, irb->Base.Format = texImage->TexFormat; irb->Base.DataType = intel_mesa_format_to_rb_datatype(texImage->TexFormat); irb->Base.InternalFormat = texImage->InternalFormat; - irb->Base._BaseFormat = _mesa_base_fbo_format(ctx, irb->Base.InternalFormat); + irb->Base._BaseFormat = _mesa_base_tex_format(ctx, irb->Base.InternalFormat); irb->Base.Width = texImage->Width; irb->Base.Height = texImage->Height; diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index 1f41518..16bce20 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -30,6 +30,7 @@ #include "main/macros.h" #include "main/mtypes.h" #include "main/colormac.h" +#include "main/renderbuffer.h" #include "intel_buffers.h" #include "intel_fbo.h" @@ -114,57 +115,6 @@ intel_set_span_functions(struct intel_context *intel, #define TAG2(x,y) intel_##x##y##_A8 #include "spantmp2.h" -#define SPANTMP_MESA_FMT MESA_FORMAT_R8 -#define TAG(x) intel_##x##_R8 -#define TAG2(x,y) intel_##x##y##_R8 -#include "spantmp2.h" - -#define SPANTMP_MESA_FMT MESA_FORMAT_RG88 -#define TAG(x) intel_##x##_RG88 -#define TAG2(x,y) intel_##x##y##_RG88 -#include "spantmp2.h" - -#define SPANTMP_MESA_FMT MESA_FORMAT_R16 -#define TAG(x) intel_##x##_R16 -#define TAG2(x,y) intel_##x##y##_R16 -#include "spantmp2.h" - -#define SPANTMP_MESA_FMT MESA_FORMAT_RG1616 -#define TAG(x) intel_##x##_RG1616 -#define TAG2(x,y) intel_##x##y##_RG1616 -#include "spantmp2.h" - -#define LOCAL_DEPTH_VARS \ - struct intel_renderbuffer *irb = intel_renderbuffer(rb); \ - const GLint yScale = rb->Name ? 1 : -1; \ - const GLint yBias = rb->Name ? 0 : rb->Height - 1; \ - int minx = 0, miny = 0; \ - int maxx = rb->Width; \ - int maxy = rb->Height; \ - int pitch = irb->region->pitch * irb->region->cpp; \ - void *buf = irb->region->buffer->virtual; \ - (void)buf; (void)pitch; /* unused for non-gttmap. */ \ - -#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS - -/* z16 depthbuffer functions. */ -#define VALUE_TYPE GLushort -#define WRITE_DEPTH(_x, _y, d) \ - (*(uint16_t *)(irb->region->buffer->virtual + NO_TILE(_x, _y)) = d) -#define READ_DEPTH(d, _x, _y) \ - d = *(uint16_t *)(irb->region->buffer->virtual + NO_TILE(_x, _y)) -#define TAG(x) intel_##x##_z16 -#include "depthtmp.h" - -/* z24_s8 and z24_x8 depthbuffer functions. */ -#define VALUE_TYPE GLuint -#define WRITE_DEPTH(_x, _y, d) \ - (*(uint32_t *)(irb->region->buffer->virtual + NO_TILE(_x, _y)) = d) -#define READ_DEPTH(d, _x, _y) \ - d = *(uint32_t *)(irb->region->buffer->virtual + NO_TILE(_x, _y)) -#define TAG(x) intel_##x##_z24_s8 -#include "depthtmp.h" - void intel_renderbuffer_map(struct intel_context *intel, struct gl_renderbuffer *rb) { @@ -175,6 +125,15 @@ intel_renderbuffer_map(struct intel_context *intel, struct gl_renderbuffer *rb) drm_intel_gem_bo_map_gtt(irb->region->buffer); + rb->Data = irb->region->buffer->virtual; + rb->RowStride = irb->region->pitch; + + /* Flip orientation if it's the window system buffer */ + if (!rb->Name) { + rb->Data += rb->RowStride * (irb->region->height - 1) * irb->region->cpp; + rb->RowStride = -rb->RowStride; + } + intel_set_span_functions(intel, rb); } @@ -191,6 +150,8 @@ intel_renderbuffer_unmap(struct intel_context *intel, rb->GetRow = NULL; rb->PutRow = NULL; + rb->Data = NULL; + rb->RowStride = 0; } /** @@ -371,13 +332,18 @@ static span_init_func intel_span_init_funcs[MESA_FORMAT_COUNT] = [MESA_FORMAT_XRGB8888] = intel_InitPointers_xRGB8888, [MESA_FORMAT_ARGB8888] = intel_InitPointers_ARGB8888, [MESA_FORMAT_SARGB8] = intel_InitPointers_ARGB8888, - [MESA_FORMAT_Z16] = intel_InitDepthPointers_z16, - [MESA_FORMAT_X8_Z24] = intel_InitDepthPointers_z24_s8, - [MESA_FORMAT_S8_Z24] = intel_InitDepthPointers_z24_s8, - [MESA_FORMAT_R8] = intel_InitPointers_R8, - [MESA_FORMAT_RG88] = intel_InitPointers_RG88, - [MESA_FORMAT_R16] = intel_InitPointers_R16, - [MESA_FORMAT_RG1616] = intel_InitPointers_RG1616, + [MESA_FORMAT_Z16] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_X8_Z24] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_S8_Z24] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_R8] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_RG88] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_R16] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_RG1616] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_RGBA_FLOAT32] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_RG_FLOAT32] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_R_FLOAT32] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_INTENSITY_FLOAT32] = _mesa_set_renderbuffer_accessors, + [MESA_FORMAT_LUMINANCE_FLOAT32] = _mesa_set_renderbuffer_accessors, }; bool diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c index 87745bc..befa615 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_format.c +++ b/src/mesa/drivers/dri/intel/intel_tex_format.c @@ -16,6 +16,8 @@ intel_mesa_format_to_rb_datatype(gl_format format) case MESA_FORMAT_R8: case MESA_FORMAT_RG88: case MESA_FORMAT_A8: + case MESA_FORMAT_I8: + case MESA_FORMAT_L8: case MESA_FORMAT_AL88: case MESA_FORMAT_RGB565: case MESA_FORMAT_ARGB1555: @@ -29,6 +31,15 @@ intel_mesa_format_to_rb_datatype(gl_format format) return GL_UNSIGNED_INT; case MESA_FORMAT_S8_Z24: return GL_UNSIGNED_INT_24_8_EXT; + case MESA_FORMAT_RGBA_FLOAT32: + case MESA_FORMAT_RG_FLOAT32: + case MESA_FORMAT_R_FLOAT32: + case MESA_FORMAT_INTENSITY_FLOAT32: + case MESA_FORMAT_LUMINANCE_FLOAT32: + case MESA_FORMAT_ALPHA_FLOAT32: + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32: + return GL_FLOAT; + default: _mesa_problem(NULL, "unexpected MESA_FORMAT for renderbuffer"); return GL_UNSIGNED_BYTE; diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c index 906f8a6..775fd10 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_image.c +++ b/src/mesa/drivers/dri/intel/intel_tex_image.c @@ -112,8 +112,8 @@ intel_miptree_create_for_teximage(struct intel_context *intel, * resizable buffers, or require that buffers implement lazy * pagetable arrangements. */ - if ((intelObj->base.MinFilter == GL_NEAREST || - intelObj->base.MinFilter == GL_LINEAR) && + if ((intelObj->base.Sampler.MinFilter == GL_NEAREST || + intelObj->base.Sampler.MinFilter == GL_LINEAR) && intelImage->level == firstLevel && (intel->gen < 4 || firstLevel == 0)) { lastLevel = firstLevel; @@ -370,8 +370,10 @@ intelTexImage(struct gl_context * ctx, * whole object since our level didn't fit what was there * before, and any lower levels would fit into our miptree. */ - if (intelImage->mt) + if (intelImage->mt) { + intel_miptree_release(intel, &intelObj->mt); intel_miptree_reference(&intelObj->mt, intelImage->mt); + } } /* PBO fastpaths: diff --git a/src/mesa/drivers/dri/intel/intel_tex_subimage.c b/src/mesa/drivers/dri/intel/intel_tex_subimage.c index d0f8294..8b43c40 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/intel/intel_tex_subimage.c @@ -90,10 +90,17 @@ intelTexSubimage(struct gl_context * ctx, intel->gen < 6 && target == GL_TEXTURE_2D && drm_intel_bo_busy(dst_bo)) { - dstRowStride = width * intelImage->mt->cpp; - temp_bo = drm_intel_bo_alloc(intel->bufmgr, "subimage blit bo", - dstRowStride * height, 0); - if (!temp_bo) + unsigned long pitch; + uint32_t tiling_mode = I915_TILING_NONE; + + temp_bo = drm_intel_bo_alloc_tiled(intel->bufmgr, + "subimage blit bo", + width, height, + intelImage->mt->cpp, + &tiling_mode, + &pitch, + 0); + if (temp_bo == NULL) return; if (drm_intel_gem_bo_map_gtt(temp_bo)) { @@ -103,6 +110,7 @@ intelTexSubimage(struct gl_context * ctx, texImage->Data = temp_bo->virtual; texImage->ImageOffsets[0] = 0; + dstRowStride = pitch; intel_miptree_get_image_offset(intelImage->mt, level, intelImage->face, 0, diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c index a11b07e..5e705c9 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_validate.c +++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c @@ -18,7 +18,7 @@ intel_update_max_level(struct intel_context *intel, { struct gl_texture_object *tObj = &intelObj->base; - if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) { + if (tObj->Sampler.MinFilter == GL_NEAREST || tObj->Sampler.MinFilter == GL_LINEAR) { intelObj->_MaxLevel = tObj->BaseLevel; } else { intelObj->_MaxLevel = tObj->_MaxLevel; |