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* Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2017-01-091-1/+1
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| * radv: fix another regression since shadow fixes.Dave Airlie2016-12-141-1/+1
| | | | | | | | | | | | | | | | | | This fixes: dEQP-VK.glsl.texture_gather.basic.2d.depth32f.* Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 8033f78f94c7c6349e1c6a4d63fe3accb34b36f1)
* | Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2016-12-071-3/+6
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| * radv/ac/llvm: shadow samplers only return one value.Dave Airlie2016-11-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The intrinsic engine asserts in llvm due to this. Reported-by: Christoph Haag <haagch+mesadev@frickel.club> Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit b56b54cbf1d8e70c87a434da5350d11533e5fed8) Squashed with commit: radv/ac/llvm: fix regression with shadow samplers fix This fixes b56b54cbf1d8e70c87a434da5350d11533e5fed8: radv/ac/llvm: shadow samplers only return one value It makes sure we only do that for shadow sampling, as opposed to sizing requests. Signed-off-by: Dave Airlie <airlied@redhat.com> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit b2e217369e1ca4bf9d7741721559a4506b1f0ce8) Squashed with commit: radv: brown-paper bag for a forgotten else. This fixes the fix: radv/ac/llvm: fix regression with shadow samplers fix Signed-off-by: Dave Airlie <airlied@redhat.com> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 020978af12ef6d598bc5efeae3704c0eb8cdafd2)
| * radv: fix texel fetch offset with 2d arrays.Dave Airlie2016-11-281-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The code didn't limit the offsets to the number supplied, so if we expected 3 but only got 2 we were accessing undefined memory. This fixes random failures in: dEQP-VK.glsl.texture_functions.texelfetchoffset.sampler2darray_* Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit bb8ac183404541ca8dee31563709d5aca8de0e73)
* | Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2016-11-251-4/+15
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| * radv: spir-v allows texture size query with and without lod.Dave Airlie2016-11-241-1/+4
| | | | | | | | | | | | | | | | | | | | | | The translation to llvm was failing here due to required lod. This fixes some new SteamVR shaders. Cc: "13.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit b1340fd708bb873617b8a529ac45cbc9507bd6c4)
| * ac/nir/llvm: fix channel in texture gather lowering code.Dave Airlie2016-11-241-1/+1
| | | | | | | | | | | | | | | | | | This fixes a number of CTS tests like: dEQP-VK.glsl.texture_gather.basic.2d.rgba8ui.size_npot.clamp_to_edge_repeat Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 713522fb8d4366d29be18edc3d5f33faba1cb7c4)
| * radv: fix texturesamples to handle single sample caseDave Airlie2016-11-231-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | We can only read the valid samples if this is an MSAA texture, which means the type field must be 0x14 or 0x15. This fixes: dEQP-VK.glsl.texture_functions.query.texturesamples.* Cc: "13.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 2de85eb97ab2ef45ec23f694a566cd0ec8192885)
* | Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2016-11-161-3/+26
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| * ac/nir: add support for discard_if intrinsic (v2)Dave Airlie2016-11-091-0/+21
| | | | | | | | | | | | | | | | | | | | | | We are going to start lowering to this in NIR code, so prepare radv for it. v2: handle conversion to kilp properly (nha) Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit dd77faeca2819fc78a72f71ca9b996c209378cde)
| * radv: emit correct last export when Z/stencil export is enabledDave Airlie2016-11-091-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was getting a random GPU hang in the renderpass simple tests, it turns out sometimes radv emitted the wrong thing "last". This fixes the logic to emit Z/stencil last if they occur, and not mark a color output as last. Also this relies on the Z/STENCIL being the first two fragment outputs, which they are so yay. Fixes: dEQP-VK.renderpass.simple.color_depth (random hangs) Cc: "13.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit bafc75b4370bfbec0c91ff6bb4d4972fb37bb22a)
* | gallium/radeon: define some prototypes of LLVMInitialize functionsChih-Wei Huang2016-11-011-0/+51
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* radv/ac/llvm: trim texture return valuesDave Airlie2016-10-271-1/+2
| | | | | | | | | | | | | | The intrinsic engine asserts in llvm due to this, as we put a vec4 into a vec1, and the next instruction isn't expecting it. So trim the vector at the end before inserting it. Reported-by: Christoph Haag <haagch+mesadev@frickel.club> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit d548fa882b865b8e5052954b872e392312c38ab8)
* radv: use emit_icmp for samples_identicalDave Airlie2016-10-241-1/+1
| | | | | | | | | | On a debug llvm build we'd assert on the next compare when the return from samples_identical was i1 instead of i32. Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit d842546ad1ebdb4825f0cbca2d68a56139d88e2a)
* radv: fix samples_identical return value.Dave Airlie2016-10-191-0/+3
| | | | | | | This was returning an inversion, so not doing as it should have. We need to compare the fmask value with 0, and return the result from that.
* radv: fix fmask ptr issueDave Airlie2016-10-191-4/+18
| | | | We were using the wrong descriptor in the fmask picking code.
* radv: start using defines for the user sgpr offsetsDave Airlie2016-10-192-2/+22
| | | | | | | | This adds some comments and adds defines for the user sgprs, so that we can move them around easier later and not have to change/revalidate every one of these. Signed-off-by: Dave Airlie <airlied@redhat.com>
* radv: Use new image load/store intrinsic signatures v2Tom Stellard2016-10-141-25/+108
| | | | | | | | | | These were changed in LLVM r284024. v2: - Only use float types for vdata of llvm.amdgcn.image.store. LLVM doesn't support integer types for this intrinsic. Signed-off-by: Dave Airlie <airlied@redhat.com>
* radv: Fix incorrect commentTom Stellard2016-10-141-2/+2
| | | | Signed-off-by: Dave Airlie <airlied@redhat.com>
* radv: add initial non-conformant radv vulkan driverDave Airlie2016-10-079-0/+5324
| | | | | | | | | | | | | | | | | | | | | | | This squashes all the radv development up until now into one for merging. History can be found: https://github.com/airlied/mesa/tree/semi-interesting This requires llvm 3.9 and is in no way considered a conformant vulkan implementation. It can run a number of vulkan applications, and supports all GPUs using the amdgpu kernel driver. Thanks to Intel for providing anv and spirv->nir, and Emil Velikov for reviewing build integration. Parts of this are: Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> Authors: Bas Nieuwenhuizen and Dave Airlie Signed-off-by: Dave Airlie <airlied@redhat.com>
* radeonsi/compute: Use the HSA abi for non-TGSI compute shaders v3Tom Stellard2016-09-161-0/+534
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch switches non-TGSI compute shaders over to using the HSA ABI described here: https://github.com/RadeonOpenCompute/ROCm-Docs/blob/master/AMDGPU-ABI.md The HSA ABI provides a much cleaner interface for compute shaders and allows us to share more code in the compiler with the HSA stack. The main changes in this patch are: - We now pass the scratch buffer resource into the shader via user sgprs rather than using relocations. - Grid/Block sizes are now passed to the shader via the dispatch packet rather than at the beginning of the kernel arguments. Typically for HSA, the CP firmware will create the dispatch packet and set up the user sgprs automatically. However, in Mesa we let the driver do this work. The main reason for this is that I haven't researched how to get the CP to do all these things, and I'm not sure if it is supported for all GPUs. v2: - Add comments explaining why we are setting certain bits of the scratch resource descriptor. v3: - Use amdgcn-mesa-mesa3d triple instead of amdgcn--mesa3d. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* amd/addrlib: move addrlib from amdgpu winsys to common codeDave Airlie2016-09-061-0/+173
| | | | | Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeon: move radeon_family/chip_class defintions to commonDave Airlie2016-09-061-0/+111
| | | | | | | This just moves these to a common header file. Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: move sid.h/r600d_common.h to a common place.Dave Airlie2016-09-062-0/+9309
Step one to merging radv would be to move some files around. This only adds the include path to r600/radeonsi, because later we want to avoid having to add it to the generic target paths. Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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