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* tgsi: fix the src type of TGSI_OPCODE_MEMBARMarek Olšák2016-12-141-0/+1
| | | | | | | | It's a literal integer. The next commit will need this. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 16ba04d6deea4f89cbaec00a001d5c2ac841692b)
* gallium: add opcode and types for 64-bit integers. (v3)Dave Airlie2016-09-211-10/+82
| | | | | | | | | | | | | | | | | This just adds the basic support for 64-bit opcodes, and the new types. v2: add conversion opcodes. add documentation. v3: - make docs more consistent - change TGSI_OPCODE_I2U64 to TGSI_OPCODE_U2I64 Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2) Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium: add VOTE_* opcodes to implement GL_ARB_shader_group_voteIlia Mirkin2016-06-061-0/+3
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* tgsi: s/Elements/ARRAY_SIZE/Brian Paul2016-04-271-1/+1
| | | | Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*Marek Olšák2016-04-221-5/+5
| | | | Acked-by: Jose Fonseca <jfonseca@vmware.com>
* tgsi: set correct output mode for RESQNicolai Hähnle2016-03-091-1/+1
| | | | | Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* tgsi: set correct src type for UP2HMarek Olšák2016-02-021-0/+1
| | | | Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* tgsi: add MEMBAR opcode to handle memoryBarrier* GLSL intrinsicsIlia Mirkin2016-01-291-1/+1
| | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1) v1 -> v2: add defines for the various bits Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallium: add a RESQ opcode to query info about a resourceIlia Mirkin2016-01-081-1/+1
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* tgsi: add a is_store propertyIlia Mirkin2016-01-081-223/+223
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* tgsi: update PK2H/UP2H channel behavior infoIlia Mirkin2016-01-031-8/+8
| | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* tgsi: add a TXQS opcode to retrieve the number of texture samplesIlia Mirkin2015-09-131-1/+2
| | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
* gallium: replace INLINE with inlineIlia Mirkin2015-07-211-1/+1
| | | | | | | | | | | | | | | | Generated by running: git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g' git grep -l INLINE src/mesa/state_tracker/ | xargs sed -i 's/\bINLINE\b/inline/g' git checkout src/gallium/state_trackers/clover/Doxyfile and manual edits to src/gallium/include/pipe/p_compiler.h src/gallium/README.portability to remove mentions of the inline define. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Acked-by: Marek Olšák <marek.olsak@amd.com>
* tgsi: add DFMA to the opcode infer functions.Dave Airlie2015-07-111-0/+1
| | | | Signed-off-by: Dave Airlie <airlied@redhat.com>
* tgsi: add infer support for double opcodes.Dave Airlie2015-07-011-0/+37
| | | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* gallium: rename TGSI tessellation processor types to match pipe shader namesMarek Olšák2015-05-261-2/+2
| | | | | | I forgot to do this when pushing the interface changes. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add tessellation shader typesIlia Mirkin2015-05-161-0/+4
| | | | | | | | v2: Marek: rename shader types Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
* tgsi: handle bitwise opcodes in tgsi_opcode_infer_type (v2)Marek Olšák2015-03-161-0/+8
| | | | | | v2: set the same types as the destination type in tgsi_exec Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add FMA and DFMA opcodes (v3)Marek Olšák2015-03-161-2/+2
| | | | | | | | | Needed by ARB_gpu_shader5. v2: select DMAD for FMA with double precision v3: add and select DFMA Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add some more double opcodes to avoid unnecessary loweringIlia Mirkin2015-02-191-0/+5
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* gallium: add double opcodes and TGSI execution (v4.2)Dave Airlie2015-02-201-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for a set of double opcodes to TGSI. It is an update of work done originally by Michal Krol on the gallium-double-opcodes branch. The opcodes have a hint where they came from in the header file. v2: add unsigned/int <-> double v2.1: update docs. v3: add DRSQ (Glenn), fix review comments (Glenn). v4: drop DDIV v4.1: cleanups, fix some docs bugs, (Ilia) rework store_dest and fetch_source fns. (Ilia) 4.2: fixup float comparisons (Ilia) This is based on code by Michael Krol <michal@vmware.com> Roland and Glenn also reviewed earlier versions. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Dave Airlie <airlied@redhat.com>
* gallium: Drop the unused CND opcode.Eric Anholt2014-11-241-1/+1
| | | | | | Nothing in the tree generates it. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Drop unused BRA opcode.Eric Anholt2014-11-241-1/+1
| | | | | | Never generated, and implemented in only nvfx vertprog. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Drop the unused SFL/STR opcodes.Eric Anholt2014-11-241-2/+2
| | | | | | Nothing generated them. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Drop the unused RFL opcode.Eric Anholt2014-11-241-1/+1
| | | | Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Drop unused X2D opcode.Eric Anholt2014-11-241-1/+1
| | | | | | Nothing in the tree generates it. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Drop the unused ARA opcode.Eric Anholt2014-11-241-1/+1
| | | | | | | | Nothing in the tree generated it. v2: Only drop ARA, not ARR as well. Reviewed-by: Jose Fonseca <jfonseca@vmware.com> (v2)
* gallium: Drop the unused RCC opcode.Eric Anholt2014-11-241-1/+1
| | | | | | Nothing in the tree generated it. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Drop the NRM and NRM4 opcodes.Eric Anholt2014-11-241-2/+2
| | | | | | | They weren't generated in tree, and as far as I know all hardware had to lower it to a DP, RSQ, MUL. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: add opcodes/cap for fine derivative supportIlia Mirkin2014-08-141-2/+2
| | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1) Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1) v2: Reuse opcode gaps as suggested by Marek
* gallium: add INTERP_* opcodes to support interpolateAt*Ilia Mirkin2014-07-091-0/+4
| | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallium: add vertex stream argument to EMIT/ENDPRIMIlia Mirkin2014-07-011-2/+2
| | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallium: add new opcodes for ARB_gs5 bit manipulation supportIlia Mirkin2014-04-281-0/+8
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallium: add support for LODQ opcodes.Dave Airlie2014-04-071-0/+1
| | | | | | | | | This opcode provide support for GL_ARB_texture_query_lod, Signed-off-by: Dave Airlie <airlied@redhat.com> [imirkin: rebase, docs update] Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium: add texture gather support to gallium (v3)Dave Airlie2014-02-251-0/+1
| | | | | | | | | | | | | | | | | | | | | This adds support to gallium for a TG4 instruction, and two CAPs. The first CAP is required for GL_ARB_texture_gather. The second CAP is required to expose GL_ARB_gpu_shader5. However so far we haven't found any hardware that natively exposes the textureGatherOffsets feature from GL, so just lower it for now. If hardware appears for this we can add another CAP to allow TG4 to take 4 offsets. v2: add component selection src and a cap to say hw can do it. (st can use to help control GL_ARB_gpu_shader5/GLSL 4.00). Add docs. v3: rename to SM5, add docs. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the old copyright name is creating unnecessary confusion, hence this change. This was the sed script I used: $ cat tg2vmw.sed # Run as: # # git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed # # Rename copyrights s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./ s/TUNGSTEN GRAPHICS/VMWARE/g # Rename emails s/alanh@tungstengraphics.com/alanh@vmware.com/ s/jens@tungstengraphics.com/jowen@vmware.com/g s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/ s/jrfonseca\?@tungstengraphics.com/jfonseca@vmware.com/g s/keithw\?@tungstengraphics.com/keithw@vmware.com/g s/michel@tungstengraphics.com/daenzer@vmware.com/g s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/ s/zack@tungstengraphics.com/zackr@vmware.com/ # Remove dead links s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g # C string src/gallium/state_trackers/vega/api_misc.c s/"Tungsten Graphics, Inc"/"VMware, Inc"/ Reviewed-by: Brian Paul <brianp@vmware.com>
* gallium: Add support for 32x32 muls with 64 bit resultsZack Rusin2013-10-091-0/+6
| | | | | | | | | | | | | | The code introduces two new 32bit integer multiplication opcodes which can be used to produce correct 64 bit results. GLSL, OpenCL and D3D10+ require them. We use two seperate opcodes, because they match the behavior of GLSL and OpenCL, are a lot easier to add than a single opcode with multiple destinations and because there's not much (any) difference wrt code-generation. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: José Fonseca <jfonseca@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
* tgsi: implement new float comparison instructions returning integer masksRoland Scheidegger2013-08-131-4/+12
| | | | | | | | Also while here add a bunch of other forgotten (integer) instructions to tgsi_util_get_inst_usage_mask() (which isn't used for much except optimizing away unused input components), though it may still be incomplete. Reviewed-by: Zack Rusin <zackr@vmware.com>
* tgsi: rename the TGSI fragment kill opcodesBrian Paul2013-07-121-2/+2
| | | | | | | | | | | | | | | | | | | | | TGSI_OPCODE_KIL and KILP had confusing names. The former was conditional kill (if any src component < 0). The later was unconditional kill. At one time KILP was supposed to work with NV-style condition codes/predicates but we never had that in TGSI. This patch renames both opcodes: TGSI_OPCODE_KIL -> KILL_IF (kill if src.xyzw < 0) TGSI_OPCODE_KILP -> KILL (unconditional kill) Note: I didn't just transpose the opcode names to help ensure that I didn't miss updating any code anywhere. I believe I've updated all the relevant code and comments but I'm not 100% sure that some drivers had this right in the first place. For example, the radeon driver might have llvm.AMDGPU.kill and llvm.AMDGPU.kilp mixed up. Driver authors should review their code. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* tgsi: fix operand type of TGSI_OPCODE_NOTChia-I Wu2013-05-081-0/+1
| | | | | | | | | It should be TGSI_TYPE_UNSIGNED, not TGSI_TYPE_FLOAT. Fixed also gallivm not_emit_cpu() to use uint build context. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Acked-by: Roland Scheidegger <sroland@vmware.com>
* tgsi: refactor tgsi_opcode_infer_src_type()Chia-I Wu2013-05-081-35/+9
| | | | | | | Call tgsi_opcode_infer_type() from tgsi_opcode_infer_src_type(). Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Acked-by: Roland Scheidegger <sroland@vmware.com>
* tgsi: refactor tgsi_opcode_infer_dst_type()Chia-I Wu2013-05-081-25/+35
| | | | | | | | | | | | | Move the body of tgsi_opcode_infer_dst_type() to a new helper function, tgsi_opcode_infer_type(), and call the helper function from tgsi_opcode_infer_dst_type(). The diff looks complicated simply because the code is moved around. A following commit will make tgsi_opcode_infer_src_type() call tgsi_opcode_infer_type(). Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Acked-by: Roland Scheidegger <sroland@vmware.com>
* tgsi: reorder opcodes in opcode type inferenceChia-I Wu2013-05-081-24/+24
| | | | | | | | | Reorder opcodes by their assigned numbers. This makes it easier to see the differences between tgsi_opcode_infer_src_type() and tgsi_opcode_infer_dst_type(). Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Acked-by: Roland Scheidegger <sroland@vmware.com>
* tgsi: allow negation of all integer typesZack Rusin2013-05-021-2/+1
| | | | | | | | | | It's valid because we reuse certain arithmetic operations for both signed and unsigned types (e.g. uadd, umad, which have a bit unfortunate naming) Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: José Fonseca <jfonseca@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallivm/tgsi: fix up breakcRoland Scheidegger2013-04-201-0/+3
| | | | | | | | | It seems there was a typo in gallivm breakc handling (I am actually still not sure it is really needed but otherwise that statement really should go away). Also fix the wrong src argument type, even though they weren't really used. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: Disambiguate TGSI_OPCODE_IF.José Fonseca2013-04-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TGSI_OPCODE_IF condition had two possible interpretations: - src.x != 0.0f - Mesa statetracker when PIPE_SHADER_CAP_INTEGERS was false either for vertex and fragment shaders - gallivm/llvmpipe - postprocess - vl state tracker - vega state tracker - most old drivers - old internal state trackers - many graw examples - src.x != 0U - Mesa statetracker when PIPE_SHADER_CAP_INTEGERS was true for both vertex and fragment shaders - tgsi_exec/softpipe - r600 - radeonsi - nv50 And drivers that use draw module also were a mess (because Mesa would emit float IFs, but draw module supports native integers so it would interpret IF arg as integers...) This sort of works if the source argument is limited to float +0.0f or +1.0f, integer 0, but would fail if source is float -0.0f, or integer in the float NaN range. It could also fail if source is integer 1, and hardware flushes denormalized numbers to zero. But with this change there are now two opcodes, IF and UIF, with clear meaning. Drivers that do not support native integers do not need to worry about UIF. However, for backwards compatibility with old state trackers and examples, it is advisable that native integer capable drivers also support the float IF opcode. I tried to implement this for r600 and radeonsi based on the surrounding code. I couldn't do this for nouveau, so I just shunted IF/UIF together, which matches the current behavior. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Marek Olšák <maraeo@gmail.com> v2: - Incorporate Roland's feedback. - Fix r600_shader.c merge conflict. - Fix typo in radeon, spotted by Michel Dänzer. - Incorporte Christoph Bumiller's patch to handle TGSI_OPCODE_IF(float) properly in nv50/ir.
* gallium: Eliminate TGSI_OPCODE_IFC.José Fonseca2013-04-171-1/+1
| | | | | | Never used or implemented. Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallivm/tgsi: handle untyped movesZack Rusin2013-04-101-0/+1
| | | | | | | | | | | both mov and ucmp can be used to move variables of any type. correctly note that about ucmp in the tgsi_info and make sure gallivm can handle that by correctly casting the untyped moves. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* gallivm/tgsi: fix issues with sample opcodesRoland Scheidegger2013-02-161-1/+1
| | | | | | | | We need to encode them as Texture instructions since the NumOffsets field is encoded there. However, we don't encode the actual target in there, this is derived from the sampler view src later. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallivm/tgsi: fix src modifier fetching with non-float types.Roland Scheidegger2013-02-161-2/+4
| | | | | | | | | | | | | | Need to take the type into account. Also, if we want to allow mov's with modifiers we need to pick a type (assume float). v2: don't allow all modifiers on all type, in particular don't allow absolute on non-float types and don't allow negate on unsigned. Also treat UADD as signed (despite the name) since it is used for handling both signed and unsigned integer arguments and otherwise modifiers don't work. Also add tgsi docs clarifying this. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
generated by cgit v1.1 at 2024-05-12 12:20:53 +0000