| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | nvc0/ir: be more careful about preserving modifiers in SHLADD creation | Ilia Mirkin | 2016-10-13 | 1 | -7/+5 |
| * | nvc0/ir: fix textureGather with a single offset | Ilia Mirkin | 2016-10-12 | 1 | -2/+2 |
| * | nv50/ir: copy over value's register id when resolving merge of a phi | Ilia Mirkin | 2016-10-12 | 1 | -1/+3 |
| * | nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c) | Samuel Pitoiset | 2016-10-12 | 1 | -0/+87 |
| * | nvc0/ir: fix overwriting of value backing non-constant gather offset | Ilia Mirkin | 2016-10-10 | 1 | -2/+2 |
| * | nv50/ir: only stick one preret per function | Ilia Mirkin | 2016-10-10 | 1 | -4/+7 |
| * | nv50/ir: fix wrong check when optimizing MAD to SHLADD | Samuel Pitoiset | 2016-10-07 | 1 | -1/+1 |
| * | nv50/ir: set number of threads/block for variable local size | Samuel Pitoiset | 2016-10-07 | 1 | -0/+2 |
| * | nv50/ir: optimize sub(a, 0) to a | Karol Herbst | 2016-10-06 | 1 | -0/+3 |
| * | nv50/ra: let simplify return an error and handle that | Karol Herbst | 2016-10-05 | 1 | -5/+7 |
| * | nv50/ir: teach insnCanLoad() about SHLADD | Samuel Pitoiset | 2016-09-29 | 1 | -0/+2 |
| * | nv50/ir: optimize SHLADD(a, b, c) to MOV((a << b) + c) | Samuel Pitoiset | 2016-09-29 | 1 | -0/+3 |
| * | nv50/ir: optimize SHLADD(a, b, 0x0) to SHL(a, b) | Samuel Pitoiset | 2016-09-29 | 1 | -0/+8 |
| * | nv50/ir: optimize IMAD to SHLADD in presence of power of 2 | Samuel Pitoiset | 2016-09-29 | 1 | -0/+7 |
| * | nvc0/ir: add emission for SHLADD | Samuel Pitoiset | 2016-09-29 | 3 | -0/+127 |
| * | nv50/ir: add preliminary support for SHLADD | Samuel Pitoiset | 2016-09-29 | 5 | -7/+17 |
| * | nvc0: update GM107 sched control codes format | Samuel Pitoiset | 2016-09-29 | 1 | -21/+21 |
| * | nv50/ir: fix comments about instructions info | Samuel Pitoiset | 2016-09-26 | 1 | -2/+3 |
| * | nv50/ir: drop unused NVISA_XXX_CHIPSET constants | Samuel Pitoiset | 2016-09-26 | 1 | -2/+0 |
| * | nv50/ir: optimize SUB(a, b) to MOV(a - b) | Samuel Pitoiset | 2016-09-18 | 1 | -0/+10 |
| * | gk110/ir: fix wrong emission of OP_NOT | Samuel Pitoiset | 2016-09-18 | 1 | -1/+1 |
| * | nvc0/ir: fix subops for IMAD | Samuel Pitoiset | 2016-09-17 | 1 | -4/+6 |
| * | nvc0/ir: fix comments about instructions info | Samuel Pitoiset | 2016-09-17 | 1 | -2/+3 |
| * | gm107/ir: allow indirect inputs to be loaded by frag shader | Ilia Mirkin | 2016-09-10 | 1 | -4/+21 |
| * | gm107/ir: AL2P writes to a predicate register | Ilia Mirkin | 2016-09-10 | 1 | -0/+1 |
| * | gk110/ir: fix quadop dall emission | Ilia Mirkin | 2016-09-04 | 1 | -2/+2 |
| * | nvc0/ir: allow min/max instructions to be dual-issued in pairs | Karol Herbst | 2016-09-03 | 1 | -2/+12 |
| * | nvc0/ir: don't dual-issue ops that depend or interfere with each other | Karol Herbst | 2016-09-03 | 3 | -14/+23 |
| * | nv50/ir: always emit the NDV bit for OP_QUADOP | Samuel Pitoiset | 2016-08-30 | 2 | -8/+2 |
| * | nv50/ir: make sure cfg iterator always hits all blocks | Ilia Mirkin | 2016-08-23 | 1 | -4/+4 |
| * | nv50/ir: fix bb positions after exit instructions | Ilia Mirkin | 2016-08-16 | 1 | -3/+10 |
| * | nv50/ir: properly clear upper bits of a bitset fill | Ilia Mirkin | 2016-08-16 | 1 | -2/+2 |
| * | gm107/ir: add a legalize SSA pass for PFETCH | Samuel Pitoiset | 2016-07-27 | 4 | -2/+43 |
| * | nvc0/ir: fix up an assertion in emitUADD() | Samuel Pitoiset | 2016-07-24 | 1 | -4/+3 |
| * | nv50/ir: allow to swap sources for OP_SUB | Samuel Pitoiset | 2016-07-22 | 1 | -1/+6 |
| * | nv50/ir: print OP_SUREDB subops in debug mode | Samuel Pitoiset | 2016-07-20 | 1 | -0/+1 |
| * | gm107/ir: add emission for SUREDx | Samuel Pitoiset | 2016-07-20 | 1 | -0/+50 |
| * | gm107/ir: add emission for SUSTx and SULDx | Samuel Pitoiset | 2016-07-20 | 1 | -0/+104 |
| * | gm107/ra: fix constraints for surface operations | Samuel Pitoiset | 2016-07-20 | 1 | -2/+23 |
| * | gm107/ir: lower surface operations | Samuel Pitoiset | 2016-07-20 | 2 | -1/+77 |
| * | gm107/ir: make use of ADD32I for all immediates | Samuel Pitoiset | 2016-07-19 | 1 | -1/+1 |
| * | gm107/ir: add missing NEG modifier for IADD32I | Samuel Pitoiset | 2016-07-19 | 1 | -0/+1 |
| * | nvc0: add support for BGRA8 images | Ilia Mirkin | 2016-07-18 | 4 | -0/+11 |
| * | nv50: fix alphatest for non-blendable formats | Ilia Mirkin | 2016-07-16 | 6 | -6/+63 |
| * | nv50/ir: add missing string for SV_WORK_DIM | Samuel Pitoiset | 2016-07-14 | 1 | -0/+1 |
| * | nvc0: initial support for GP100 GPUs | Ben Skeggs | 2016-07-12 | 2 | -0/+3 |
| * | nvc0/ir: fix images indirect access on Fermi | Samuel Pitoiset | 2016-07-11 | 1 | -0/+7 |
| * | nvc0/ir: remove unused resource info loading helpers | Samuel Pitoiset | 2016-07-08 | 2 | -28/+0 |
| * | nvc0/ir: refactor the surfaces info loading logic | Samuel Pitoiset | 2016-07-08 | 2 | -82/+44 |
| * | nvc0/ir: move the shift left op inside loadTexHandle() | Samuel Pitoiset | 2016-07-08 | 1 | -8/+6 |
