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path: root/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
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* WIP nouveau: add lockingIlia Mirkin2016-11-011-0/+2
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* nvc0: do not break 3D state by pushing MS coordinates on FermiSamuel Pitoiset2016-10-241-43/+44
| | | | | | | | | | | | | | | | | | | Long story short, 3D and CP are aliased on Fermi and initializing compute after pushing the MS sample coordinate offsets seems to corrupt 3D state for weird reasons. I still don't have the faintest clue what is going on, but this seems to only affect Fermi generation. A possible fix could be to use two different channels, one for 3D and one for CP. This fixes a bunch of regressions pinpointed by piglit. Fixes: "nvc0: fix up image support for allowing multiple samples" Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 42273edf79c2500957f51690499aa3405cc689db)
* nvc0: enable ARB_enhanced_layoutsSamuel Pitoiset2016-10-131-1/+1
| | | | | | | | All ARB_enhanced_layouts piglit tests pass without any changes in our compiler. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTSNicolai Hähnle2016-10-121-0/+1
| | | | | | | | This is a screen cap because drivers are expected to support it either for all shader types or for none of them. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Dave Airlie <airlied@redhat.com>
* nvc0: expose ARB_compute_variable_group_sizeSamuel Pitoiset2016-10-071-2/+6
| | | | | | | | | Only expose 512 threads/block on Fermi to not be limited by 32 GPRs/thread. v4: - use 512 threads on Fermi, 1024 on Kepler+ Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: add PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCKSamuel Pitoiset2016-10-071-0/+2
| | | | | | | | | v3: - use a new case statement in r600_pipe_common.c - fix compilation of softpipe... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gm107/ir: allow indirect inputs to be loaded by frag shaderIlia Mirkin2016-09-101-1/+0
| | | | | | | | | Looks like the GM107 IPA op does not allow a separate offset when using an indirect register. Instead we must use AL2P like we do for indirect vertex operations on Kepler+. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: remove PIPE_BIND_TRANSFER_READ/WRITEMarek Olšák2016-09-081-4/+2
| | | | | | | | not used in any useful way Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* nvc0: reduce the initial code segment size to 512KBSamuel Pitoiset2016-09-011-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: add nvc0_screen_resize_text_area() helperSamuel Pitoiset2016-09-011-10/+37
| | | | | | | | This function will be helpful for resizing the code segment area when we need to evict all shaders. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: fix indentation in nvc0_screen_init()Samuel Pitoiset2016-08-301-1/+1
| | | | | | | Trivial. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: check return value of nvc0_screen_resize_tls_area()Samuel Pitoiset2016-08-301-8/+8
| | | | | | | | While we are at it, make it static and change the return values policy to be consistent. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: make use of FAIL_SCREEN_INIT in nvc0_screen_create()Samuel Pitoiset2016-08-301-9/+7
| | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add cap to export device pointer sizeJan Vesely2016-08-291-0/+2
| | | | | | | | | v2: document the new cap v3: fix 80 char limit in screen.rst Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add a cap to expose whether driver supports mixed color/zs bitsIlia Mirkin2016-08-231-0/+1
| | | | | | | | | | Some hardware can't render to color/depth buffers of mixed bitness. When that happens a fallback has to happen, but this allows the driver to express that this isn't an optimal scenario. The purpose of this is to remove such fbconfigs from the GLX/EGL config list. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* nvc0: enable ARB_tessellation_shader on GM107+Samuel Pitoiset2016-07-271-3/+0
| | | | | | | This exposes OpenGL 4.1 on Maxwell (tested on GM107 and GM206). Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add a cap for VIEWPORT_SUBPIXEL_BITS (v2)Józef Kucia2016-07-201-0/+1
| | | | | | | | | | | | This allows Gallium drivers to advertise the subpixel precision for floating point viewports bounds. v2: - Set ViewportSubpixelBits in st_init_limits. Signed-off-by: Józef Kucia <joseph.kucia@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: disable MS images on GM107+Samuel Pitoiset2016-07-201-0/+7
| | | | | | | | MS images have to be handled explicitly and I don't plan to implement them for now. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: initial support for GP100 GPUsBen Skeggs2016-07-121-5/+11
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* nvc0: use a define for the driver constant buffer sizeSamuel Pitoiset2016-07-111-1/+1
| | | | | | | This might avoid mistakes if the size is bumped in the future. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: fix up image support for allowing multiple samplesIlia Mirkin2016-07-011-0/+20
| | | | | | | | | Basically we just have to scale up the coordinates and then add the relevant sample offset. The code to handle this was already largely present from Christoph's earlier attempts to pipe images through back in the dark ages, this just hooks it all up. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: provide support for unscaled poly offset unitsIlia Mirkin2016-06-261-1/+1
| | | | | | | | On at least Kepler hardware, the units differ based on RT format. Emit a properly scaled value for Z16 depth buffers vs other formats, to help out st/nine. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: Add a cap for offset_units_unscaledAxel Davy2016-06-251-0/+1
| | | | | | | | | | | | | | D3D9 has a different behaviour for depth bias. For OGL/D3D1X, the depth bias unit is the minimal resolvable value for the depth buffer, which depends on the format (and has different behaviour for float depth buffers). For D3D9, the depth bias unit is 1.0f. Signed-off-by: Axel Davy <axel.davy@ens.fr> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* nvc0: add support for GL_EXT_window_rectanglesIlia Mirkin2016-06-181-1/+2
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all driversIlia Mirkin2016-06-181-0/+1
| | | | | | | | This says how many window rectangles are supported by the implementation, although it may not exceed PIPE_MAX_WINDOW_RECTANGLES. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Brian Paul <brianp@vmware.com>
* nvc0: add support for VOTE tgsi opcodesIlia Mirkin2016-06-061-3/+2
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowedIlia Mirkin2016-06-061-0/+1
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* nouveau: enable GL 4.3 on kepler/fermiDave Airlie2016-05-281-1/+1
| | | | Signed-off-by: Dave Airlie <airlied@redhat.com>
* nvc0: enable 32 textures on kepler+Ilia Mirkin2016-05-261-2/+2
| | | | | | | | | For fermi, this likely will require use of linked tsc mode. However on bindless architectures, we can have as many as we want. As it stands, the AUX_TEX_INFO has 32 teture handles reserved. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* nvc0: expose robust buffer accessIlia Mirkin2016-05-231-1/+1
| | | | | | | We apparently pass all the relevant CTS tests. There are probably some shortcomings, but they can be addressed down the line. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: Add a pipe cap for whether primitive restart works for patches.Kenneth Graunke2016-05-231-0/+1
| | | | | | | | | | | | | | | Some hardware supports primitive restart on patch primitives, and other hardware does not. Modern GL and ES include a query for this feature; adding a capability bit will allow us to answer it. As far as I know, AMD hardware does not support this feature, while NVIDIA and Intel hardware does. However, most Gallium drivers do not appear to support tessellation shaders yet. So, I've enabled it for nvc0 and disabled it everywhere else. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* nvc0: expose GLSL version 420 on GF100Samuel Pitoiset2016-05-211-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: enable ARB_shader_image_load_store on GF100Samuel Pitoiset2016-05-211-0/+3
| | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50,nvc0: add support for cull distancesTobias Klausmann2016-05-151-1/+1
| | | | | | | | | | | Cull distances are just a special case of clip distances as far as the hardware is concerned. Make sure that the relevant "planes" are enabled, and flip the clip mode to cull for those. Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> [imirkin: add enables on nvc0, add nv50 support] Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
* gallium: Add a pipe cap for arb_cull_distanceTobias Klausmann2016-05-141-0/+1
| | | | | | | | | This lets us safely enable or disable the extension as needed Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* nvc0: enable compute support by default on GK110+Samuel Pitoiset2016-05-101-15/+3
| | | | | | | | | | Compute support seems to be pretty stable now, and according to piglit it doesn't seem to break 3D state. As a side effect, this will expose ARB_compute_shader on GK110/GK208. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: stick compute kernel arguments into uniform_boSamuel Pitoiset2016-04-291-1/+0
| | | | | | | | | | | | | Having one buffer object for input kernel arguments coming from clover and an other one for OpenGL user uniforms is unnecessary. Using the uniform_bo object for both GL/CL uniforms avoids to declare a new BO. This only affects compute programs but it should not hurt anything because the states are dirtied and data will get reuploaded. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: expose GLSL version 420 on GK110Samuel Pitoiset2016-04-261-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: enable ARB_shader_image_load_store on GK110Samuel Pitoiset2016-04-261-1/+1
| | | | | | | This exposes 8 images for all shader types. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: expose GLSL version 420 on GK104Samuel Pitoiset2016-04-261-0/+2
| | | | | | | Other chipsets will be added later. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: enable ARB_shader_image_load_store on GK104Ilia Mirkin2016-04-261-0/+2
| | | | | | | This exposes 8 images for all shader types. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: reduce GL_MAX_3D_TEXTURE_SIZE to 2048 on Kepler+Samuel Pitoiset2016-04-261-1/+1
| | | | | | | | | The blob sets it to 2048 and using 4096 reports an INVALID_DATA error with RT_ARRAY_MODE when z is 4096. Suggested by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
* nvc0: reserve an area for surfaces info in the driver constbufSamuel Pitoiset2016-04-261-1/+1
| | | | | | | | | | | | | To process surfaces coordinates from the codegen part, and because some information like the format is not always available (eg. when writeonly is used), we have to stick some surfaces data in the driver constbuf. This is especially true for OpenCL because we don't know the format at shader compile time. This bumps the size of each shader area from 1K to 2K. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: bump the amount of shared memory per MP on MaxwellSamuel Pitoiset2016-04-261-1/+11
| | | | | | | | According to the CUDA compute capability version, GM10x can expose 64KB of shared memory while GM20x can use 96KB. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: do not break the universe on GK110+Samuel Pitoiset2016-04-141-0/+1
| | | | | | | | I removed that return 0 by mistake. Ooops. Fixes: 6e23fd4 ("nvc0: allow to use compute support on GM200") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: allow to use compute support on GM200Samuel Pitoiset2016-04-141-2/+1
| | | | | | | | | This works like a charm but please not that NVF0_COMPUTE have to be set because compute support is still not enabled by default on GK110+. This will require more testing to make sure it won't break the 3D state. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: Add capability for ARB_robust_buffer_access_behavior.Bas Nieuwenhuizen2016-04-121-0/+1
| | | | | | Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* nvc0: handle the case where there are no framebuffer attachmentsIlia Mirkin2016-04-091-1/+7
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50,nvc0: support sending string markers down into the command streamIlia Mirkin2016-04-091-1/+1
| | | | | | | This should hopefully make it a little easier to debug with GL applications like glretrace and looking at command streams. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50,nvc0: add invalidate_resource support for buffer resourcesIlia Mirkin2016-04-091-1/+1
| | | | | | | Provide a callback to reallocate the underlying storage of a resource so that it is not bound to any existing fences. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
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