summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeon/radeon_video.c
Commit message (Collapse)AuthorAgeFilesLines
* radeon/video: don't use sub-allocated buffersNicolai Hähnle2016-09-301-1/+7
| | | | | | | Cc: Christian König <christian.koenig@amd.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97976 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97969 Reviewed-by: Christian König <christian.koenig@amd.com>
* radeon/uvd: move polaris fw check into radeon_video.c v2Christian König2016-07-081-3/+13
| | | | | | | | | | It's actually not very clever to claim to support H.264 and then fail to create a decoder. v2: prefix FW macro with UVD_. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* radeon/video: fix coding style in radeon_video.c v2Christian König2016-07-081-15/+15
| | | | | | | v2: fix other tabs as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* gallium/radeon: use r600_resource_referenceMarek Olšák2016-06-251-1/+1
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Vedran Miletić <vedran@miletic.net> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeon/uvd: fix the H264 level for Tonga v2Christian König2016-06-021-1/+1
| | | | | | | | | | We support 5.2 for a while now. v2: we even support 5.2 for H264, 5.1 is for HEVC. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: <mesa-stable@lists.freedesktop.org>
* Treewide: Remove Elements() macroJan Vesely2016-05-171-1/+1
| | | | | Signed-off-by: Jan Vesely <jano.vesely@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
* radeonsi: rework clear_buffer flagsMarek Olšák2016-04-281-1/+1
| | | | | | | | | Changes: - don't flush DB for fast color clears - don't flush any caches for initial clears - remove the flag from si_copy_buffer, always assume shader coherency Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/radeon: remove use_reusable_pool parameter from buffer_createNicolai Hähnle2016-04-271-1/+1
| | | | | | All callers set this parameter to true. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeon/video: always use the reusable buffer poolNicolai Hähnle2016-04-271-2/+2
| | | | | | | | | | | A semantic error was introduced in a past refactoring that caused the bind parameter to be passed into the use_reusable_pool parameter of buffer_create. Since this clearly makes no sense, and there is no clear reason why the cache _shouldn't_ be used, just use the cache always. Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeon/video: enable HEVC main 10 decodeBoyuan Zhang2016-03-111-2/+6
| | | | | | Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/uvd: increase max height to 4096 for VI and newerTamil velan2016-03-081-1/+1
| | | | | | | | | | | | | | | | | With this issue 'mpv --hwdec=vdpau --vo=vdpau <stream>' fails for vdpau decode if the stream height is 4096. Vdpau decode of height upto 4096 is necessary usecase on amdgpu driver for VI and newer platforms. The fix is in driver specific implementation of "Decoder Query Capabilities" API to return 4096 for VI and newer platforms. With this fix vdpauinfo reports height support as 4096 and mpv for vdpau decode works fine for 4096 height streams. Signed-off-by: Tamil velan <Tamil-Velan.Jayakumar@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
* radeon/uvd: disable MPEG1Christian König2016-03-081-0/+1
| | | | | | | | The hardware simply doesn't support that correctly. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
* gallium/radeon: remove radeon_winsys_cs_handleMarek Olšák2015-12-111-5/+5
| | | | | | | | "radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf". Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeon/uvd: fix VC-1 simple/main profile decode v2Boyuan Zhang2015-11-061-2/+1
| | | | | | | | | | | We just needed to set the extra width/height fields to get this working. v2 (chk): rebased, CC stable added, commit message added, fixed coding style Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
* radeon/uvd: don't expose HEVC on old UVD hw (v3)Alex Deucher2015-10-221-32/+18
| | | | | | | | | | | | | | | | The section for UVD 2 and older was not updated when HEVC support was added. Reported by Kano on irc. v2: integrate the UVD2 and older checks into the main switch statement. v3: handle encode checking as well. Encode is already checked in the top case statement, so drop encode checks in the lower case statement. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: mesa-stable@lists.freedesktop.org
* radeon/uvd: implement HEVC supportBoyuan Zhang2015-08-141-0/+10
| | | | | | | | | | | | | add context buffer to fix H265 uvd decode issue. fix H265 corruption issue caused by incorrect assigned ref_pic_list. v2: disable interlace for HEVC add CZ sps flag workaround fix coding style Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* radeon/video: config encode stacked frame number based on HWLeo Liu2015-08-141-0/+2
| | | | | | | | since VCE 3.0 with dual instances, we need stack frames for them. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* radeon/video: add 4K support for decode/encode parametersLeo Liu2015-08-141-4/+4
| | | | | | Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
* winsys/radeon: add a private interface for radeon_surfaceMarek Olšák2015-04-291-1/+1
|
* winsys/radeon: move radeon_winsys.h to drivers/radeonMarek Olšák2015-04-291-1/+0
|
* radeonsi: only flush the right set of caches for CP DMA operationsMarek Olšák2015-01-071-1/+2
| | | | | | | | That's either framebuffer caches or caches for shader resources. The motivation is that framebuffer caches need to be flushed very rarely here. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeon/video: use the hw to initial clear the buffersChristian König2014-09-111-6/+4
| | | | | | | Less CPU overhead and avoids contention over CPU accessible memory on startup. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeon/video: use more of the common buffer code v2Christian König2014-09-111-30/+23
| | | | | | | | | In preparation to using buffers clears with the hw engine(s). v2: split out flipping to using hw buffer clears. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* gallium/radeon: cleanup header inclusionEmil Velikov2014-08-281-1/+1
| | | | | | | | | | | | | | - Add top_srcdir/src/gallium/winsys to GALLIUM_DRIVER_C{XXFLAGS}. - Remove top_srcdir/src/gallium/drivers/radeon from the includes. As a result: - Common radeon headers are prefixed with 'radeon/' - Winsys header inclusion is prefixed 'radeon/drm' Cc: Marek Olšák <marek.olsak@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeon/uvd: remove comment about RV770Alex Deucher2014-08-271-1/+0
| | | | | | | It doesn't seem to support field based decode after testing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* radeon/uvd: fix field handling on R6XX style UVDChristian König2014-08-261-2/+5
| | | | | | The first UVD generation can only do frame based output. Signed-off-by: Christian König <christian.koenig@amd.com>
* r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTTMichel Dänzer2014-07-231-4/+7
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeon/uvd: disable VC-1 simple/main on UVD 2.xGrigori Goronzy2014-06-181-1/+4
| | | | | | | | | It's about as broken as on later UVD revisions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452 Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org> Reviewed-by: Christian König <christian.koenig@amd.com>
* radeon/vce: initial VCE support v8Christian König2014-02-131-0/+25
| | | | | | | | | | | | | | v2 (chk): revert feedback buffer hack v3 (slava): fixed bitstream size calculation v4 (chk): always create buffers in the right domain v5 (chk): flush async v6 (chk): rework fw interface add version check v7 (leo): implement cropping support v8 (chk): add hw checks Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
* vl: add H264 encoding interfaceChristian König2014-02-111-2/+3
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com>
* radeon/video: directly create buffers in the right domainChristian König2014-02-061-3/+6
| | | | | | Avoid moving things around on start of stream. Signed-off-by: Christian König <christian.koenig@amd.com>
* radeon/video: seperate common video functionsChristian König2014-02-061-0/+293
Signed-off-by: Christian König <christian.koenig@amd.com>
generated by cgit v1.1 at 2024-05-20 05:27:26 +0000