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path: root/src/gallium/drivers/radeonsi/si_state_draw.c
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* gallium/radeon: cleanup header inclusionEmil Velikov2014-08-281-1/+1
| | | | | | | | | | | | | | - Add top_srcdir/src/gallium/winsys to GALLIUM_DRIVER_C{XXFLAGS}. - Remove top_srcdir/src/gallium/drivers/radeon from the includes. As a result: - Common radeon headers are prefixed with 'radeon/' - Winsys header inclusion is prefixed 'radeon/drm' Cc: Marek Olšák <marek.olsak@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: bump PRIMGROUP_SIZE for some casesMarek Olšák2014-08-191-1/+4
| | | | | | | Recommended by hw people. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: set PARTIAL_VS_WAVE(0) when appropriateMarek Olšák2014-08-191-1/+6
| | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)Marek Olšák2014-08-191-40/+50
| | | | | | | Nothing's changed for CIK here. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: use r600_draw_rectangle from r600gMarek Olšák2014-08-191-3/+4
| | | | | | Rectangles are easier than triangles for the rasterizer. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: use gpu_address from r600_resourceMarek Olšák2014-08-091-14/+9
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: always prefer SWITCH_ON_EOP(0) on CIKMarek Olšák2014-08-091-9/+24
| | | | | | | | | | | | | | The code is rewritten to take known constraints into account, while always using 0 by default. This should improve performance for multi-SE parts in theory. A debug option is also added for easier debugging. (If there are hangs, use the option. If the hangs go away, you have found the problem.) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> v2: fix a typo, set max_se for evergreen GPUs according to the kernel driver
* radeonsi: fix a hang with instancing in Unigine Heaven/Valley on HawaiiMarek Olšák2014-08-091-5/+2
| | | | | | | | This isn't documented anywhere, but it's the only thing that works for this case. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: fix a hang with streamout on HawaiiMarek Olšák2014-07-281-1/+13
| | | | | | | | | | | I actually couldn't reproduce this one, but internal docs recommend this workaround. Better safe than sorry. Also, the number of dwords for the sync packets is increased by 4 instead of 2, because it wasn't bumped last time when a new packet was added there. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: fix a hang with instancing on HawaiiMarek Olšák2014-07-281-1/+15
| | | | | | | This fixes "piglit/bin/arb_transform_feedback2-draw-auto instanced". Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: only update vertex buffers when they need updatingMarek Olšák2014-07-181-1/+5
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: move vertex buffer descriptors from IB to memoryMarek Olšák2014-07-181-63/+1
| | | | | | | | | | This removes the intermediate storage (pm4 state) and generates descriptors directly in a staging buffer. It also reduces the number of flushes, because the descriptors no longer take CS space. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: implement ARB_draw_indirectMarek Olšák2014-07-181-16/+57
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: don't add info->start to the index buffer offsetMarek Olšák2014-07-181-11/+25
| | | | | | | info->start will be invalid once info->indirect isn't NULL, so it shouldn't be added to ib.offset. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: use an SGPR instead of VGT_INDX_OFFSETMarek Olšák2014-07-181-6/+9
| | | | | | | | The draw indirect packets cannot set VGT_INDX_OFFSET, they can only set user data SGPRs. This is the only way to support start/index_bias with indirect drawing. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: pass ARB_conservative_depth parameters to the hardwareMarek Olšák2014-06-191-0/+4
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: prepare depth export registers at compile timeMarek Olšák2014-05-101-14/+4
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: remove unused variable exports_ps in si_pipe_shader_psMarek Olšák2014-05-101-12/+1
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: use DRAW_PREAMBLE on CIKMarek Olšák2014-05-101-5/+8
| | | | | | | It's the same as setting the 3 regs separately, but shorter, and it also seems to be required on GFX7.2 and later. This doesn't fix Hawaii. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: Don't use anonymous struct trick in atom trackingAdam Jackson2014-05-081-1/+1
| | | | | | | | I'm somewhat impressed that current gccs will let you do this, but sufficiently old ones (including 4.4.7 in RHEL6) won't. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Adam Jackson <ajax@redhat.com>
* radeonsi: move framebuffer-related state to a new struct si_framebufferMarek Olšák2014-03-111-10/+10
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* r600g,radeonsi: set priorities for relocationsMarek Olšák2014-03-111-7/+10
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* gallium: remove PIPE_USAGE_STATICMarek Olšák2014-02-061-2/+2
| | | | Reviewed-by: Brian Paul <brianp@vmware.com>
* radeonsi: Pass VS resource descriptors to the HW ES shader stage as wellMichel Dänzer2014-01-291-7/+11
| | | | | | | This makes sure constants and samplers work in the vertex shader even when a geometry shader is active. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Simplify shader PM4 state handlingMichel Dänzer2014-01-291-39/+17
| | | | | | | | | | Just always bind the current states before drawing. Besides the simplification, as a bonus this makes sure the VS hardware shader stage always uses the GS copy shader when a geometry shader is active, fixing a number of GS related piglit tests. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Take GS into account for VS state in more placesMichel Dänzer2014-01-291-2/+2
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Handle adjacency primitivesMichel Dänzer2014-01-291-4/+4
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Handle TGSI_SEMANTIC_PRIMIDMichel Dänzer2014-01-291-1/+1
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Generalize counting of shader parametersMichel Dänzer2014-01-291-1/+1
| | | | | | Now it covers ES->GS as well as VS->PS. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Initial geometry shader supportMichel Dänzer2014-01-291-24/+251
| | | | | | | Partly based on the corresponding r600g work by Vadim Girlin and Dave Airlie. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: cleanup includes, add missing licenseMarek Olšák2014-01-281-7/+6
| | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* radeonsi: inline si_translate_index_bufferMarek Olšák2014-01-281-1/+19
| | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* radeonsi: inline si_upload_index_bufferMarek Olšák2014-01-281-1/+2
| | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* r600g,radeonsi: consolidate variables for CS tracingMarek Olšák2014-01-281-1/+1
| | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* r600g,radeonsi: consolidate get_timestamp, get_driver_query_infoMarek Olšák2014-01-281-0/+1
| | | | | | | This enables more queries for the Gallium HUD with radeonsi. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* radeonsi: use queries from r600gMarek Olšák2014-01-281-5/+5
| | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* radeonsi: handle R600_CONTEXT_PS_PARTIAL_FLUSH in si_emit_cache_flushMarek Olšák2014-01-231-1/+2
| | | | | | For consistency only, This is unused by radeonsi currently. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: Rename the commonly occurring rctx/r600 variables.Andreas Hartmetz2014-01-141-118/+118
| | | | | | The "r" stands for R600. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Rename r600_trace_emit->si_trace_emit.Andreas Hartmetz2014-01-141-1/+1
| | | | | | I had previously considered that unsafe. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Rename R600->SI in some remaining defines.Andreas Hartmetz2014-01-141-3/+3
| | | | | | I had previously considered that unsafe. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Rename r600->si remaining identifiers in si_state_draw.c.Andreas Hartmetz2014-01-141-2/+2
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Rename r600->si for functions in si_pipe.h.Andreas Hartmetz2014-01-141-3/+3
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Rename r600->si for structs in si_pipe.h.Andreas Hartmetz2014-01-141-8/+8
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: Apply si_* file naming scheme.Andreas Hartmetz2014-01-141-2/+2
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: make DB_RENDER_OVERRIDE an invariant registerMarek Olšák2013-12-171-1/+0
| | | | | | | All this cruft was ported from r600g and isn't needed on SI and later according to hw docs. If we implemented HiS, we would set it to 0. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: flush HTILE when appropriateMarek Olšák2013-12-171-1/+5
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: move invariant regs to si_init_configMarek Olšák2013-12-141-13/+0
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: fix binding the dummy pixel shaderMarek Olšák2013-12-121-9/+1
| | | | | | This fixes valgrind errors in glxinfo. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: remove unused variable in si_pipe_shader_psMarek Olšák2013-12-121-8/+1
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: Write htile state to hardware.Andreas Hartmetz2013-12-121-5/+2
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