summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: move vertex buffer descriptors from IB to memoryMarek Olšák2014-07-187-106/+133
* radeonsi: add support for fine-grained sampler view updatesMarek Olšák2014-07-183-30/+21
* radeonsi: move si_set_sampler_views to si_descriptors.cMarek Olšák2014-07-183-73/+68
* radeonsi: move sampler descriptors from IB to memoryMarek Olšák2014-07-185-82/+82
* radeonsi: implement ARB_draw_indirectMarek Olšák2014-07-185-17/+128
* radeonsi: don't add info->start to the index buffer offsetMarek Olšák2014-07-181-11/+25
* radeonsi: use an SGPR instead of VGT_INDX_OFFSETMarek Olšák2014-07-184-14/+23
* radeonsi: assume LLVM 3.4.2 is always presentMarek Olšák2014-07-186-56/+7
* r600g: Implement GL_ARB_texture_gatherGlenn Kennard2014-07-182-7/+42
* nv50: fix build failure on m68k due to invalid struct alignment assumptionsThorsten Glaser2014-07-171-0/+5
* ilo: add some missing formatsChia-I Wu2014-07-161-21/+22
* ilo: update and tailor the surface format tableChia-I Wu2014-07-161-286/+258
* nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYSChristoph Bumiller2014-07-151-13/+28
* nvc0: add support for indirect drawingChristoph Bumiller2014-07-158-30/+220
* nouveau: check if a fence has already been signalledIlia Mirkin2014-07-151-0/+3
* radeon/llvm: Fix LLVM diagnostic error reportingTom Stellard2014-07-151-7/+4
* ilo: raise texture size limitsChia-I Wu2014-07-152-17/+9
* ilo: move away from drm_intel_bo_alloc_tiledChia-I Wu2014-07-153-250/+300
* radeonsi: partially revert "switch descriptors to i32 vectors"Marek Olšák2014-07-141-0/+12
* radeonsi: rename definitions of shader limitsMarek Olšák2014-07-117-44/+57
* radeonsi: switch descriptors to i32 vectorsMarek Olšák2014-07-111-13/+16
* radeonsi: properly implement texture opcodes that take an offsetMarek Olšák2014-07-111-84/+104
* radeonsi: fix texture fetches with derivatives for 1DArray and 3D texturesMarek Olšák2014-07-111-4/+30
* radeonsi: fix samplerCubeShadow with biasMarek Olšák2014-07-111-6/+6
* softpipe: fix sp_get_dims() for PIPE_BUFFERBrian Paul2014-07-101-6/+10
* nvc0/ir: add support for interpolating with non-default settingsIlia Mirkin2014-07-093-1/+94
* r600g: remove unused base_vector_chan variableIlia Mirkin2014-07-091-1/+0
* nvc0/ir: fix encoding of offset register into interpolation instructionIlia Mirkin2014-07-091-1/+1
* nvc0/ir: account for indirect textures on fermi for txdIlia Mirkin2014-07-091-0/+3
* nvc0/ir: unset s/r indirect sources before moving everythingIlia Mirkin2014-07-091-9/+10
* gallium: switch dedicated centroid field to interpolation locationIlia Mirkin2014-07-094-7/+7
* radeonsi: fix order of r600_need_dma_space and r600_context_bo_relocChristian König2014-07-091-1/+2
* nvc0: allocate more space before a counter is configuredSamuel Pitoiset2014-07-081-2/+3
* nv50/ir: use unordered_set instead of list to keep track of var usesTobias Klausmann2014-07-084-9/+10
* radeonsi: mark MSAA config state as dirty at the beginning of CSMarek Olšák2014-07-081-0/+1
* ilo: fix fence reference countingChia-I Wu2014-07-081-12/+9
* nvc0/ir: fill offset in properly for TXDIlia Mirkin2014-07-081-13/+43
* nvc0/ir: use manual TXD when offsets are involvedIlia Mirkin2014-07-081-1/+2
* nvc0/ir: do quadops on the right texture coordinates for TXDIlia Mirkin2014-07-081-2/+3
* nv50/ir: ignore bias for samplerCubeShadow on nv50Ilia Mirkin2014-07-081-0/+10
* nv50/ir: retrieve shadow compare from first argIlia Mirkin2014-07-081-1/+1
* gallium/radeon: use PRIX64 instead of PRIu64Christian König2014-07-062-2/+2
* nvc0: add a memory barrier when there are persistent UBOsIlia Mirkin2014-07-035-4/+57
* nv50: do an explicit flush on draw when there are persistent buffersIlia Mirkin2014-07-033-2/+50
* nv50: disable dedicated ubo upload methodIlia Mirkin2014-07-031-0/+7
* gallium: rename PIPE_CAP_TGSI_VS_LAYER to also have _VIEWPORTIlia Mirkin2014-07-0312-12/+12
* r600g: allow vs to write to gl_ViewportIndexIlia Mirkin2014-07-031-0/+17
* svga: Don't unnecessarily reemit BindGBShader commands v2Thomas Hellstrom2014-07-033-20/+8
* radeon/llvm: Allocate space for kernel metadata operandsAaron Watry2014-07-031-3/+7
* svga: add switch cases for PIPE_SHADER_CAP_DOUBLESBrian Paul2014-07-031-0/+4
generated by cgit v1.1 at 2024-09-15 16:28:05 +0000