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* gallium/winsys/kms: Fix double refcount when importing from prime FD (v2)Tomasz Figa2016-08-241-1/+0
| | | | | | | | | | | | | Currently the code creates a display target struct with refcount field initialized to 1 and then the caller again increments it, leading to a leaked reference. Let's remove the unnecessary increment. v2: Split from one big patch into four fixing one thing at a time. Signed-off-by: Tomasz Figa <tfiga@chromium.org> CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
* winsys/radeon: track the amount of mapped memoryMarek Olšák2016-08-103-1/+18
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: track the amount of mapped memoryMarek Olšák2016-08-104-1/+24
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: don't try to unmap userptr buffersMarek Olšák2016-08-101-0/+3
| | | | | | no app calls this AFAIK Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: query ME/PFP/CE firmware versionsNicolai Hähnle2016-08-081-0/+22
| | | | | | | The radeon kernel module doesn't have the firmware query interface, so the corresponding values will remain 0. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/radeon: implement cs_get_next_fenceMarek Olšák2016-08-062-2/+29
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: implement cs_get_next_fenceMarek Olšák2016-08-062-4/+35
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon: move radeon_winsys::cs_memory_below_limit to driversMarek Olšák2016-08-062-34/+0
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon: inline radeon_winsys::query_memory_usageMarek Olšák2016-08-062-12/+0
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon/winsyses: expose per-IB used_vram and used_gart to driversMarek Olšák2016-08-064-25/+19
| | | | | | The following patches will use this. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon/winsyses: print CS submission error numberMarek Olšák2016-08-062-2/+2
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* virgl: add exported dmabuf to BO hash tableRob Herring2016-07-291-0/+3
| | | | | | | | | Exported dmabufs can get imported by the same process, but the handle was not getting added to the hash table on export. Add the handle to the hash table on export. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* mesa: Use AC_HEADER_MAJOR to include correct header for major().Matt Turner2016-07-261-1/+6
| | | | | | Gentoo has been smoke testing an upcoming change to glibc. Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=580392
* winsys/amdgpu: use pb_cache buckets for fewer pb_cache missesMarek Olšák2016-07-191-6/+21
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/radeon: use pb_cache buckets for fewer pb_cache missesMarek Olšák2016-07-191-7/+22
| | | | | | This makes Bioshock Infinite with deferred flushing 2.2% faster. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/pb_cache: divide the cache into buckets for reducing cache missesMarek Olšák2016-07-192-4/+4
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon: remove RADEON_FLUSH_KEEP_TILING_FLAGS flagMarek Olšák2016-07-191-6/+3
| | | | | | always set Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/u_queue: add optional cleanup callbackRob Clark2016-07-162-2/+2
| | | | | | | | | | | | Adds a second optional cleanup callback, called after the fence is signaled. This is needed if, for example, the queue has the last reference to the object that embeds the util_queue_fence. In this case we cannot drop the ref in the main callback, since that would result in the fence being destroyed before it is signaled. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: return an error on IB submission failuresMarek Olšák2016-07-142-1/+9
| | | | Reviewed-by: Christian König <christian.koenig@amd.com>
* gallium/radeon: add a return value to cs_flushMarek Olšák2016-07-142-6/+8
| | | | | | Required by our UVD code. Reviewed-by: Christian König <christian.koenig@amd.com>
* radeonsi: just save buffer sizes instead of buffers while recording IBsMarek Olšák2016-07-132-2/+2
| | | | | | whole buffer objects are not needed Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* nvc0: initial support for GP100 GPUsBen Skeggs2016-07-121-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* svga: invalidate gb surface before it is reusedCharmaine Lee2016-07-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | With this patch, a guest-backed surface will be invalidated using the SVGA_3D_CMD_INVALIDATE_GB_SURFACE command before the surface is reused. This fixes the updating dirty image error from the device when a surface is reused. v2: Instead of invalidating the surface when it is reused, send the invalidate command before the surface is put into the recycle pool. v3: (1) surface invalidate is a noop operation in Linux winsys, since surface invalidation is not needed for DMA path. (2) Instead of invalidating the surface content in svga_screen_surface_destroy() when a surface is to be destroyed, it is done in svga_screen_cache_flush() when the surface is no longer referenced in a command buffer and is ready to be moved to the unused list. At this point, the surface will be moved to the invalidate list. When the surface invalidation is submitted, the surface will be moved to the unused list. Tested with piglit, glretrace. Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
* winsys/amdgpu: avoid flushed depth when possibleNicolai Hähnle2016-07-061-3/+8
| | | | | | | If a depth/stencil texture has no mipmaps, we can always get a layout that is compatible with DB and TC. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/radeon: add depth/stencil_adjusted output to surface computationNicolai Hähnle2016-07-061-0/+4
| | | | | | | | | | | This fixes a rare bug with stencil texturing -- seen on Polaris and Tonga, though it's basically a function of the memory configuration so could affect other parts as well. Fixes piglit "unaligned-blit * stencil downsample" and various "fbo-depth-array *stencil*" tests. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/radeon/winsyses: remove unused stencil_offsetNicolai Hähnle2016-07-062-4/+0
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/radeon: add and use radeon_info::max_alloc_size (v2)Marek Olšák2016-07-052-0/+6
| | | | | | | | | | v2: - squashed the patches - use INT_MAX - clamp max_const_buffer_size - check the DRM version in radeon Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Vedran Miletić <vedran@miletic.net>
* svga: Fix failures caused in fedora 24Neha Bhende2016-06-301-0/+11
| | | | | | | | | | | SVGA_3D_CMD_DX_GENRATE_MIPMAP & SVGA_3D_CMD_DX_SET_PREDICATION commands are not presents in fedora 24 kernel module. Because of this reason application like supertuxkart are not running. v2: Add few comments and code modifications suggested by Brian P. Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com>
* radeon uvd add uvd fw version for amdgpusonjiang2016-06-291-1/+10
| | | | | | | Signed-off-by: sonjiang <sonny.jiang@amd.com> Cc: "12.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* radeonsi: always calculate DCC info even if it's not used immediatelyMarek Olšák2016-06-291-1/+0
| | | | | | for a later use Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon/winsyses: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-258-111/+112
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Vedran Miletić <vedran@miletic.net> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/radeon: add guard pages when R600_DEBUG=check_vm is enabledNicolai Hähnle2016-06-243-2/+7
| | | | | | This should help flush out GPU VM faults. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: add guard pages when R600_DEBUG=check_vm is enabledNicolai Hähnle2016-06-243-2/+8
| | | | | | This should help flush out GPU VM faults. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/u_queue: allow the execute function to differ per jobMarek Olšák2016-06-244-5/+6
| | | | | | so that independent types of jobs can use the same queue. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/u_queue: add an option to name threadsMarek Olšák2016-06-242-2/+2
| | | | | | | | for debugging v2: correct the snprintf use Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/u_queue: add an option to have multiple worker threadsMarek Olšák2016-06-246-8/+8
| | | | | | | | independent jobs don't have to be stuck on only one thread v2: use CALLOC & FREE Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/u_queue: use a ring instead of a stackMarek Olšák2016-06-242-2/+2
| | | | | | | | and allow specifying its size in util_queue_init. v2: use CALLOC & FREE Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/radeon: use the common job queue for multithreaded command submission v2Marek Olšák2016-06-154-82/+19
| | | | | | v2: fixup after renaming to util_queue_fence Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/util: import the multithreaded job queue from amdgpu winsys (v2)Marek Olšák2016-06-154-83/+18
| | | | | | v2: rename the event to util_queue_fence Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon: add micro_tile_mode to radeon_surfMarek Olšák2016-06-142-3/+42
| | | | | | for easier access Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* Android: move libdrm settings to top-level Android.common.mkRob Herring2016-06-139-9/+6
| | | | | | | | | | | | | | Fix warnings like these due to HAVE_LIBDRM being inconsistently defined: external/libdrm/include/drm/drm.h:839:30: warning: redefinition of typedef 'drm_clip_rect_t' is a C11 feature [-Wtypedef-redefinition] typedef struct drm_clip_rect drm_clip_rect_t; HAVE_LIBDRM needs to be set project wide to fix this. This change also harmlessly links libdrm with everything, but simplifies the makefiles a bit. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Emil Velikov <emil.velikov@collabora.com>
* virgl: fix checking fencesMarc-André Lureau2016-06-092-2/+2
| | | | | | | | | | | | | | When calling virgl_fence_wait() with timeout=0, virgl_{drm,vtest}_resource_is_busy() is called. However, it returns TRUE for a busy resource, whereace virgl_fence_wait() should return TRUE for a completed (non-busy) resource. This fixes running supertuxkart in a VM (I could not reproduce locally with vtest though there is a similar fix) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: "11.1 11.2 12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* winsys/amdgpu: enable DCC for mipmapped texturesMarek Olšák2016-06-081-6/+23
| | | | | | | | Also add dcc_fast_clear_size for clearing only the necessary subset of DCC. For no AA, it's equal to the size of the whole DCC level. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* radeonsi: add per-level dcc_enabled flagsMarek Olšák2016-06-081-3/+7
| | | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* gallium/radeon: don't allocate DCC for non-renderable texture formatsMarek Olšák2016-06-081-0/+1
| | | | | | | | | | | R9G9B9E5 is the only uncompressed one hopefully. This fixes incorrect rendering not discovered (due to a lack of tests) until DCC mipmapping was enabled. Cc: 11.1 11.2 12.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* winsys/amdgpu: decay max_ib_size over timeNicolai Hähnle2016-06-011-0/+2
| | | | | | So that memory use will eventually decrease again after a temporary peak. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: implement IB chaining on the gfx ringNicolai Hähnle2016-06-012-18/+109
| | | | | | As a consequence, CE IB size never triggers a flush anymore. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: consolidate IB size management in amdgpu_ib_finalizeNicolai Hähnle2016-06-011-9/+9
| | | | Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeon/winsys: introduce radeon_winsys_cs_chunkNicolai Hähnle2016-06-012-41/+46
| | | | | | | We will chain multiple chunks together and will keep pointers to the older chunks to support IB dumping. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* winsys/amdgpu: start with smaller IBs, growing as necessaryNicolai Hähnle2016-06-012-10/+71
| | | | | | | | | | | | | | | | | This avoids allocating giant IBs from the outset, especially for CE and DMA. Since we now limit max_dw only by the size that the buffer happens to be (which, due to the buffer cache, can be even larger than the rounded-up size we request), the new function amdgpu_ib_max_submit_dwords controls when we submit an IB. With this change, we effectively never flush prematurely due to the CE IB, after an initial warm-up phase. v2: - clean up buffer_size calculation Reviewed-by: Marek Olšák <marek.olsak@amd.com>
generated by cgit v1.1 at 2025-08-18 02:24:52 +0000