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* nvc0: rework nvc0_compute_validate_program()Samuel Pitoiset2016-02-266-44/+20
* nvc0: make sure to validate compute global buffers on FermiSamuel Pitoiset2016-02-261-1/+3
* nvc0: move nvc0_validate_global_residents() to nvc0_compute.cSamuel Pitoiset2016-02-264-19/+17
* virgl: add missing CAP turned off.Dave Airlie2016-02-261-0/+3
* st/nine: don't forget to bundle the nine_limits.h fileEmil Velikov2016-02-251-0/+1
* gallium/radeon: return correct values for BE in r600_translate_colorswapOded Gabbay2016-02-251-4/+4
* gallium: remove duplicate define from enum pipe_formatOded Gabbay2016-02-251-1/+0
* gallium/radeon: Correctly translate colorswaps for big endianOded Gabbay2016-02-231-0/+11
* tgsi/scan: handle holes between VS inputs, assert-fail in other casesMarek Olšák2016-02-231-1/+9
* nvc0: rename 3d binding points to NVC0_BIND_3D_XXXSamuel Pitoiset2016-02-229-63/+64
* nvc0: rename 3d dirty flags to NVC0_NEW_3D_XXXSamuel Pitoiset2016-02-228-133/+133
* nvc0: prefix compute macros with _CP_ instead of _COMPUTE_Samuel Pitoiset2016-02-224-4/+4
* nvc0: rename NVXX_COMPUTE to NVXX_CPSamuel Pitoiset2016-02-225-117/+117
* nvc0: rename nvc0_context::dirty to nvc0_context::dirty_3dSamuel Pitoiset2016-02-228-64/+64
* nvc0/ir: add missing emission of locked load predicateSamuel Pitoiset2016-02-221-0/+7
* nvc0/ir: add ld lock/st unlock emission on GK104Samuel Pitoiset2016-02-221-10/+25
* nv50/ir: restore OP_SELP to be a regular instructionSamuel Pitoiset2016-02-224-14/+14
* svga: unbind index buffer when drawing non-indexed primitivesBrian Paul2016-02-221-0/+10
* nouveau: update the Makefile.sources listEmil Velikov2016-02-221-2/+3
* radeonsi: implement binary shaders & shader cache in memory (v2)Marek Olšák2016-02-215-7/+259
* gallium/radeon: remove unused radeon_shader_binary_free_* functionsMarek Olšák2016-02-212-33/+0
* radeonsi: make radeon_shader_reloc name string fixed-sizedMarek Olšák2016-02-212-6/+3
* radeonsi: move some struct si_shader members to new struct si_shader_infoMarek Olšák2016-02-213-68/+71
* radeonsi: use smaller types for some si_shader membersMarek Olšák2016-02-212-3/+8
* radeonsi: enable compiling one variant per shaderMarek Olšák2016-02-213-1/+5
* radeonsi: print full shader name before disassemblyMarek Olšák2016-02-211-1/+33
* radeonsi: compile non-GS middle parts of shaders immediately if enabledMarek Olšák2016-02-213-18/+87
* radeonsi: rework polygon stippling for PS prologMarek Olšák2016-02-211-39/+110
* radeonsi: add PS prologMarek Olšák2016-02-215-2/+345
* radeonsi: add PS epilogMarek Olšák2016-02-214-2/+297
* radeonsi: add TCS epilogMarek Olšák2016-02-214-13/+155
* radeonsi: add VS epilogMarek Olšák2016-02-214-11/+171
* radeonsi: add VS prologMarek Olšák2016-02-214-1/+267
* radeonsi: first bits for non-monolithic shadersMarek Olšák2016-02-214-14/+45
* radeonsi: add code for dumping all shader parts together (v2)Marek Olšák2016-02-211-12/+34
* radeonsi: add code for combining and uploading shaders from 3 shader partsMarek Olšák2016-02-212-8/+36
* radeonsi: fail compilation if non-GS non-CS shaders have rodataMarek Olšák2016-02-211-0/+13
* radeonsi: separate 2 pieces of code from create_functionMarek Olšák2016-02-211-31/+51
* radeonsi: add samplemask parameter to si_export_mrt_colorMarek Olšák2016-02-211-3/+7
* radeonsi: add start_instance parameter to get_instance_index_for_fetchMarek Olšák2016-02-211-4/+6
* radeonsi: separate out shader key bits for prologs & epilogsMarek Olšák2016-02-214-100/+140
* radeonsi: compute how many input VGPRs fragment shaders haveMarek Olšák2016-02-212-0/+43
* radeonsi: compute how many input SGPRs and VGPRs shaders haveMarek Olšák2016-02-212-0/+34
* gallium/radeon: add basic code for setting shader return valuesMarek Olšák2016-02-214-8/+21
* nvc0: enable compute shaders on FermiSamuel Pitoiset2016-02-211-1/+3
* nv50/ir: add atomics support on shared memory for FermiSamuel Pitoiset2016-02-212-2/+102
* nv50/ir: make OP_SELP a compare instructionSamuel Pitoiset2016-02-213-10/+19
* nv50/ir: add lock/unlock subops for load/storeSamuel Pitoiset2016-02-213-2/+26
* nv50/ir: use s[] addr space for shared buffersSamuel Pitoiset2016-02-211-11/+30
* nvc0: reduce likelihood of collision for real buffers on FermiSamuel Pitoiset2016-02-211-2/+2