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path: root/src/mesa/drivers/dri/i965/brw_context.h
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* i965: Eliminate brw->cs.prog_data pointer.Kenneth Graunke2016-10-051-1/+0
* i965: Eliminate brw->wm.prog_data pointer.Kenneth Graunke2016-10-051-1/+0
* i965: Eliminate brw->gs.prog_data pointer.Kenneth Graunke2016-10-051-1/+0
* i965: Eliminate brw->tes.prog_data pointer.Kenneth Graunke2016-10-051-1/+0
* i965: Eliminate brw->tcs.prog_data pointer.Kenneth Graunke2016-10-051-1/+0
* i965: Eliminate brw->vs.prog_data pointer.Kenneth Graunke2016-10-051-1/+0
* i965/sync: Rename intel_syncobj.c -> brw_sync.cChad Versace2016-10-051-1/+1
* i965/sync: Replace 'intel' prefix with 'brw'Chad Versace2016-10-051-1/+1
* i965: Only emit 1 viewport when possible.Kenneth Graunke2016-10-031-0/+9
* i965: get rid of duplicated values from gen_device_infoLionel Landwerlin2016-09-231-17/+0
* i965: Rename intelScreen to screen.Kenneth Graunke2016-09-201-2/+2
* i965: Track non-compressible sampling of renderbuffersTopi Pohjolainen2016-09-121-0/+10
* i965: Replace boolean rb surface state setup argument with flagsTopi Pohjolainen2016-09-121-1/+1
* intel: Pull the guts of gen7_l3_state.c into a shared helperJason Ekstrand2016-09-031-2/+2
* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-031-3/+3
* i965: Move blorp into src/intel/blorpJason Ekstrand2016-08-291-1/+1
* i965: Move the hiz_op enum to blorpJason Ekstrand2016-08-291-1/+1
* i965/gen6: Refactor gen6_upload_urbJason Ekstrand2016-08-291-0/+3
* i965/blorp: Add a blorp_context struct and init/finish funcsJason Ekstrand2016-08-291-0/+3
* i965: Embrace "unlimited" GTT mmap supportChris Wilson2016-08-261-1/+1
* i965: Get rid of the do_lower_unnormalized_offsets passJason Ekstrand2016-07-221-1/+0
* compiler: Rename INTERP_QUALIFIER_* to INTERP_MODE_*.Kenneth Graunke2016-07-171-2/+2
* i965/context: Remove some unnecessary vfuncsJason Ekstrand2016-07-151-17/+0
* i965: Use ISL for emitting buffer surface statesJason Ekstrand2016-07-151-8/+0
* i965: Add an isl_device to the brw_contextJason Ekstrand2016-07-151-0/+4
* i965/urb: Allow blorp to record current settingsTopi Pohjolainen2016-07-041-10/+2
* glsl/mesa: split gl_shader in twoTimothy Arceri2016-06-301-4/+4
* i965: Move contents of brw_tex.c into intel_tex_validate.c.Kenneth Graunke2016-06-241-1/+1
* i965: Fix cross-primitive scratch corruption when changing the per-thread all...Francisco Jerez2016-06-131-0/+13
* i965: Keep track of the per-thread scratch allocation in brw_stage_state.Francisco Jerez2016-06-131-0/+10
* i965: Fix scratch overallocation if the original slot size was already a powe...Francisco Jerez2016-06-131-1/+1
* i965: Enable GL_KHR_robustnessKristian Høgsberg Kristensen2016-05-251-0/+2
* i965: Support textures with multiple planesKristian Høgsberg Kristensen2016-05-241-1/+1
* i965: Use ISL for surface format introspectionJason Ekstrand2016-05-231-2/+0
* i965/draw: Use the real size for index buffersJason Ekstrand2016-05-231-0/+1
* i965/draw: Use the real size for vertex buffersJason Ekstrand2016-05-231-0/+1
* i965/draw: Account for BaseInstance in VBO boundsJason Ekstrand2016-05-231-0/+1
* i965/draw: Stop relying on min_index == -1 for invalid index boundsJason Ekstrand2016-05-231-0/+1
* i965: Send the minimal number of STATE_BASE_ADDRESS packets.Kenneth Graunke2016-05-161-0/+1
* i965: Use blorp for all clearsJason Ekstrand2016-05-141-8/+0
* i965: Use blorp for all stencil blitsJason Ekstrand2016-05-141-8/+0
* i965: Use blorp for all updownsample blitsJason Ekstrand2016-05-141-8/+0
* i965: Move brw_get_rb_for_slice to brw_meta_utilJason Ekstrand2016-05-141-5/+0
* i965: Reimplement ARB_transform_feedback2 on Haswell and later.Kenneth Graunke2016-05-091-0/+14
* i965: Add a brw_load_register_reg64 helper.Kenneth Graunke2016-05-091-0/+2
* i965: Implement ARB_query_buffer_object for HSW+Jordan Justen2016-05-041-0/+5
* i965/gen6+: Add load register immediate helper functionsJordan Justen2016-05-041-0/+4
* i965/hsw+: Add support for copying a registerJordan Justen2016-05-041-0/+2
* i965/gen6+: Add support for storing immediate data into a bufferJordan Justen2016-05-041-0/+4
* i965: Add brw_store_register_mem32Jordan Justen2016-05-041-0/+2
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