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path: root/src/mesa/drivers/dri/i965/gen6_depthstencil.c
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* i965: Delete brw_state_flags::cache and related code.Kenneth Graunke2014-12-021-1/+0
* i965: Alphabetize brw_tracked_state flags and use a consistent style.Kenneth Graunke2014-11-291-2/+5
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-1/+1
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-2/+1
* intel: Stop doing special _NEW_STENCIL state flagging on drawbuffers.Eric Anholt2013-06-251-1/+1
* i965: Emit the depth/stencil state pointer directly, not via atoms.Kenneth Graunke2013-06-111-2/+18
* i965: Use ctx->Stencil._WriteEnabled in DEPTH_STENCIL_STATE.Kenneth Graunke2013-04-041-5/+1
* i965: Rewrite the HiZ opChad Versace2012-02-071-7/+2
* i965: Add missing _NEW_BUFFERS dirty bit to Gen6+ DEPTH_STENCIL atoms.Kenneth Graunke2012-01-091-1/+1
* i965: Don't depth test the fake depthbuffer when one isn't present.Eric Anholt2011-11-291-1/+6
* i965/gen6: Manipulate state batches for HiZ meta-ops [v4]Chad Versace2011-11-221-3/+8
* i965/gen6: Move setup of CC state batches to emit time.Eric Anholt2011-10-291-2/+2
* i965: Add a type argument to brw_state_batch().Eric Anholt2011-07-111-1/+2
* i965/gen6: Move the depth/stencil state to state streaming.Eric Anholt2011-04-291-112/+42
* Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg2010-10-131-1/+1
* intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt2010-06-081-3/+3
* i965: Remove unnecessary headers.Vinson Lee2010-02-251-4/+0
* i965: Start adding support for the Sandybridge CC unit.Eric Anholt2010-02-251-0/+169