summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
Commit message (Expand)AuthorAgeFilesLines
* i965/gen9: Allocate YF/YS tiled buffer objectsAnuj Phogat2015-06-291-3/+62
* i965/skl: Use more compact hiz dimensionsBen Widawsky2015-06-251-15/+17
* i965/gen8: Use HALIGN_16 for single sample mcs buffersBen Widawsky2015-06-191-1/+1
* i965: Fix aligning to the block size in intel_miptree_copy_sliceNeil Roberts2015-06-161-2/+4
* i965: Check for miptree pitch alignment before using intel_miptree_map_movntd...Anuj Phogat2015-06-151-1/+3
* i965/gen9: Set HALIGN_16 for all aux buffersBen Widawsky2015-06-121-3/+19
* i965/gen8: Correct HALIGN for AUX surfacesBen Widawsky2015-06-121-2/+13
* i965: Extract tiling from fast clear decisionBen Widawsky2015-06-121-11/+25
* i965/gen9: Only allow Y-Tiled MCS buffersBen Widawsky2015-06-121-0/+2
* i965: Consolidate certain miptree params to flagsBen Widawsky2015-06-121-47/+49
* i965: Move intel_miptree_choose_tiling() to brw_tex_layout.cAnuj Phogat2015-06-081-104/+0
* i965: Choose tiling in brw_miptree_layout() functionAnuj Phogat2015-06-081-23/+24
* i965: Add gen8 fast clear perf debugBen Widawsky2015-06-051-2/+15
* i965/skl: Don't use ALL_SLICES_AT_EACH_LODNeil Roberts2015-04-201-10/+20
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-15/+15
* i965: Don't bother freeing NULL.Matt Turner2015-04-131-4/+2
* i965: Change intel_miptree_create_for_bo() signatureChad Versace2015-04-131-6/+11
* i965: Add field intel_mipmap_tree::disable_aux_buffersChad Versace2015-04-131-2/+22
* i965: Refactor brw_is_hiz_depth_format()Chad Versace2015-04-131-2/+24
* i965: Declare intel_miptree_create_layout() as staticChad Versace2015-04-131-1/+1
* i965: Declare intel_miptree_alloc_mcs() as staticChad Versace2015-04-131-1/+6
* i965/gen8: Don't allocate hiz miptree structureJordan Justen2015-03-091-0/+105
* i965/gen7: Don't allocate hiz miptree structureJordan Justen2015-03-091-2/+104
* i965/hiz: Start to separate miptree out from hiz buffersJordan Justen2015-03-091-17/+42
* i965: Make a function to check the conditions to use the blitterAnuj Phogat2015-02-251-11/+29
* i965: Move the comment to the right placeAnuj Phogat2015-02-251-1/+1
* i965: Fix condition to use Y tiling in blitter in intel_miptree_create()Anuj Phogat2015-02-251-3/+3
* i965: Don't force x-tiling for 16-bpp formats on Gen>7Neil Roberts2015-02-251-3/+3
* i965: Don't tile 1D miptrees.Francisco Jerez2015-02-101-0/+7
* i965: Add a better PRM citation for the IMS dimension mangling.Kenneth Graunke2015-02-021-1/+22
* i965: Fix intel_miptree_copy_teximage for GL_TEXTURE_1D_ARRAYIago Toral Quiroga2015-02-021-1/+6
* i965/mipmap_tree: Add a depth parameter to create_for_boJason Ekstrand2015-01-221-2/+7
* i965/miptree_map_blit: Don't do the initial copy if INVALIDATE_RANGE is setJason Ekstrand2015-01-131-8/+15
* i965: Fix intel_miptree_map() signature to be more 64-bit safeChad Versace2014-12-221-3/+14
* i965: Fix segfault in WebGL Conformance on IvybridgeChad Versace2014-11-181-3/+4
* i965: Delete intel_chipset.h.Kenneth Graunke2014-09-291-1/+0
* i965/blorp: Pass image formats seperately from the miptreeJason Ekstrand2014-09-051-2/+4
* i965/gen6: Force ALL_SLICES_AT_EACH_LOD for separate stencil/hizJordan Justen2014-08-151-2/+4
* i965: Allow forcing miptree->array_layout = ALL_SLICES_AT_EACH_LODJordan Justen2014-08-151-10/+21
* i965: Change mipmap array_spacing_lod0 to array_layout (enum)Jordan Justen2014-08-151-4/+5
* i965: Implement fast color clears using meta operationsKristian Høgsberg2014-08-151-2/+2
* mesa: guard better when building with sse4.1 optimisationsEmil Velikov2014-08-131-0/+6
* i965/miptree: Layout 1D Array as 2D Array with height of 1Jordan Justen2014-08-011-0/+20
* i965: Fix z_offset computation in intel_miptree_unmap_depthstencil()Anuj Phogat2014-07-171-2/+2
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-6/+5
* mesa: Add and use foreach_list_typed_safe.Matt Turner2014-07-011-3/+1
* i965: Enable compressed multisample support (CMS) on Broadwell.Kenneth Graunke2014-06-261-8/+0
* i965: Add 2x MSAA support to the MCS allocation function.Kenneth Graunke2014-06-261-0/+1
* i965: Drop SINT workaround for CMS layout on Broadwell.Kenneth Graunke2014-06-261-3/+1
* i965: Make INTEL_DEBUG=mip print out whether HiZ is enabled.Kenneth Graunke2014-06-161-0/+2
generated by cgit v1.1 at 2024-07-12 07:03:52 +0000